2 * Copyright (C) ST-Ericsson SA 2011
4 * License terms: GNU General Public License (GPL) version 2
10 #include <asm/cacheflush.h>
11 #include <asm/hardware/cache-l2x0.h>
13 #include "db8500-regs.h"
16 static void __iomem *l2x0_base;
18 static int __init ux500_l2x0_unlock(void)
23 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
24 * apparently locks both caches before jumping to the kernel. The
25 * l2x0 core will not touch the unlock registers if the l2x0 is
26 * already enabled, so we do it right here instead. The PL310 has
27 * 8 sets of registers, one per possible CPU.
29 for (i = 0; i < 8; i++) {
30 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
31 i * L2X0_LOCKDOWN_STRIDE);
32 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
33 i * L2X0_LOCKDOWN_STRIDE);
38 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
41 * We can't write to secure registers as we are in non-secure
42 * mode, until we have some SMI service available.
46 static int __init ux500_l2x0_init(void)
48 if (cpu_is_u8500_family() || cpu_is_ux540_family())
49 l2x0_base = __io_address(U8500_L2CC_BASE);
51 /* Non-Ux500 platform */
54 /* Unlock before init */
57 outer_cache.write_sec = ux500_l2c310_write_sec;
59 if (of_have_populated_dt())
62 l2x0_init(l2x0_base, 0, ~0);
67 early_initcall(ux500_l2x0_init);