2 * This file contains common function prototypes to avoid externs
5 * Copyright (C) 2011 Xilinx
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef __MACH_ZYNQ_COMMON_H__
18 #define __MACH_ZYNQ_COMMON_H__
20 void zynq_secondary_startup(void);
22 extern int zynq_slcr_init(void);
23 extern int zynq_early_slcr_init(void);
24 extern void zynq_slcr_cpu_stop(int cpu);
25 extern void zynq_slcr_cpu_start(int cpu);
26 extern bool zynq_slcr_cpu_state_read(int cpu);
27 extern void zynq_slcr_cpu_state_write(int cpu, bool die);
28 extern u32 zynq_slcr_get_device_id(void);
31 extern char zynq_secondary_trampoline;
32 extern char zynq_secondary_trampoline_jump;
33 extern char zynq_secondary_trampoline_end;
34 extern int zynq_cpun_start(u32 address, int cpu);
35 extern struct smp_operations zynq_smp_ops __initdata;
38 extern void __iomem *zynq_scu_base;
40 void zynq_pm_late_init(void);
42 static inline void zynq_core_pm_init(void)
45 asm volatile ("mrc p15, 0, r12, c15, c0, 0\n"
47 "mcr p15, 0, r12, c15, c0, 0\n"