2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
82 unsigned long offset, size_t size, enum dma_data_direction dir,
83 struct dma_attrs *attrs)
85 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
89 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
90 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
91 * @handle: DMA address of buffer
92 * @size: size of buffer (same as passed to dma_map_page)
93 * @dir: DMA transfer direction (same as passed to dma_map_page)
95 * Unmap a page streaming mode DMA translation. The handle and size
96 * must match what was provided in the previous dma_map_page() call.
97 * All other usages are undefined.
99 * After this call, reads by the CPU to the buffer are guaranteed to see
100 * whatever the device wrote there.
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103 size_t size, enum dma_data_direction dir,
104 struct dma_attrs *attrs)
106 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108 handle & ~PAGE_MASK, size, dir);
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112 dma_addr_t handle, size_t size, enum dma_data_direction dir)
114 unsigned int offset = handle & (PAGE_SIZE - 1);
115 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116 __dma_page_dev_to_cpu(page, offset, size, dir);
119 static void arm_dma_sync_single_for_device(struct device *dev,
120 dma_addr_t handle, size_t size, enum dma_data_direction dir)
122 unsigned int offset = handle & (PAGE_SIZE - 1);
123 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124 __dma_page_cpu_to_dev(page, offset, size, dir);
127 struct dma_map_ops arm_dma_ops = {
128 .alloc = arm_dma_alloc,
129 .free = arm_dma_free,
130 .mmap = arm_dma_mmap,
131 .get_sgtable = arm_dma_get_sgtable,
132 .map_page = arm_dma_map_page,
133 .unmap_page = arm_dma_unmap_page,
134 .map_sg = arm_dma_map_sg,
135 .unmap_sg = arm_dma_unmap_sg,
136 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
137 .sync_single_for_device = arm_dma_sync_single_for_device,
138 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
139 .sync_sg_for_device = arm_dma_sync_sg_for_device,
140 .set_dma_mask = arm_dma_set_mask,
142 EXPORT_SYMBOL(arm_dma_ops);
144 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
145 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
146 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
147 dma_addr_t handle, struct dma_attrs *attrs);
149 struct dma_map_ops arm_coherent_dma_ops = {
150 .alloc = arm_coherent_dma_alloc,
151 .free = arm_coherent_dma_free,
152 .mmap = arm_dma_mmap,
153 .get_sgtable = arm_dma_get_sgtable,
154 .map_page = arm_coherent_dma_map_page,
155 .map_sg = arm_dma_map_sg,
156 .set_dma_mask = arm_dma_set_mask,
158 EXPORT_SYMBOL(arm_coherent_dma_ops);
160 static u64 get_coherent_dma_mask(struct device *dev)
162 u64 mask = (u64)arm_dma_limit;
165 mask = dev->coherent_dma_mask;
168 * Sanity check the DMA mask - it must be non-zero, and
169 * must be able to be satisfied by a DMA allocation.
172 dev_warn(dev, "coherent DMA mask is unset\n");
176 if ((~mask) & (u64)arm_dma_limit) {
177 dev_warn(dev, "coherent DMA mask %#llx is smaller "
178 "than system GFP_DMA mask %#llx\n",
179 mask, (u64)arm_dma_limit);
187 static void __dma_clear_buffer(struct page *page, size_t size)
190 * Ensure that the allocated pages are zeroed, and that any data
191 * lurking in the kernel direct-mapped region is invalidated.
193 if (PageHighMem(page)) {
194 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
195 phys_addr_t end = base + size;
197 void *ptr = kmap_atomic(page);
198 memset(ptr, 0, PAGE_SIZE);
199 dmac_flush_range(ptr, ptr + PAGE_SIZE);
204 outer_flush_range(base, end);
206 void *ptr = page_address(page);
207 memset(ptr, 0, size);
208 dmac_flush_range(ptr, ptr + size);
209 outer_flush_range(__pa(ptr), __pa(ptr) + size);
214 * Allocate a DMA buffer for 'dev' of size 'size' using the
215 * specified gfp mask. Note that 'size' must be page aligned.
217 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
219 unsigned long order = get_order(size);
220 struct page *page, *p, *e;
222 page = alloc_pages(gfp, order);
227 * Now split the huge page and free the excess pages
229 split_page(page, order);
230 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
233 __dma_clear_buffer(page, size);
239 * Free a DMA buffer. 'size' must be page aligned.
241 static void __dma_free_buffer(struct page *page, size_t size)
243 struct page *e = page + (size >> PAGE_SHIFT);
252 #ifdef CONFIG_HUGETLB_PAGE
253 #warning ARM Coherent DMA allocator does not (yet) support huge TLB
256 static void *__alloc_from_contiguous(struct device *dev, size_t size,
257 pgprot_t prot, struct page **ret_page,
260 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
261 pgprot_t prot, struct page **ret_page,
265 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
269 * DMA allocation can be mapped to user space, so lets
270 * set VM_USERMAP flags too.
272 return dma_common_contiguous_remap(page, size,
273 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
277 static void __dma_free_remap(void *cpu_addr, size_t size)
279 dma_common_free_remap(cpu_addr, size,
280 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
283 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
288 unsigned long *bitmap;
289 unsigned long nr_pages;
294 static struct dma_pool atomic_pool = {
295 .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
298 static int __init early_coherent_pool(char *p)
300 atomic_pool.size = memparse(p, &p);
303 early_param("coherent_pool", early_coherent_pool);
305 void __init init_dma_coherent_pool_size(unsigned long size)
308 * Catch any attempt to set the pool size too late.
310 BUG_ON(atomic_pool.vaddr);
313 * Set architecture specific coherent pool size only if
314 * it has not been changed by kernel command line parameter.
316 if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
317 atomic_pool.size = size;
321 * Initialise the coherent pool for atomic allocations.
323 static int __init atomic_pool_init(void)
325 struct dma_pool *pool = &atomic_pool;
326 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
327 gfp_t gfp = GFP_KERNEL | GFP_DMA;
328 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
329 unsigned long *bitmap;
333 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
335 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
339 pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
343 if (IS_ENABLED(CONFIG_DMA_CMA))
344 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
347 ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
352 for (i = 0; i < nr_pages; i++)
355 spin_lock_init(&pool->lock);
358 pool->bitmap = bitmap;
359 pool->nr_pages = nr_pages;
360 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
361 (unsigned)pool->size / 1024);
369 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
370 (unsigned)pool->size / 1024);
374 * CMA is activated by core_initcall, so we must be called after it.
376 postcore_initcall(atomic_pool_init);
378 struct dma_contig_early_reserve {
383 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
385 static int dma_mmu_remap_num __initdata;
387 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
389 dma_mmu_remap[dma_mmu_remap_num].base = base;
390 dma_mmu_remap[dma_mmu_remap_num].size = size;
394 void __init dma_contiguous_remap(void)
397 for (i = 0; i < dma_mmu_remap_num; i++) {
398 phys_addr_t start = dma_mmu_remap[i].base;
399 phys_addr_t end = start + dma_mmu_remap[i].size;
403 if (end > arm_lowmem_limit)
404 end = arm_lowmem_limit;
408 map.pfn = __phys_to_pfn(start);
409 map.virtual = __phys_to_virt(start);
410 map.length = end - start;
411 map.type = MT_MEMORY_DMA_READY;
414 * Clear previous low-memory mapping
416 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
418 pmd_clear(pmd_off_k(addr));
420 iotable_init(&map, 1);
424 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
427 struct page *page = virt_to_page(addr);
428 pgprot_t prot = *(pgprot_t *)data;
430 set_pte_ext(pte, mk_pte(page, prot), 0);
434 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
436 unsigned long start = (unsigned long) page_address(page);
437 unsigned end = start + size;
439 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
441 flush_tlb_kernel_range(start, end);
444 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
445 pgprot_t prot, struct page **ret_page,
450 page = __dma_alloc_buffer(dev, size, gfp);
454 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
456 __dma_free_buffer(page, size);
464 static void *__alloc_from_pool(size_t size, struct page **ret_page)
466 struct dma_pool *pool = &atomic_pool;
467 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
471 unsigned long align_mask;
474 WARN(1, "coherent pool not initialised!\n");
479 * Align the region allocation - allocations from pool are rather
480 * small, so align them to their order in pages, minimum is a page
481 * size. This helps reduce fragmentation of the DMA space.
483 align_mask = (1 << get_order(size)) - 1;
485 spin_lock_irqsave(&pool->lock, flags);
486 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
487 0, count, align_mask);
488 if (pageno < pool->nr_pages) {
489 bitmap_set(pool->bitmap, pageno, count);
490 ptr = pool->vaddr + PAGE_SIZE * pageno;
491 *ret_page = pool->pages[pageno];
493 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
494 "Please increase it with coherent_pool= kernel parameter!\n",
495 (unsigned)pool->size / 1024);
497 spin_unlock_irqrestore(&pool->lock, flags);
502 static bool __in_atomic_pool(void *start, size_t size)
504 struct dma_pool *pool = &atomic_pool;
505 void *end = start + size;
506 void *pool_start = pool->vaddr;
507 void *pool_end = pool->vaddr + pool->size;
509 if (start < pool_start || start >= pool_end)
515 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
516 start, end - 1, pool_start, pool_end - 1);
521 static int __free_from_pool(void *start, size_t size)
523 struct dma_pool *pool = &atomic_pool;
524 unsigned long pageno, count;
527 if (!__in_atomic_pool(start, size))
530 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
531 count = size >> PAGE_SHIFT;
533 spin_lock_irqsave(&pool->lock, flags);
534 bitmap_clear(pool->bitmap, pageno, count);
535 spin_unlock_irqrestore(&pool->lock, flags);
540 static void *__alloc_from_contiguous(struct device *dev, size_t size,
541 pgprot_t prot, struct page **ret_page,
544 unsigned long order = get_order(size);
545 size_t count = size >> PAGE_SHIFT;
549 page = dma_alloc_from_contiguous(dev, count, order);
553 __dma_clear_buffer(page, size);
555 if (PageHighMem(page)) {
556 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
558 dma_release_from_contiguous(dev, page, count);
562 __dma_remap(page, size, prot);
563 ptr = page_address(page);
569 static void __free_from_contiguous(struct device *dev, struct page *page,
570 void *cpu_addr, size_t size)
572 if (PageHighMem(page))
573 __dma_free_remap(cpu_addr, size);
575 __dma_remap(page, size, pgprot_kernel);
576 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
579 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
581 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
582 pgprot_writecombine(prot) :
583 pgprot_dmacoherent(prot);
589 #else /* !CONFIG_MMU */
593 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
594 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
595 #define __alloc_from_pool(size, ret_page) NULL
596 #define __alloc_from_contiguous(dev, size, prot, ret, c) NULL
597 #define __free_from_pool(cpu_addr, size) 0
598 #define __free_from_contiguous(dev, page, cpu_addr, size) do { } while (0)
599 #define __dma_free_remap(cpu_addr, size) do { } while (0)
601 #endif /* CONFIG_MMU */
603 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
604 struct page **ret_page)
607 page = __dma_alloc_buffer(dev, size, gfp);
612 return page_address(page);
617 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
618 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
620 u64 mask = get_coherent_dma_mask(dev);
621 struct page *page = NULL;
624 #ifdef CONFIG_DMA_API_DEBUG
625 u64 limit = (mask + 1) & ~mask;
626 if (limit && size >= limit) {
627 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
636 if (mask < 0xffffffffULL)
640 * Following is a work-around (a.k.a. hack) to prevent pages
641 * with __GFP_COMP being passed to split_page() which cannot
642 * handle them. The real problem is that this flag probably
643 * should be 0 on ARM as it is not supported on this
644 * platform; see CONFIG_HUGETLBFS.
646 gfp &= ~(__GFP_COMP);
648 *handle = DMA_ERROR_CODE;
649 size = PAGE_ALIGN(size);
651 if (is_coherent || nommu())
652 addr = __alloc_simple_buffer(dev, size, gfp, &page);
653 else if (!(gfp & __GFP_WAIT))
654 addr = __alloc_from_pool(size, &page);
655 else if (!IS_ENABLED(CONFIG_DMA_CMA))
656 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
658 addr = __alloc_from_contiguous(dev, size, prot, &page, caller);
661 *handle = pfn_to_dma(dev, page_to_pfn(page));
667 * Allocate DMA-coherent memory space and return both the kernel remapped
668 * virtual and bus address for that space.
670 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
671 gfp_t gfp, struct dma_attrs *attrs)
673 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
676 if (dma_alloc_from_coherent(dev, size, handle, &memory))
679 return __dma_alloc(dev, size, handle, gfp, prot, false,
680 __builtin_return_address(0));
683 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
684 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
686 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
689 if (dma_alloc_from_coherent(dev, size, handle, &memory))
692 return __dma_alloc(dev, size, handle, gfp, prot, true,
693 __builtin_return_address(0));
697 * Create userspace mapping for the DMA-coherent memory.
699 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
700 void *cpu_addr, dma_addr_t dma_addr, size_t size,
701 struct dma_attrs *attrs)
705 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
706 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
707 unsigned long pfn = dma_to_pfn(dev, dma_addr);
708 unsigned long off = vma->vm_pgoff;
710 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
712 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
715 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
716 ret = remap_pfn_range(vma, vma->vm_start,
718 vma->vm_end - vma->vm_start,
721 #endif /* CONFIG_MMU */
727 * Free a buffer as defined by the above mapping.
729 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
730 dma_addr_t handle, struct dma_attrs *attrs,
733 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
735 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
738 size = PAGE_ALIGN(size);
740 if (is_coherent || nommu()) {
741 __dma_free_buffer(page, size);
742 } else if (__free_from_pool(cpu_addr, size)) {
744 } else if (!IS_ENABLED(CONFIG_DMA_CMA)) {
745 __dma_free_remap(cpu_addr, size);
746 __dma_free_buffer(page, size);
749 * Non-atomic allocations cannot be freed with IRQs disabled
751 WARN_ON(irqs_disabled());
752 __free_from_contiguous(dev, page, cpu_addr, size);
756 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
757 dma_addr_t handle, struct dma_attrs *attrs)
759 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
762 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
763 dma_addr_t handle, struct dma_attrs *attrs)
765 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
768 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
769 void *cpu_addr, dma_addr_t handle, size_t size,
770 struct dma_attrs *attrs)
772 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
775 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
779 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
783 static void dma_cache_maint_page(struct page *page, unsigned long offset,
784 size_t size, enum dma_data_direction dir,
785 void (*op)(const void *, size_t, int))
790 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
794 * A single sg entry may refer to multiple physically contiguous
795 * pages. But we still need to process highmem pages individually.
796 * If highmem is not configured then the bulk of this loop gets
803 page = pfn_to_page(pfn);
805 if (PageHighMem(page)) {
806 if (len + offset > PAGE_SIZE)
807 len = PAGE_SIZE - offset;
809 if (cache_is_vipt_nonaliasing()) {
810 vaddr = kmap_atomic(page);
811 op(vaddr + offset, len, dir);
812 kunmap_atomic(vaddr);
814 vaddr = kmap_high_get(page);
816 op(vaddr + offset, len, dir);
821 vaddr = page_address(page) + offset;
831 * Make an area consistent for devices.
832 * Note: Drivers should NOT use this function directly, as it will break
833 * platforms with CONFIG_DMABOUNCE.
834 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
836 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
837 size_t size, enum dma_data_direction dir)
841 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
843 paddr = page_to_phys(page) + off;
844 if (dir == DMA_FROM_DEVICE) {
845 outer_inv_range(paddr, paddr + size);
847 outer_clean_range(paddr, paddr + size);
849 /* FIXME: non-speculating: flush on bidirectional mappings? */
852 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
853 size_t size, enum dma_data_direction dir)
855 unsigned long paddr = page_to_phys(page) + off;
857 /* FIXME: non-speculating: not required */
858 /* don't bother invalidating if DMA to device */
859 if (dir != DMA_TO_DEVICE)
860 outer_inv_range(paddr, paddr + size);
862 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
865 * Mark the D-cache clean for this page to avoid extra flushing.
867 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
868 set_bit(PG_dcache_clean, &page->flags);
872 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
873 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
874 * @sg: list of buffers
875 * @nents: number of buffers to map
876 * @dir: DMA transfer direction
878 * Map a set of buffers described by scatterlist in streaming mode for DMA.
879 * This is the scatter-gather version of the dma_map_single interface.
880 * Here the scatter gather list elements are each tagged with the
881 * appropriate dma address and length. They are obtained via
882 * sg_dma_{address,length}.
884 * Device ownership issues as mentioned for dma_map_single are the same
887 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
888 enum dma_data_direction dir, struct dma_attrs *attrs)
890 struct dma_map_ops *ops = get_dma_ops(dev);
891 struct scatterlist *s;
894 for_each_sg(sg, s, nents, i) {
895 #ifdef CONFIG_NEED_SG_DMA_LENGTH
896 s->dma_length = s->length;
898 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
899 s->length, dir, attrs);
900 if (dma_mapping_error(dev, s->dma_address))
906 for_each_sg(sg, s, i, j)
907 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
912 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
913 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
914 * @sg: list of buffers
915 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
916 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
918 * Unmap a set of streaming mode DMA translations. Again, CPU access
919 * rules concerning calls here are the same as for dma_unmap_single().
921 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
922 enum dma_data_direction dir, struct dma_attrs *attrs)
924 struct dma_map_ops *ops = get_dma_ops(dev);
925 struct scatterlist *s;
929 for_each_sg(sg, s, nents, i)
930 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
934 * arm_dma_sync_sg_for_cpu
935 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
936 * @sg: list of buffers
937 * @nents: number of buffers to map (returned from dma_map_sg)
938 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
940 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
941 int nents, enum dma_data_direction dir)
943 struct dma_map_ops *ops = get_dma_ops(dev);
944 struct scatterlist *s;
947 for_each_sg(sg, s, nents, i)
948 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
953 * arm_dma_sync_sg_for_device
954 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
955 * @sg: list of buffers
956 * @nents: number of buffers to map (returned from dma_map_sg)
957 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
959 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
960 int nents, enum dma_data_direction dir)
962 struct dma_map_ops *ops = get_dma_ops(dev);
963 struct scatterlist *s;
966 for_each_sg(sg, s, nents, i)
967 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
972 * Return whether the given device DMA address mask can be supported
973 * properly. For example, if your device can only drive the low 24-bits
974 * during bus mastering, then you would pass 0x00ffffff as the mask
977 int dma_supported(struct device *dev, u64 mask)
979 if (mask < (u64)arm_dma_limit)
983 EXPORT_SYMBOL(dma_supported);
985 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
987 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
990 *dev->dma_mask = dma_mask;
995 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
997 static int __init dma_debug_do_init(void)
999 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1002 fs_initcall(dma_debug_do_init);
1004 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1008 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1011 unsigned int order = get_order(size);
1012 unsigned int align = 0;
1013 unsigned int count, start;
1014 unsigned long flags;
1016 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1017 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1019 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1020 (1 << mapping->order) - 1) >> mapping->order;
1022 if (order > mapping->order)
1023 align = (1 << (order - mapping->order)) - 1;
1025 spin_lock_irqsave(&mapping->lock, flags);
1026 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1028 if (start > mapping->bits) {
1029 spin_unlock_irqrestore(&mapping->lock, flags);
1030 return DMA_ERROR_CODE;
1033 bitmap_set(mapping->bitmap, start, count);
1034 spin_unlock_irqrestore(&mapping->lock, flags);
1036 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1039 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1040 dma_addr_t addr, size_t size)
1042 unsigned int start = (addr - mapping->base) >>
1043 (mapping->order + PAGE_SHIFT);
1044 unsigned int count = ((size >> PAGE_SHIFT) +
1045 (1 << mapping->order) - 1) >> mapping->order;
1046 unsigned long flags;
1048 spin_lock_irqsave(&mapping->lock, flags);
1049 bitmap_clear(mapping->bitmap, start, count);
1050 spin_unlock_irqrestore(&mapping->lock, flags);
1053 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1054 gfp_t gfp, struct dma_attrs *attrs)
1056 struct page **pages;
1057 int count = size >> PAGE_SHIFT;
1058 int array_size = count * sizeof(struct page *);
1061 if (array_size <= PAGE_SIZE)
1062 pages = kzalloc(array_size, gfp);
1064 pages = vzalloc(array_size);
1068 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1070 unsigned long order = get_order(size);
1073 page = dma_alloc_from_contiguous(dev, count, order);
1077 __dma_clear_buffer(page, size);
1079 for (i = 0; i < count; i++)
1080 pages[i] = page + i;
1086 * IOMMU can map any pages, so himem can also be used here
1088 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1091 int j, order = __fls(count);
1093 pages[i] = alloc_pages(gfp, order);
1094 while (!pages[i] && order)
1095 pages[i] = alloc_pages(gfp, --order);
1100 split_page(pages[i], order);
1103 pages[i + j] = pages[i] + j;
1106 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1108 count -= 1 << order;
1115 __free_pages(pages[i], 0);
1116 if (array_size <= PAGE_SIZE)
1123 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1124 size_t size, struct dma_attrs *attrs)
1126 int count = size >> PAGE_SHIFT;
1127 int array_size = count * sizeof(struct page *);
1130 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1131 dma_release_from_contiguous(dev, pages[0], count);
1133 for (i = 0; i < count; i++)
1135 __free_pages(pages[i], 0);
1138 if (array_size <= PAGE_SIZE)
1146 * Create a CPU mapping for a specified pages
1149 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1152 return dma_common_pages_remap(pages, size,
1153 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1158 * Create a mapping in device IO address space for specified pages
1161 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1163 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1164 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1165 dma_addr_t dma_addr, iova;
1166 int i, ret = DMA_ERROR_CODE;
1168 dma_addr = __alloc_iova(mapping, size);
1169 if (dma_addr == DMA_ERROR_CODE)
1173 for (i = 0; i < count; ) {
1174 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1175 phys_addr_t phys = page_to_phys(pages[i]);
1176 unsigned int len, j;
1178 for (j = i + 1; j < count; j++, next_pfn++)
1179 if (page_to_pfn(pages[j]) != next_pfn)
1182 len = (j - i) << PAGE_SHIFT;
1183 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1191 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1192 __free_iova(mapping, dma_addr, size);
1193 return DMA_ERROR_CODE;
1196 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1198 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1201 * add optional in-page offset from iova to size and align
1202 * result to page size
1204 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1207 iommu_unmap(mapping->domain, iova, size);
1208 __free_iova(mapping, iova, size);
1212 static struct page **__atomic_get_pages(void *addr)
1214 struct dma_pool *pool = &atomic_pool;
1215 struct page **pages = pool->pages;
1216 int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1218 return pages + offs;
1221 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1223 struct vm_struct *area;
1225 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1226 return __atomic_get_pages(cpu_addr);
1228 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1231 area = find_vm_area(cpu_addr);
1232 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1237 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1243 addr = __alloc_from_pool(size, &page);
1247 *handle = __iommu_create_mapping(dev, &page, size);
1248 if (*handle == DMA_ERROR_CODE)
1254 __free_from_pool(addr, size);
1258 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1259 dma_addr_t handle, size_t size)
1261 __iommu_remove_mapping(dev, handle, size);
1262 __free_from_pool(cpu_addr, size);
1265 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1266 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1268 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1269 struct page **pages;
1272 *handle = DMA_ERROR_CODE;
1273 size = PAGE_ALIGN(size);
1275 if (!(gfp & __GFP_WAIT))
1276 return __iommu_alloc_atomic(dev, size, handle);
1278 pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1282 *handle = __iommu_create_mapping(dev, pages, size);
1283 if (*handle == DMA_ERROR_CODE)
1286 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1289 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1290 __builtin_return_address(0));
1297 __iommu_remove_mapping(dev, *handle, size);
1299 __iommu_free_buffer(dev, pages, size, attrs);
1303 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1304 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1305 struct dma_attrs *attrs)
1307 unsigned long uaddr = vma->vm_start;
1308 unsigned long usize = vma->vm_end - vma->vm_start;
1309 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1311 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1317 int ret = vm_insert_page(vma, uaddr, *pages++);
1319 pr_err("Remapping memory failed: %d\n", ret);
1324 } while (usize > 0);
1330 * free a page as defined by the above mapping.
1331 * Must not be called with IRQs disabled.
1333 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1334 dma_addr_t handle, struct dma_attrs *attrs)
1336 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1337 size = PAGE_ALIGN(size);
1340 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1344 if (__in_atomic_pool(cpu_addr, size)) {
1345 __iommu_free_atomic(dev, cpu_addr, handle, size);
1349 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1350 dma_common_free_remap(cpu_addr, size,
1351 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1354 __iommu_remove_mapping(dev, handle, size);
1355 __iommu_free_buffer(dev, pages, size, attrs);
1358 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1359 void *cpu_addr, dma_addr_t dma_addr,
1360 size_t size, struct dma_attrs *attrs)
1362 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1363 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1368 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1373 * Map a part of the scatter-gather list into contiguous io address space
1375 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1376 size_t size, dma_addr_t *handle,
1377 enum dma_data_direction dir, struct dma_attrs *attrs,
1380 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1381 dma_addr_t iova, iova_base;
1384 struct scatterlist *s;
1386 size = PAGE_ALIGN(size);
1387 *handle = DMA_ERROR_CODE;
1389 iova_base = iova = __alloc_iova(mapping, size);
1390 if (iova == DMA_ERROR_CODE)
1393 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1394 phys_addr_t phys = page_to_phys(sg_page(s));
1395 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1398 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1399 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1401 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1404 count += len >> PAGE_SHIFT;
1407 *handle = iova_base;
1411 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1412 __free_iova(mapping, iova_base, size);
1416 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1417 enum dma_data_direction dir, struct dma_attrs *attrs,
1420 struct scatterlist *s = sg, *dma = sg, *start = sg;
1422 unsigned int offset = s->offset;
1423 unsigned int size = s->offset + s->length;
1424 unsigned int max = dma_get_max_seg_size(dev);
1426 for (i = 1; i < nents; i++) {
1429 s->dma_address = DMA_ERROR_CODE;
1432 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1433 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1434 dir, attrs, is_coherent) < 0)
1437 dma->dma_address += offset;
1438 dma->dma_length = size - offset;
1440 size = offset = s->offset;
1447 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1451 dma->dma_address += offset;
1452 dma->dma_length = size - offset;
1457 for_each_sg(sg, s, count, i)
1458 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1463 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1464 * @dev: valid struct device pointer
1465 * @sg: list of buffers
1466 * @nents: number of buffers to map
1467 * @dir: DMA transfer direction
1469 * Map a set of i/o coherent buffers described by scatterlist in streaming
1470 * mode for DMA. The scatter gather list elements are merged together (if
1471 * possible) and tagged with the appropriate dma address and length. They are
1472 * obtained via sg_dma_{address,length}.
1474 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1475 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1477 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1481 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1482 * @dev: valid struct device pointer
1483 * @sg: list of buffers
1484 * @nents: number of buffers to map
1485 * @dir: DMA transfer direction
1487 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1488 * The scatter gather list elements are merged together (if possible) and
1489 * tagged with the appropriate dma address and length. They are obtained via
1490 * sg_dma_{address,length}.
1492 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1493 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1495 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1498 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1499 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1502 struct scatterlist *s;
1505 for_each_sg(sg, s, nents, i) {
1507 __iommu_remove_mapping(dev, sg_dma_address(s),
1510 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1511 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1517 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1518 * @dev: valid struct device pointer
1519 * @sg: list of buffers
1520 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1521 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1523 * Unmap a set of streaming mode DMA translations. Again, CPU access
1524 * rules concerning calls here are the same as for dma_unmap_single().
1526 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1527 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1529 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1533 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1534 * @dev: valid struct device pointer
1535 * @sg: list of buffers
1536 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1537 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1539 * Unmap a set of streaming mode DMA translations. Again, CPU access
1540 * rules concerning calls here are the same as for dma_unmap_single().
1542 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1543 enum dma_data_direction dir, struct dma_attrs *attrs)
1545 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1549 * arm_iommu_sync_sg_for_cpu
1550 * @dev: valid struct device pointer
1551 * @sg: list of buffers
1552 * @nents: number of buffers to map (returned from dma_map_sg)
1553 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1555 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1556 int nents, enum dma_data_direction dir)
1558 struct scatterlist *s;
1561 for_each_sg(sg, s, nents, i)
1562 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1567 * arm_iommu_sync_sg_for_device
1568 * @dev: valid struct device pointer
1569 * @sg: list of buffers
1570 * @nents: number of buffers to map (returned from dma_map_sg)
1571 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1573 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1574 int nents, enum dma_data_direction dir)
1576 struct scatterlist *s;
1579 for_each_sg(sg, s, nents, i)
1580 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1585 * arm_coherent_iommu_map_page
1586 * @dev: valid struct device pointer
1587 * @page: page that buffer resides in
1588 * @offset: offset into page for start of buffer
1589 * @size: size of buffer to map
1590 * @dir: DMA transfer direction
1592 * Coherent IOMMU aware version of arm_dma_map_page()
1594 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1595 unsigned long offset, size_t size, enum dma_data_direction dir,
1596 struct dma_attrs *attrs)
1598 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1599 dma_addr_t dma_addr;
1600 int ret, len = PAGE_ALIGN(size + offset);
1602 dma_addr = __alloc_iova(mapping, len);
1603 if (dma_addr == DMA_ERROR_CODE)
1606 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1610 return dma_addr + offset;
1612 __free_iova(mapping, dma_addr, len);
1613 return DMA_ERROR_CODE;
1617 * arm_iommu_map_page
1618 * @dev: valid struct device pointer
1619 * @page: page that buffer resides in
1620 * @offset: offset into page for start of buffer
1621 * @size: size of buffer to map
1622 * @dir: DMA transfer direction
1624 * IOMMU aware version of arm_dma_map_page()
1626 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1627 unsigned long offset, size_t size, enum dma_data_direction dir,
1628 struct dma_attrs *attrs)
1630 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1631 __dma_page_cpu_to_dev(page, offset, size, dir);
1633 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1637 * arm_coherent_iommu_unmap_page
1638 * @dev: valid struct device pointer
1639 * @handle: DMA address of buffer
1640 * @size: size of buffer (same as passed to dma_map_page)
1641 * @dir: DMA transfer direction (same as passed to dma_map_page)
1643 * Coherent IOMMU aware version of arm_dma_unmap_page()
1645 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1646 size_t size, enum dma_data_direction dir,
1647 struct dma_attrs *attrs)
1649 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1650 dma_addr_t iova = handle & PAGE_MASK;
1651 int offset = handle & ~PAGE_MASK;
1652 int len = PAGE_ALIGN(size + offset);
1657 iommu_unmap(mapping->domain, iova, len);
1658 __free_iova(mapping, iova, len);
1662 * arm_iommu_unmap_page
1663 * @dev: valid struct device pointer
1664 * @handle: DMA address of buffer
1665 * @size: size of buffer (same as passed to dma_map_page)
1666 * @dir: DMA transfer direction (same as passed to dma_map_page)
1668 * IOMMU aware version of arm_dma_unmap_page()
1670 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1671 size_t size, enum dma_data_direction dir,
1672 struct dma_attrs *attrs)
1674 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1675 dma_addr_t iova = handle & PAGE_MASK;
1676 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1677 int offset = handle & ~PAGE_MASK;
1678 int len = PAGE_ALIGN(size + offset);
1683 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1684 __dma_page_dev_to_cpu(page, offset, size, dir);
1686 iommu_unmap(mapping->domain, iova, len);
1687 __free_iova(mapping, iova, len);
1690 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1691 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1693 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1694 dma_addr_t iova = handle & PAGE_MASK;
1695 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1696 unsigned int offset = handle & ~PAGE_MASK;
1701 __dma_page_dev_to_cpu(page, offset, size, dir);
1704 static void arm_iommu_sync_single_for_device(struct device *dev,
1705 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1707 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1708 dma_addr_t iova = handle & PAGE_MASK;
1709 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1710 unsigned int offset = handle & ~PAGE_MASK;
1715 __dma_page_cpu_to_dev(page, offset, size, dir);
1718 struct dma_map_ops iommu_ops = {
1719 .alloc = arm_iommu_alloc_attrs,
1720 .free = arm_iommu_free_attrs,
1721 .mmap = arm_iommu_mmap_attrs,
1722 .get_sgtable = arm_iommu_get_sgtable,
1724 .map_page = arm_iommu_map_page,
1725 .unmap_page = arm_iommu_unmap_page,
1726 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1727 .sync_single_for_device = arm_iommu_sync_single_for_device,
1729 .map_sg = arm_iommu_map_sg,
1730 .unmap_sg = arm_iommu_unmap_sg,
1731 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1732 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1734 .set_dma_mask = arm_dma_set_mask,
1737 struct dma_map_ops iommu_coherent_ops = {
1738 .alloc = arm_iommu_alloc_attrs,
1739 .free = arm_iommu_free_attrs,
1740 .mmap = arm_iommu_mmap_attrs,
1741 .get_sgtable = arm_iommu_get_sgtable,
1743 .map_page = arm_coherent_iommu_map_page,
1744 .unmap_page = arm_coherent_iommu_unmap_page,
1746 .map_sg = arm_coherent_iommu_map_sg,
1747 .unmap_sg = arm_coherent_iommu_unmap_sg,
1749 .set_dma_mask = arm_dma_set_mask,
1753 * arm_iommu_create_mapping
1754 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1755 * @base: start address of the valid IO address space
1756 * @size: size of the valid IO address space
1757 * @order: accuracy of the IO addresses allocations
1759 * Creates a mapping structure which holds information about used/unused
1760 * IO address ranges, which is required to perform memory allocation and
1761 * mapping with IOMMU aware functions.
1763 * The client device need to be attached to the mapping with
1764 * arm_iommu_attach_device function.
1766 struct dma_iommu_mapping *
1767 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1770 unsigned int count = size >> (PAGE_SHIFT + order);
1771 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1772 struct dma_iommu_mapping *mapping;
1776 return ERR_PTR(-EINVAL);
1778 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1782 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1783 if (!mapping->bitmap)
1786 mapping->base = base;
1787 mapping->bits = BITS_PER_BYTE * bitmap_size;
1788 mapping->order = order;
1789 spin_lock_init(&mapping->lock);
1791 mapping->domain = iommu_domain_alloc(bus);
1792 if (!mapping->domain)
1795 kref_init(&mapping->kref);
1798 kfree(mapping->bitmap);
1802 return ERR_PTR(err);
1804 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1806 static void release_iommu_mapping(struct kref *kref)
1808 struct dma_iommu_mapping *mapping =
1809 container_of(kref, struct dma_iommu_mapping, kref);
1811 iommu_domain_free(mapping->domain);
1812 kfree(mapping->bitmap);
1816 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1819 kref_put(&mapping->kref, release_iommu_mapping);
1821 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1824 * arm_iommu_attach_device
1825 * @dev: valid struct device pointer
1826 * @mapping: io address space mapping structure (returned from
1827 * arm_iommu_create_mapping)
1829 * Attaches specified io address space mapping to the provided device,
1830 * this replaces the dma operations (dma_map_ops pointer) with the
1831 * IOMMU aware version. More than one client might be attached to
1832 * the same io address space mapping.
1834 int arm_iommu_attach_device(struct device *dev,
1835 struct dma_iommu_mapping *mapping)
1839 err = iommu_attach_device(mapping->domain, dev);
1843 kref_get(&mapping->kref);
1844 dev->archdata.mapping = mapping;
1845 set_dma_ops(dev, &iommu_ops);
1847 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1850 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1853 * arm_iommu_detach_device
1854 * @dev: valid struct device pointer
1856 * Detaches the provided device from a previously attached map.
1857 * This voids the dma operations (dma_map_ops pointer)
1859 void arm_iommu_detach_device(struct device *dev)
1861 struct dma_iommu_mapping *mapping;
1863 mapping = to_dma_iommu_mapping(dev);
1865 dev_warn(dev, "Not attached\n");
1869 iommu_detach_device(mapping->domain, dev);
1870 kref_put(&mapping->kref, release_iommu_mapping);
1872 set_dma_ops(dev, NULL);
1874 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1876 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);