2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
82 unsigned long offset, size_t size, enum dma_data_direction dir,
83 struct dma_attrs *attrs)
85 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
89 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
90 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
91 * @handle: DMA address of buffer
92 * @size: size of buffer (same as passed to dma_map_page)
93 * @dir: DMA transfer direction (same as passed to dma_map_page)
95 * Unmap a page streaming mode DMA translation. The handle and size
96 * must match what was provided in the previous dma_map_page() call.
97 * All other usages are undefined.
99 * After this call, reads by the CPU to the buffer are guaranteed to see
100 * whatever the device wrote there.
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103 size_t size, enum dma_data_direction dir,
104 struct dma_attrs *attrs)
106 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108 handle & ~PAGE_MASK, size, dir);
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112 dma_addr_t handle, size_t size, enum dma_data_direction dir)
114 unsigned int offset = handle & (PAGE_SIZE - 1);
115 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116 __dma_page_dev_to_cpu(page, offset, size, dir);
119 static void arm_dma_sync_single_for_device(struct device *dev,
120 dma_addr_t handle, size_t size, enum dma_data_direction dir)
122 unsigned int offset = handle & (PAGE_SIZE - 1);
123 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124 __dma_page_cpu_to_dev(page, offset, size, dir);
127 struct dma_map_ops arm_dma_ops = {
128 .alloc = arm_dma_alloc,
129 .free = arm_dma_free,
130 .mmap = arm_dma_mmap,
131 .get_sgtable = arm_dma_get_sgtable,
132 .map_page = arm_dma_map_page,
133 .unmap_page = arm_dma_unmap_page,
134 .map_sg = arm_dma_map_sg,
135 .unmap_sg = arm_dma_unmap_sg,
136 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
137 .sync_single_for_device = arm_dma_sync_single_for_device,
138 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
139 .sync_sg_for_device = arm_dma_sync_sg_for_device,
140 .set_dma_mask = arm_dma_set_mask,
142 EXPORT_SYMBOL(arm_dma_ops);
144 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
145 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
146 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
147 dma_addr_t handle, struct dma_attrs *attrs);
149 struct dma_map_ops arm_coherent_dma_ops = {
150 .alloc = arm_coherent_dma_alloc,
151 .free = arm_coherent_dma_free,
152 .mmap = arm_dma_mmap,
153 .get_sgtable = arm_dma_get_sgtable,
154 .map_page = arm_coherent_dma_map_page,
155 .map_sg = arm_dma_map_sg,
156 .set_dma_mask = arm_dma_set_mask,
158 EXPORT_SYMBOL(arm_coherent_dma_ops);
160 static u64 get_coherent_dma_mask(struct device *dev)
162 u64 mask = (u64)arm_dma_limit;
165 mask = dev->coherent_dma_mask;
168 * Sanity check the DMA mask - it must be non-zero, and
169 * must be able to be satisfied by a DMA allocation.
172 dev_warn(dev, "coherent DMA mask is unset\n");
176 if ((~mask) & (u64)arm_dma_limit) {
177 dev_warn(dev, "coherent DMA mask %#llx is smaller "
178 "than system GFP_DMA mask %#llx\n",
179 mask, (u64)arm_dma_limit);
187 static void __dma_clear_buffer(struct page *page, size_t size)
190 * Ensure that the allocated pages are zeroed, and that any data
191 * lurking in the kernel direct-mapped region is invalidated.
193 if (PageHighMem(page)) {
194 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
195 phys_addr_t end = base + size;
197 void *ptr = kmap_atomic(page);
198 memset(ptr, 0, PAGE_SIZE);
199 dmac_flush_range(ptr, ptr + PAGE_SIZE);
204 outer_flush_range(base, end);
206 void *ptr = page_address(page);
207 memset(ptr, 0, size);
208 dmac_flush_range(ptr, ptr + size);
209 outer_flush_range(__pa(ptr), __pa(ptr) + size);
214 * Allocate a DMA buffer for 'dev' of size 'size' using the
215 * specified gfp mask. Note that 'size' must be page aligned.
217 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
219 unsigned long order = get_order(size);
220 struct page *page, *p, *e;
222 page = alloc_pages(gfp, order);
227 * Now split the huge page and free the excess pages
229 split_page(page, order);
230 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
233 __dma_clear_buffer(page, size);
239 * Free a DMA buffer. 'size' must be page aligned.
241 static void __dma_free_buffer(struct page *page, size_t size)
243 struct page *e = page + (size >> PAGE_SHIFT);
252 #ifdef CONFIG_HUGETLB_PAGE
253 #warning ARM Coherent DMA allocator does not (yet) support huge TLB
256 static void *__alloc_from_contiguous(struct device *dev, size_t size,
257 pgprot_t prot, struct page **ret_page,
258 #ifdef CONFIG_ARCH_ROCKCHIP
259 struct dma_attrs *attrs,
263 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
264 pgprot_t prot, struct page **ret_page,
268 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
271 struct vm_struct *area;
275 * DMA allocation can be mapped to user space, so lets
276 * set VM_USERMAP flags too.
278 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
282 addr = (unsigned long)area->addr;
283 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
285 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
286 vunmap((void *)addr);
292 static void __dma_free_remap(void *cpu_addr, size_t size)
294 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
295 struct vm_struct *area = find_vm_area(cpu_addr);
296 if (!area || (area->flags & flags) != flags) {
297 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
300 unmap_kernel_range((unsigned long)cpu_addr, size);
304 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
309 unsigned long *bitmap;
310 unsigned long nr_pages;
315 static struct dma_pool atomic_pool = {
316 .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
319 static int __init early_coherent_pool(char *p)
321 atomic_pool.size = memparse(p, &p);
324 early_param("coherent_pool", early_coherent_pool);
326 void __init init_dma_coherent_pool_size(unsigned long size)
329 * Catch any attempt to set the pool size too late.
331 BUG_ON(atomic_pool.vaddr);
334 * Set architecture specific coherent pool size only if
335 * it has not been changed by kernel command line parameter.
337 if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
338 atomic_pool.size = size;
342 * Initialise the coherent pool for atomic allocations.
344 static int __init atomic_pool_init(void)
346 struct dma_pool *pool = &atomic_pool;
347 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
348 gfp_t gfp = GFP_KERNEL | GFP_DMA;
349 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
350 unsigned long *bitmap;
354 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
356 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
360 pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
364 if (IS_ENABLED(CONFIG_DMA_CMA))
365 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
366 #ifdef CONFIG_ARCH_ROCKCHIP
371 ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
376 for (i = 0; i < nr_pages; i++)
379 spin_lock_init(&pool->lock);
382 pool->bitmap = bitmap;
383 pool->nr_pages = nr_pages;
384 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
385 (unsigned)pool->size / 1024);
393 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
394 (unsigned)pool->size / 1024);
398 * CMA is activated by core_initcall, so we must be called after it.
400 postcore_initcall(atomic_pool_init);
402 struct dma_contig_early_reserve {
407 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
409 static int dma_mmu_remap_num __initdata;
411 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
413 dma_mmu_remap[dma_mmu_remap_num].base = base;
414 dma_mmu_remap[dma_mmu_remap_num].size = size;
418 void __init dma_contiguous_remap(void)
421 for (i = 0; i < dma_mmu_remap_num; i++) {
422 phys_addr_t start = dma_mmu_remap[i].base;
423 phys_addr_t end = start + dma_mmu_remap[i].size;
427 if (end > arm_lowmem_limit)
428 end = arm_lowmem_limit;
432 map.pfn = __phys_to_pfn(start);
433 map.virtual = __phys_to_virt(start);
434 map.length = end - start;
435 map.type = MT_MEMORY_DMA_READY;
438 * Clear previous low-memory mapping
440 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
442 pmd_clear(pmd_off_k(addr));
444 iotable_init(&map, 1);
448 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
451 struct page *page = virt_to_page(addr);
452 pgprot_t prot = *(pgprot_t *)data;
454 set_pte_ext(pte, mk_pte(page, prot), 0);
458 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
460 unsigned long start = (unsigned long) page_address(page);
461 unsigned end = start + size;
463 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
465 flush_tlb_kernel_range(start, end);
468 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
469 pgprot_t prot, struct page **ret_page,
474 page = __dma_alloc_buffer(dev, size, gfp);
478 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
480 __dma_free_buffer(page, size);
488 static void *__alloc_from_pool(size_t size, struct page **ret_page)
490 struct dma_pool *pool = &atomic_pool;
491 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
495 unsigned long align_mask;
498 WARN(1, "coherent pool not initialised!\n");
503 * Align the region allocation - allocations from pool are rather
504 * small, so align them to their order in pages, minimum is a page
505 * size. This helps reduce fragmentation of the DMA space.
507 align_mask = (1 << get_order(size)) - 1;
509 spin_lock_irqsave(&pool->lock, flags);
510 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
511 0, count, align_mask);
512 if (pageno < pool->nr_pages) {
513 bitmap_set(pool->bitmap, pageno, count);
514 ptr = pool->vaddr + PAGE_SIZE * pageno;
515 *ret_page = pool->pages[pageno];
517 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
518 "Please increase it with coherent_pool= kernel parameter!\n",
519 (unsigned)pool->size / 1024);
521 spin_unlock_irqrestore(&pool->lock, flags);
526 static bool __in_atomic_pool(void *start, size_t size)
528 struct dma_pool *pool = &atomic_pool;
529 void *end = start + size;
530 void *pool_start = pool->vaddr;
531 void *pool_end = pool->vaddr + pool->size;
533 if (start < pool_start || start >= pool_end)
539 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
540 start, end - 1, pool_start, pool_end - 1);
545 static int __free_from_pool(void *start, size_t size)
547 struct dma_pool *pool = &atomic_pool;
548 unsigned long pageno, count;
551 if (!__in_atomic_pool(start, size))
554 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
555 count = size >> PAGE_SHIFT;
557 spin_lock_irqsave(&pool->lock, flags);
558 bitmap_clear(pool->bitmap, pageno, count);
559 spin_unlock_irqrestore(&pool->lock, flags);
564 static void *__alloc_from_contiguous(struct device *dev, size_t size,
565 pgprot_t prot, struct page **ret_page,
566 #ifdef CONFIG_ARCH_ROCKCHIP
567 struct dma_attrs *attrs,
571 unsigned long order = get_order(size);
572 size_t count = size >> PAGE_SHIFT;
576 page = dma_alloc_from_contiguous(dev, count, order);
580 __dma_clear_buffer(page, size);
582 #ifdef CONFIG_ARCH_ROCKCHIP
583 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
584 return (*ret_page=page);
587 if (PageHighMem(page)) {
588 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
590 dma_release_from_contiguous(dev, page, count);
594 __dma_remap(page, size, prot);
595 ptr = page_address(page);
601 #ifdef CONFIG_ARCH_ROCKCHIP
602 static void __free_from_contiguous(struct device *dev, struct page *page,
603 void *cpu_addr, size_t size,
604 struct dma_attrs *attrs)
606 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
607 if (PageHighMem(page))
608 __dma_free_remap(cpu_addr, size);
610 __dma_remap(page, size, pgprot_kernel);
612 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
615 static void __free_from_contiguous(struct device *dev, struct page *page,
616 void *cpu_addr, size_t size)
618 if (PageHighMem(page))
619 __dma_free_remap(cpu_addr, size);
621 __dma_remap(page, size, pgprot_kernel);
622 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
626 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
628 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
629 pgprot_writecombine(prot) :
630 pgprot_dmacoherent(prot);
636 #else /* !CONFIG_MMU */
640 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
641 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
642 #define __alloc_from_pool(size, ret_page) NULL
643 #ifdef CONFIG_ARCH_ROCKCHIP
644 #define __alloc_from_contiguous(dev, size, prot, ret, attrs, c) NULL
646 #define __alloc_from_contiguous(dev, size, prot, ret, c) NULL
648 #define __free_from_pool(cpu_addr, size) 0
649 #ifdef CONFIG_ARCH_ROCKCHIP
650 #define __free_from_contiguous(dev, page, cpu_addr, size, attrs) do { } while (0)
652 #define __free_from_contiguous(dev, page, cpu_addr, size) do { } while (0)
654 #define __dma_free_remap(cpu_addr, size) do { } while (0)
656 #endif /* CONFIG_MMU */
658 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
659 struct page **ret_page)
662 page = __dma_alloc_buffer(dev, size, gfp);
667 return page_address(page);
672 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
673 #ifdef CONFIG_ARCH_ROCKCHIP
674 gfp_t gfp, pgprot_t prot, bool is_coherent,
675 struct dma_attrs *attrs, const void *caller)
677 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
680 u64 mask = get_coherent_dma_mask(dev);
681 struct page *page = NULL;
684 #ifdef CONFIG_DMA_API_DEBUG
685 u64 limit = (mask + 1) & ~mask;
686 if (limit && size >= limit) {
687 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
696 if (mask < 0xffffffffULL)
700 * Following is a work-around (a.k.a. hack) to prevent pages
701 * with __GFP_COMP being passed to split_page() which cannot
702 * handle them. The real problem is that this flag probably
703 * should be 0 on ARM as it is not supported on this
704 * platform; see CONFIG_HUGETLBFS.
706 gfp &= ~(__GFP_COMP);
708 *handle = DMA_ERROR_CODE;
709 size = PAGE_ALIGN(size);
711 if (is_coherent || nommu())
712 addr = __alloc_simple_buffer(dev, size, gfp, &page);
713 else if (!(gfp & __GFP_WAIT))
714 addr = __alloc_from_pool(size, &page);
715 else if (!IS_ENABLED(CONFIG_DMA_CMA))
716 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
718 #ifdef CONFIG_ARCH_ROCKCHIP
719 addr = __alloc_from_contiguous(dev, size, prot, &page, attrs, caller);
721 addr = __alloc_from_contiguous(dev, size, prot, &page, caller);
725 *handle = pfn_to_dma(dev, page_to_pfn(page));
731 * Allocate DMA-coherent memory space and return both the kernel remapped
732 * virtual and bus address for that space.
734 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
735 gfp_t gfp, struct dma_attrs *attrs)
737 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
740 if (dma_alloc_from_coherent(dev, size, handle, &memory))
743 return __dma_alloc(dev, size, handle, gfp, prot, false,
744 #ifdef CONFIG_ARCH_ROCKCHIP
747 __builtin_return_address(0));
750 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
751 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
753 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
756 if (dma_alloc_from_coherent(dev, size, handle, &memory))
759 return __dma_alloc(dev, size, handle, gfp, prot, true,
760 #ifdef CONFIG_ARCH_ROCKCHIP
763 __builtin_return_address(0));
767 * Create userspace mapping for the DMA-coherent memory.
769 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
770 void *cpu_addr, dma_addr_t dma_addr, size_t size,
771 struct dma_attrs *attrs)
775 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
776 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
777 unsigned long pfn = dma_to_pfn(dev, dma_addr);
778 unsigned long off = vma->vm_pgoff;
780 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
782 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
785 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
786 ret = remap_pfn_range(vma, vma->vm_start,
788 vma->vm_end - vma->vm_start,
791 #endif /* CONFIG_MMU */
797 * Free a buffer as defined by the above mapping.
799 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
800 dma_addr_t handle, struct dma_attrs *attrs,
803 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
805 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
808 size = PAGE_ALIGN(size);
810 if (is_coherent || nommu()) {
811 __dma_free_buffer(page, size);
812 } else if (__free_from_pool(cpu_addr, size)) {
814 } else if (!IS_ENABLED(CONFIG_DMA_CMA)) {
815 __dma_free_remap(cpu_addr, size);
816 __dma_free_buffer(page, size);
819 * Non-atomic allocations cannot be freed with IRQs disabled
821 WARN_ON(irqs_disabled());
822 #ifdef CONFIG_ARCH_ROCKCHIP
823 __free_from_contiguous(dev, page, cpu_addr, size, attrs);
825 __free_from_contiguous(dev, page, cpu_addr, size);
830 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
831 dma_addr_t handle, struct dma_attrs *attrs)
833 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
836 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
837 dma_addr_t handle, struct dma_attrs *attrs)
839 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
842 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
843 void *cpu_addr, dma_addr_t handle, size_t size,
844 struct dma_attrs *attrs)
846 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
849 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
853 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
857 static void dma_cache_maint_page(struct page *page, unsigned long offset,
858 size_t size, enum dma_data_direction dir,
859 void (*op)(const void *, size_t, int))
864 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
868 * A single sg entry may refer to multiple physically contiguous
869 * pages. But we still need to process highmem pages individually.
870 * If highmem is not configured then the bulk of this loop gets
877 page = pfn_to_page(pfn);
879 if (PageHighMem(page)) {
880 if (len + offset > PAGE_SIZE)
881 len = PAGE_SIZE - offset;
883 if (cache_is_vipt_nonaliasing()) {
884 vaddr = kmap_atomic(page);
885 op(vaddr + offset, len, dir);
886 kunmap_atomic(vaddr);
888 vaddr = kmap_high_get(page);
890 op(vaddr + offset, len, dir);
895 vaddr = page_address(page) + offset;
905 * Make an area consistent for devices.
906 * Note: Drivers should NOT use this function directly, as it will break
907 * platforms with CONFIG_DMABOUNCE.
908 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
910 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
911 size_t size, enum dma_data_direction dir)
915 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
917 paddr = page_to_phys(page) + off;
918 if (dir == DMA_FROM_DEVICE) {
919 outer_inv_range(paddr, paddr + size);
921 outer_clean_range(paddr, paddr + size);
923 /* FIXME: non-speculating: flush on bidirectional mappings? */
926 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
927 size_t size, enum dma_data_direction dir)
929 unsigned long paddr = page_to_phys(page) + off;
931 /* FIXME: non-speculating: not required */
932 /* don't bother invalidating if DMA to device */
933 if (dir != DMA_TO_DEVICE)
934 outer_inv_range(paddr, paddr + size);
936 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
939 * Mark the D-cache clean for this page to avoid extra flushing.
941 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
942 set_bit(PG_dcache_clean, &page->flags);
946 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
947 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
948 * @sg: list of buffers
949 * @nents: number of buffers to map
950 * @dir: DMA transfer direction
952 * Map a set of buffers described by scatterlist in streaming mode for DMA.
953 * This is the scatter-gather version of the dma_map_single interface.
954 * Here the scatter gather list elements are each tagged with the
955 * appropriate dma address and length. They are obtained via
956 * sg_dma_{address,length}.
958 * Device ownership issues as mentioned for dma_map_single are the same
961 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
962 enum dma_data_direction dir, struct dma_attrs *attrs)
964 struct dma_map_ops *ops = get_dma_ops(dev);
965 struct scatterlist *s;
968 for_each_sg(sg, s, nents, i) {
969 #ifdef CONFIG_NEED_SG_DMA_LENGTH
970 s->dma_length = s->length;
972 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
973 s->length, dir, attrs);
974 if (dma_mapping_error(dev, s->dma_address))
980 for_each_sg(sg, s, i, j)
981 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
986 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
987 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
988 * @sg: list of buffers
989 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
990 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
992 * Unmap a set of streaming mode DMA translations. Again, CPU access
993 * rules concerning calls here are the same as for dma_unmap_single().
995 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
996 enum dma_data_direction dir, struct dma_attrs *attrs)
998 struct dma_map_ops *ops = get_dma_ops(dev);
999 struct scatterlist *s;
1003 for_each_sg(sg, s, nents, i)
1004 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1008 * arm_dma_sync_sg_for_cpu
1009 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1010 * @sg: list of buffers
1011 * @nents: number of buffers to map (returned from dma_map_sg)
1012 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1014 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1015 int nents, enum dma_data_direction dir)
1017 struct dma_map_ops *ops = get_dma_ops(dev);
1018 struct scatterlist *s;
1021 for_each_sg(sg, s, nents, i)
1022 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1027 * arm_dma_sync_sg_for_device
1028 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1029 * @sg: list of buffers
1030 * @nents: number of buffers to map (returned from dma_map_sg)
1031 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1033 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1034 int nents, enum dma_data_direction dir)
1036 struct dma_map_ops *ops = get_dma_ops(dev);
1037 struct scatterlist *s;
1040 for_each_sg(sg, s, nents, i)
1041 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1046 * Return whether the given device DMA address mask can be supported
1047 * properly. For example, if your device can only drive the low 24-bits
1048 * during bus mastering, then you would pass 0x00ffffff as the mask
1051 int dma_supported(struct device *dev, u64 mask)
1053 if (mask < (u64)arm_dma_limit)
1057 EXPORT_SYMBOL(dma_supported);
1059 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
1061 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
1064 *dev->dma_mask = dma_mask;
1069 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1071 static int __init dma_debug_do_init(void)
1073 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1076 fs_initcall(dma_debug_do_init);
1078 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1082 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1085 unsigned int order = get_order(size);
1086 unsigned int align = 0;
1087 unsigned int count, start;
1088 unsigned long flags;
1090 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1091 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1093 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1094 (1 << mapping->order) - 1) >> mapping->order;
1096 if (order > mapping->order)
1097 align = (1 << (order - mapping->order)) - 1;
1099 spin_lock_irqsave(&mapping->lock, flags);
1100 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1102 if (start > mapping->bits) {
1103 spin_unlock_irqrestore(&mapping->lock, flags);
1104 return DMA_ERROR_CODE;
1107 bitmap_set(mapping->bitmap, start, count);
1108 spin_unlock_irqrestore(&mapping->lock, flags);
1110 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1113 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1114 dma_addr_t addr, size_t size)
1116 unsigned int start = (addr - mapping->base) >>
1117 (mapping->order + PAGE_SHIFT);
1118 unsigned int count = ((size >> PAGE_SHIFT) +
1119 (1 << mapping->order) - 1) >> mapping->order;
1120 unsigned long flags;
1122 spin_lock_irqsave(&mapping->lock, flags);
1123 bitmap_clear(mapping->bitmap, start, count);
1124 spin_unlock_irqrestore(&mapping->lock, flags);
1127 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1128 gfp_t gfp, struct dma_attrs *attrs)
1130 struct page **pages;
1131 int count = size >> PAGE_SHIFT;
1132 int array_size = count * sizeof(struct page *);
1135 if (array_size <= PAGE_SIZE)
1136 pages = kzalloc(array_size, gfp);
1138 pages = vzalloc(array_size);
1142 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1144 unsigned long order = get_order(size);
1147 page = dma_alloc_from_contiguous(dev, count, order);
1151 __dma_clear_buffer(page, size);
1153 for (i = 0; i < count; i++)
1154 pages[i] = page + i;
1160 * IOMMU can map any pages, so himem can also be used here
1162 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1165 int j, order = __fls(count);
1167 pages[i] = alloc_pages(gfp, order);
1168 while (!pages[i] && order)
1169 pages[i] = alloc_pages(gfp, --order);
1174 split_page(pages[i], order);
1177 pages[i + j] = pages[i] + j;
1180 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1182 count -= 1 << order;
1189 __free_pages(pages[i], 0);
1190 if (array_size <= PAGE_SIZE)
1197 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1198 size_t size, struct dma_attrs *attrs)
1200 int count = size >> PAGE_SHIFT;
1201 int array_size = count * sizeof(struct page *);
1204 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1205 dma_release_from_contiguous(dev, pages[0], count);
1207 for (i = 0; i < count; i++)
1209 __free_pages(pages[i], 0);
1212 if (array_size <= PAGE_SIZE)
1220 * Create a CPU mapping for a specified pages
1223 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1226 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1227 struct vm_struct *area;
1230 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1235 area->pages = pages;
1236 area->nr_pages = nr_pages;
1237 p = (unsigned long)area->addr;
1239 for (i = 0; i < nr_pages; i++) {
1240 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1241 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1247 unmap_kernel_range((unsigned long)area->addr, size);
1253 * Create a mapping in device IO address space for specified pages
1256 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1258 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1259 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1260 dma_addr_t dma_addr, iova;
1261 int i, ret = DMA_ERROR_CODE;
1263 dma_addr = __alloc_iova(mapping, size);
1264 if (dma_addr == DMA_ERROR_CODE)
1268 for (i = 0; i < count; ) {
1269 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1270 phys_addr_t phys = page_to_phys(pages[i]);
1271 unsigned int len, j;
1273 for (j = i + 1; j < count; j++, next_pfn++)
1274 if (page_to_pfn(pages[j]) != next_pfn)
1277 len = (j - i) << PAGE_SHIFT;
1278 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1286 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1287 __free_iova(mapping, dma_addr, size);
1288 return DMA_ERROR_CODE;
1291 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1293 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1296 * add optional in-page offset from iova to size and align
1297 * result to page size
1299 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1302 iommu_unmap(mapping->domain, iova, size);
1303 __free_iova(mapping, iova, size);
1307 static struct page **__atomic_get_pages(void *addr)
1309 struct dma_pool *pool = &atomic_pool;
1310 struct page **pages = pool->pages;
1311 int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1313 return pages + offs;
1316 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1318 struct vm_struct *area;
1320 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1321 return __atomic_get_pages(cpu_addr);
1323 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1326 area = find_vm_area(cpu_addr);
1327 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1332 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1338 addr = __alloc_from_pool(size, &page);
1342 *handle = __iommu_create_mapping(dev, &page, size);
1343 if (*handle == DMA_ERROR_CODE)
1349 __free_from_pool(addr, size);
1353 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1354 dma_addr_t handle, size_t size)
1356 __iommu_remove_mapping(dev, handle, size);
1357 __free_from_pool(cpu_addr, size);
1360 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1361 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1363 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1364 struct page **pages;
1367 *handle = DMA_ERROR_CODE;
1368 size = PAGE_ALIGN(size);
1370 if (!(gfp & __GFP_WAIT))
1371 return __iommu_alloc_atomic(dev, size, handle);
1373 pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1377 *handle = __iommu_create_mapping(dev, pages, size);
1378 if (*handle == DMA_ERROR_CODE)
1381 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1384 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1385 __builtin_return_address(0));
1392 __iommu_remove_mapping(dev, *handle, size);
1394 __iommu_free_buffer(dev, pages, size, attrs);
1398 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1399 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1400 struct dma_attrs *attrs)
1402 unsigned long uaddr = vma->vm_start;
1403 unsigned long usize = vma->vm_end - vma->vm_start;
1404 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1406 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1412 int ret = vm_insert_page(vma, uaddr, *pages++);
1414 pr_err("Remapping memory failed: %d\n", ret);
1419 } while (usize > 0);
1425 * free a page as defined by the above mapping.
1426 * Must not be called with IRQs disabled.
1428 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1429 dma_addr_t handle, struct dma_attrs *attrs)
1431 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1432 size = PAGE_ALIGN(size);
1435 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1439 if (__in_atomic_pool(cpu_addr, size)) {
1440 __iommu_free_atomic(dev, cpu_addr, handle, size);
1444 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1445 unmap_kernel_range((unsigned long)cpu_addr, size);
1449 __iommu_remove_mapping(dev, handle, size);
1450 __iommu_free_buffer(dev, pages, size, attrs);
1453 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1454 void *cpu_addr, dma_addr_t dma_addr,
1455 size_t size, struct dma_attrs *attrs)
1457 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1458 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1463 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1468 * Map a part of the scatter-gather list into contiguous io address space
1470 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1471 size_t size, dma_addr_t *handle,
1472 enum dma_data_direction dir, struct dma_attrs *attrs,
1475 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1476 dma_addr_t iova, iova_base;
1479 struct scatterlist *s;
1481 size = PAGE_ALIGN(size);
1482 *handle = DMA_ERROR_CODE;
1484 iova_base = iova = __alloc_iova(mapping, size);
1485 if (iova == DMA_ERROR_CODE)
1488 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1489 phys_addr_t phys = page_to_phys(sg_page(s));
1490 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1493 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1494 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1496 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1499 count += len >> PAGE_SHIFT;
1502 *handle = iova_base;
1506 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1507 __free_iova(mapping, iova_base, size);
1511 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1512 enum dma_data_direction dir, struct dma_attrs *attrs,
1515 struct scatterlist *s = sg, *dma = sg, *start = sg;
1517 unsigned int offset = s->offset;
1518 unsigned int size = s->offset + s->length;
1519 unsigned int max = dma_get_max_seg_size(dev);
1521 for (i = 1; i < nents; i++) {
1524 s->dma_address = DMA_ERROR_CODE;
1527 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1528 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1529 dir, attrs, is_coherent) < 0)
1532 dma->dma_address += offset;
1533 dma->dma_length = size - offset;
1535 size = offset = s->offset;
1542 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1546 dma->dma_address += offset;
1547 dma->dma_length = size - offset;
1552 for_each_sg(sg, s, count, i)
1553 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1558 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1559 * @dev: valid struct device pointer
1560 * @sg: list of buffers
1561 * @nents: number of buffers to map
1562 * @dir: DMA transfer direction
1564 * Map a set of i/o coherent buffers described by scatterlist in streaming
1565 * mode for DMA. The scatter gather list elements are merged together (if
1566 * possible) and tagged with the appropriate dma address and length. They are
1567 * obtained via sg_dma_{address,length}.
1569 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1570 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1572 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1576 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1577 * @dev: valid struct device pointer
1578 * @sg: list of buffers
1579 * @nents: number of buffers to map
1580 * @dir: DMA transfer direction
1582 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1583 * The scatter gather list elements are merged together (if possible) and
1584 * tagged with the appropriate dma address and length. They are obtained via
1585 * sg_dma_{address,length}.
1587 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1588 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1590 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1593 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1594 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1597 struct scatterlist *s;
1600 for_each_sg(sg, s, nents, i) {
1602 __iommu_remove_mapping(dev, sg_dma_address(s),
1605 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1606 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1612 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1613 * @dev: valid struct device pointer
1614 * @sg: list of buffers
1615 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1616 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1618 * Unmap a set of streaming mode DMA translations. Again, CPU access
1619 * rules concerning calls here are the same as for dma_unmap_single().
1621 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1622 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1624 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1628 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1629 * @dev: valid struct device pointer
1630 * @sg: list of buffers
1631 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1632 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1634 * Unmap a set of streaming mode DMA translations. Again, CPU access
1635 * rules concerning calls here are the same as for dma_unmap_single().
1637 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1638 enum dma_data_direction dir, struct dma_attrs *attrs)
1640 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1644 * arm_iommu_sync_sg_for_cpu
1645 * @dev: valid struct device pointer
1646 * @sg: list of buffers
1647 * @nents: number of buffers to map (returned from dma_map_sg)
1648 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1650 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1651 int nents, enum dma_data_direction dir)
1653 struct scatterlist *s;
1656 for_each_sg(sg, s, nents, i)
1657 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1662 * arm_iommu_sync_sg_for_device
1663 * @dev: valid struct device pointer
1664 * @sg: list of buffers
1665 * @nents: number of buffers to map (returned from dma_map_sg)
1666 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1668 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1669 int nents, enum dma_data_direction dir)
1671 struct scatterlist *s;
1674 for_each_sg(sg, s, nents, i)
1675 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1680 * arm_coherent_iommu_map_page
1681 * @dev: valid struct device pointer
1682 * @page: page that buffer resides in
1683 * @offset: offset into page for start of buffer
1684 * @size: size of buffer to map
1685 * @dir: DMA transfer direction
1687 * Coherent IOMMU aware version of arm_dma_map_page()
1689 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1690 unsigned long offset, size_t size, enum dma_data_direction dir,
1691 struct dma_attrs *attrs)
1693 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1694 dma_addr_t dma_addr;
1695 int ret, len = PAGE_ALIGN(size + offset);
1697 dma_addr = __alloc_iova(mapping, len);
1698 if (dma_addr == DMA_ERROR_CODE)
1701 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1705 return dma_addr + offset;
1707 __free_iova(mapping, dma_addr, len);
1708 return DMA_ERROR_CODE;
1712 * arm_iommu_map_page
1713 * @dev: valid struct device pointer
1714 * @page: page that buffer resides in
1715 * @offset: offset into page for start of buffer
1716 * @size: size of buffer to map
1717 * @dir: DMA transfer direction
1719 * IOMMU aware version of arm_dma_map_page()
1721 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1722 unsigned long offset, size_t size, enum dma_data_direction dir,
1723 struct dma_attrs *attrs)
1725 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1726 __dma_page_cpu_to_dev(page, offset, size, dir);
1728 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1732 * arm_coherent_iommu_unmap_page
1733 * @dev: valid struct device pointer
1734 * @handle: DMA address of buffer
1735 * @size: size of buffer (same as passed to dma_map_page)
1736 * @dir: DMA transfer direction (same as passed to dma_map_page)
1738 * Coherent IOMMU aware version of arm_dma_unmap_page()
1740 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1741 size_t size, enum dma_data_direction dir,
1742 struct dma_attrs *attrs)
1744 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1745 dma_addr_t iova = handle & PAGE_MASK;
1746 int offset = handle & ~PAGE_MASK;
1747 int len = PAGE_ALIGN(size + offset);
1752 iommu_unmap(mapping->domain, iova, len);
1753 __free_iova(mapping, iova, len);
1757 * arm_iommu_unmap_page
1758 * @dev: valid struct device pointer
1759 * @handle: DMA address of buffer
1760 * @size: size of buffer (same as passed to dma_map_page)
1761 * @dir: DMA transfer direction (same as passed to dma_map_page)
1763 * IOMMU aware version of arm_dma_unmap_page()
1765 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1766 size_t size, enum dma_data_direction dir,
1767 struct dma_attrs *attrs)
1769 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1770 dma_addr_t iova = handle & PAGE_MASK;
1771 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1772 int offset = handle & ~PAGE_MASK;
1773 int len = PAGE_ALIGN(size + offset);
1778 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1779 __dma_page_dev_to_cpu(page, offset, size, dir);
1781 iommu_unmap(mapping->domain, iova, len);
1782 __free_iova(mapping, iova, len);
1785 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1786 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1788 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1789 dma_addr_t iova = handle & PAGE_MASK;
1790 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1791 unsigned int offset = handle & ~PAGE_MASK;
1796 __dma_page_dev_to_cpu(page, offset, size, dir);
1799 static void arm_iommu_sync_single_for_device(struct device *dev,
1800 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1802 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1803 dma_addr_t iova = handle & PAGE_MASK;
1804 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1805 unsigned int offset = handle & ~PAGE_MASK;
1810 __dma_page_cpu_to_dev(page, offset, size, dir);
1813 struct dma_map_ops iommu_ops = {
1814 .alloc = arm_iommu_alloc_attrs,
1815 .free = arm_iommu_free_attrs,
1816 .mmap = arm_iommu_mmap_attrs,
1817 .get_sgtable = arm_iommu_get_sgtable,
1819 .map_page = arm_iommu_map_page,
1820 .unmap_page = arm_iommu_unmap_page,
1821 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1822 .sync_single_for_device = arm_iommu_sync_single_for_device,
1824 .map_sg = arm_iommu_map_sg,
1825 .unmap_sg = arm_iommu_unmap_sg,
1826 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1827 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1829 .set_dma_mask = arm_dma_set_mask,
1832 struct dma_map_ops iommu_coherent_ops = {
1833 .alloc = arm_iommu_alloc_attrs,
1834 .free = arm_iommu_free_attrs,
1835 .mmap = arm_iommu_mmap_attrs,
1836 .get_sgtable = arm_iommu_get_sgtable,
1838 .map_page = arm_coherent_iommu_map_page,
1839 .unmap_page = arm_coherent_iommu_unmap_page,
1841 .map_sg = arm_coherent_iommu_map_sg,
1842 .unmap_sg = arm_coherent_iommu_unmap_sg,
1844 .set_dma_mask = arm_dma_set_mask,
1848 * arm_iommu_create_mapping
1849 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1850 * @base: start address of the valid IO address space
1851 * @size: size of the valid IO address space
1852 * @order: accuracy of the IO addresses allocations
1854 * Creates a mapping structure which holds information about used/unused
1855 * IO address ranges, which is required to perform memory allocation and
1856 * mapping with IOMMU aware functions.
1858 * The client device need to be attached to the mapping with
1859 * arm_iommu_attach_device function.
1861 struct dma_iommu_mapping *
1862 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1865 unsigned int count = size >> (PAGE_SHIFT + order);
1866 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1867 struct dma_iommu_mapping *mapping;
1871 return ERR_PTR(-EINVAL);
1873 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1877 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1878 if (!mapping->bitmap)
1881 mapping->base = base;
1882 mapping->bits = BITS_PER_BYTE * bitmap_size;
1883 mapping->order = order;
1884 spin_lock_init(&mapping->lock);
1886 mapping->domain = iommu_domain_alloc(bus);
1887 if (!mapping->domain)
1890 kref_init(&mapping->kref);
1893 kfree(mapping->bitmap);
1897 return ERR_PTR(err);
1899 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1901 static void release_iommu_mapping(struct kref *kref)
1903 struct dma_iommu_mapping *mapping =
1904 container_of(kref, struct dma_iommu_mapping, kref);
1906 iommu_domain_free(mapping->domain);
1907 kfree(mapping->bitmap);
1911 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1914 kref_put(&mapping->kref, release_iommu_mapping);
1916 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1919 * arm_iommu_attach_device
1920 * @dev: valid struct device pointer
1921 * @mapping: io address space mapping structure (returned from
1922 * arm_iommu_create_mapping)
1924 * Attaches specified io address space mapping to the provided device,
1925 * this replaces the dma operations (dma_map_ops pointer) with the
1926 * IOMMU aware version. More than one client might be attached to
1927 * the same io address space mapping.
1929 int arm_iommu_attach_device(struct device *dev,
1930 struct dma_iommu_mapping *mapping)
1934 err = iommu_attach_device(mapping->domain, dev);
1938 kref_get(&mapping->kref);
1939 dev->archdata.mapping = mapping;
1940 set_dma_ops(dev, &iommu_ops);
1942 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1945 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1948 * arm_iommu_detach_device
1949 * @dev: valid struct device pointer
1951 * Detaches the provided device from a previously attached map.
1952 * This voids the dma operations (dma_map_ops pointer)
1954 void arm_iommu_detach_device(struct device *dev)
1956 struct dma_iommu_mapping *mapping;
1958 mapping = to_dma_iommu_mapping(dev);
1960 dev_warn(dev, "Not attached\n");
1964 iommu_detach_device(mapping->domain, dev);
1965 kref_put(&mapping->kref, release_iommu_mapping);
1967 set_dma_ops(dev, NULL);
1969 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1971 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);