2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
82 unsigned long offset, size_t size, enum dma_data_direction dir,
83 struct dma_attrs *attrs)
85 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
89 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
90 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
91 * @handle: DMA address of buffer
92 * @size: size of buffer (same as passed to dma_map_page)
93 * @dir: DMA transfer direction (same as passed to dma_map_page)
95 * Unmap a page streaming mode DMA translation. The handle and size
96 * must match what was provided in the previous dma_map_page() call.
97 * All other usages are undefined.
99 * After this call, reads by the CPU to the buffer are guaranteed to see
100 * whatever the device wrote there.
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103 size_t size, enum dma_data_direction dir,
104 struct dma_attrs *attrs)
106 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108 handle & ~PAGE_MASK, size, dir);
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112 dma_addr_t handle, size_t size, enum dma_data_direction dir)
114 unsigned int offset = handle & (PAGE_SIZE - 1);
115 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116 __dma_page_dev_to_cpu(page, offset, size, dir);
119 static void arm_dma_sync_single_for_device(struct device *dev,
120 dma_addr_t handle, size_t size, enum dma_data_direction dir)
122 unsigned int offset = handle & (PAGE_SIZE - 1);
123 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124 __dma_page_cpu_to_dev(page, offset, size, dir);
127 struct dma_map_ops arm_dma_ops = {
128 .alloc = arm_dma_alloc,
129 .free = arm_dma_free,
130 .mmap = arm_dma_mmap,
131 .get_sgtable = arm_dma_get_sgtable,
132 .map_page = arm_dma_map_page,
133 .unmap_page = arm_dma_unmap_page,
134 .map_sg = arm_dma_map_sg,
135 .unmap_sg = arm_dma_unmap_sg,
136 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
137 .sync_single_for_device = arm_dma_sync_single_for_device,
138 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
139 .sync_sg_for_device = arm_dma_sync_sg_for_device,
140 .set_dma_mask = arm_dma_set_mask,
142 EXPORT_SYMBOL(arm_dma_ops);
144 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
145 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
146 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
147 dma_addr_t handle, struct dma_attrs *attrs);
149 struct dma_map_ops arm_coherent_dma_ops = {
150 .alloc = arm_coherent_dma_alloc,
151 .free = arm_coherent_dma_free,
152 .mmap = arm_dma_mmap,
153 .get_sgtable = arm_dma_get_sgtable,
154 .map_page = arm_coherent_dma_map_page,
155 .map_sg = arm_dma_map_sg,
156 .set_dma_mask = arm_dma_set_mask,
158 EXPORT_SYMBOL(arm_coherent_dma_ops);
160 static u64 get_coherent_dma_mask(struct device *dev)
162 u64 mask = (u64)arm_dma_limit;
165 mask = dev->coherent_dma_mask;
168 * Sanity check the DMA mask - it must be non-zero, and
169 * must be able to be satisfied by a DMA allocation.
172 dev_warn(dev, "coherent DMA mask is unset\n");
176 if ((~mask) & (u64)arm_dma_limit) {
177 dev_warn(dev, "coherent DMA mask %#llx is smaller "
178 "than system GFP_DMA mask %#llx\n",
179 mask, (u64)arm_dma_limit);
187 static void __dma_clear_buffer(struct page *page, size_t size)
190 * Ensure that the allocated pages are zeroed, and that any data
191 * lurking in the kernel direct-mapped region is invalidated.
193 if (PageHighMem(page)) {
194 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
195 phys_addr_t end = base + size;
197 void *ptr = kmap_atomic(page);
198 memset(ptr, 0, PAGE_SIZE);
199 dmac_flush_range(ptr, ptr + PAGE_SIZE);
204 outer_flush_range(base, end);
206 void *ptr = page_address(page);
207 memset(ptr, 0, size);
208 dmac_flush_range(ptr, ptr + size);
209 outer_flush_range(__pa(ptr), __pa(ptr) + size);
214 * Allocate a DMA buffer for 'dev' of size 'size' using the
215 * specified gfp mask. Note that 'size' must be page aligned.
217 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
219 unsigned long order = get_order(size);
220 struct page *page, *p, *e;
222 page = alloc_pages(gfp, order);
227 * Now split the huge page and free the excess pages
229 split_page(page, order);
230 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
233 __dma_clear_buffer(page, size);
239 * Free a DMA buffer. 'size' must be page aligned.
241 static void __dma_free_buffer(struct page *page, size_t size)
243 struct page *e = page + (size >> PAGE_SHIFT);
252 #ifdef CONFIG_HUGETLB_PAGE
253 #warning ARM Coherent DMA allocator does not (yet) support huge TLB
256 static void *__alloc_from_contiguous(struct device *dev, size_t size,
257 pgprot_t prot, struct page **ret_page,
260 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
261 pgprot_t prot, struct page **ret_page,
265 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
269 * DMA allocation can be mapped to user space, so lets
270 * set VM_USERMAP flags too.
272 return dma_common_contiguous_remap(page, size,
273 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
277 static void __dma_free_remap(void *cpu_addr, size_t size)
279 dma_common_free_remap(cpu_addr, size,
280 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
283 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
288 unsigned long *bitmap;
289 unsigned long nr_pages;
294 static struct dma_pool atomic_pool = {
295 .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
298 static int __init early_coherent_pool(char *p)
300 atomic_pool.size = memparse(p, &p);
303 early_param("coherent_pool", early_coherent_pool);
305 void __init init_dma_coherent_pool_size(unsigned long size)
308 * Catch any attempt to set the pool size too late.
310 BUG_ON(atomic_pool.vaddr);
313 * Set architecture specific coherent pool size only if
314 * it has not been changed by kernel command line parameter.
316 if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
317 atomic_pool.size = size;
321 * Initialise the coherent pool for atomic allocations.
323 static int __init atomic_pool_init(void)
325 struct dma_pool *pool = &atomic_pool;
326 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
327 gfp_t gfp = GFP_KERNEL | GFP_DMA;
328 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
329 unsigned long *bitmap;
333 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
335 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
339 pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
343 if (IS_ENABLED(CONFIG_DMA_CMA))
344 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
347 ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
352 for (i = 0; i < nr_pages; i++)
355 spin_lock_init(&pool->lock);
358 pool->bitmap = bitmap;
359 pool->nr_pages = nr_pages;
360 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
361 (unsigned)pool->size / 1024);
369 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
370 (unsigned)pool->size / 1024);
374 * CMA is activated by core_initcall, so we must be called after it.
376 postcore_initcall(atomic_pool_init);
378 struct dma_contig_early_reserve {
383 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
385 static int dma_mmu_remap_num __initdata;
387 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
389 dma_mmu_remap[dma_mmu_remap_num].base = base;
390 dma_mmu_remap[dma_mmu_remap_num].size = size;
394 void __init dma_contiguous_remap(void)
397 for (i = 0; i < dma_mmu_remap_num; i++) {
398 phys_addr_t start = dma_mmu_remap[i].base;
399 phys_addr_t end = start + dma_mmu_remap[i].size;
403 if (end > arm_lowmem_limit)
404 end = arm_lowmem_limit;
408 map.pfn = __phys_to_pfn(start);
409 map.virtual = __phys_to_virt(start);
410 map.length = end - start;
411 map.type = MT_MEMORY_DMA_READY;
414 * Clear previous low-memory mapping to ensure that the
415 * TLB does not see any conflicting entries, then flush
416 * the TLB of the old entries before creating new mappings.
418 * This ensures that any speculatively loaded TLB entries
419 * (even though they may be rare) can not cause any problems,
420 * and ensures that this code is architecturally compliant.
422 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
424 pmd_clear(pmd_off_k(addr));
426 flush_tlb_kernel_range(__phys_to_virt(start),
427 __phys_to_virt(end));
429 iotable_init(&map, 1);
433 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
436 struct page *page = virt_to_page(addr);
437 pgprot_t prot = *(pgprot_t *)data;
439 set_pte_ext(pte, mk_pte(page, prot), 0);
443 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
445 unsigned long start = (unsigned long) page_address(page);
446 unsigned end = start + size;
448 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
450 flush_tlb_kernel_range(start, end);
453 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
454 pgprot_t prot, struct page **ret_page,
459 page = __dma_alloc_buffer(dev, size, gfp);
463 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
465 __dma_free_buffer(page, size);
473 static void *__alloc_from_pool(size_t size, struct page **ret_page)
475 struct dma_pool *pool = &atomic_pool;
476 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
480 unsigned long align_mask;
483 WARN(1, "coherent pool not initialised!\n");
488 * Align the region allocation - allocations from pool are rather
489 * small, so align them to their order in pages, minimum is a page
490 * size. This helps reduce fragmentation of the DMA space.
492 align_mask = (1 << get_order(size)) - 1;
494 spin_lock_irqsave(&pool->lock, flags);
495 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
496 0, count, align_mask);
497 if (pageno < pool->nr_pages) {
498 bitmap_set(pool->bitmap, pageno, count);
499 ptr = pool->vaddr + PAGE_SIZE * pageno;
500 *ret_page = pool->pages[pageno];
502 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
503 "Please increase it with coherent_pool= kernel parameter!\n",
504 (unsigned)pool->size / 1024);
506 spin_unlock_irqrestore(&pool->lock, flags);
511 static bool __in_atomic_pool(void *start, size_t size)
513 struct dma_pool *pool = &atomic_pool;
514 void *end = start + size;
515 void *pool_start = pool->vaddr;
516 void *pool_end = pool->vaddr + pool->size;
518 if (start < pool_start || start >= pool_end)
524 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
525 start, end - 1, pool_start, pool_end - 1);
530 static int __free_from_pool(void *start, size_t size)
532 struct dma_pool *pool = &atomic_pool;
533 unsigned long pageno, count;
536 if (!__in_atomic_pool(start, size))
539 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
540 count = size >> PAGE_SHIFT;
542 spin_lock_irqsave(&pool->lock, flags);
543 bitmap_clear(pool->bitmap, pageno, count);
544 spin_unlock_irqrestore(&pool->lock, flags);
549 static void *__alloc_from_contiguous(struct device *dev, size_t size,
550 pgprot_t prot, struct page **ret_page,
553 unsigned long order = get_order(size);
554 size_t count = size >> PAGE_SHIFT;
558 page = dma_alloc_from_contiguous(dev, count, order);
562 __dma_clear_buffer(page, size);
564 if (PageHighMem(page)) {
565 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
567 dma_release_from_contiguous(dev, page, count);
571 __dma_remap(page, size, prot);
572 ptr = page_address(page);
578 static void __free_from_contiguous(struct device *dev, struct page *page,
579 void *cpu_addr, size_t size)
581 if (PageHighMem(page))
582 __dma_free_remap(cpu_addr, size);
584 __dma_remap(page, size, pgprot_kernel);
585 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
588 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
590 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
591 pgprot_writecombine(prot) :
592 pgprot_dmacoherent(prot);
598 #else /* !CONFIG_MMU */
602 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
603 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
604 #define __alloc_from_pool(size, ret_page) NULL
605 #define __alloc_from_contiguous(dev, size, prot, ret, c) NULL
606 #define __free_from_pool(cpu_addr, size) 0
607 #define __free_from_contiguous(dev, page, cpu_addr, size) do { } while (0)
608 #define __dma_free_remap(cpu_addr, size) do { } while (0)
610 #endif /* CONFIG_MMU */
612 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
613 struct page **ret_page)
616 page = __dma_alloc_buffer(dev, size, gfp);
621 return page_address(page);
626 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
627 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
629 u64 mask = get_coherent_dma_mask(dev);
630 struct page *page = NULL;
633 #ifdef CONFIG_DMA_API_DEBUG
634 u64 limit = (mask + 1) & ~mask;
635 if (limit && size >= limit) {
636 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
645 if (mask < 0xffffffffULL)
649 * Following is a work-around (a.k.a. hack) to prevent pages
650 * with __GFP_COMP being passed to split_page() which cannot
651 * handle them. The real problem is that this flag probably
652 * should be 0 on ARM as it is not supported on this
653 * platform; see CONFIG_HUGETLBFS.
655 gfp &= ~(__GFP_COMP);
657 *handle = DMA_ERROR_CODE;
658 size = PAGE_ALIGN(size);
660 if (is_coherent || nommu())
661 addr = __alloc_simple_buffer(dev, size, gfp, &page);
662 else if (!(gfp & __GFP_WAIT))
663 addr = __alloc_from_pool(size, &page);
664 else if (!IS_ENABLED(CONFIG_DMA_CMA))
665 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
667 addr = __alloc_from_contiguous(dev, size, prot, &page, caller);
670 *handle = pfn_to_dma(dev, page_to_pfn(page));
676 * Allocate DMA-coherent memory space and return both the kernel remapped
677 * virtual and bus address for that space.
679 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
680 gfp_t gfp, struct dma_attrs *attrs)
682 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
685 if (dma_alloc_from_coherent(dev, size, handle, &memory))
688 return __dma_alloc(dev, size, handle, gfp, prot, false,
689 __builtin_return_address(0));
692 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
693 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
695 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
698 if (dma_alloc_from_coherent(dev, size, handle, &memory))
701 return __dma_alloc(dev, size, handle, gfp, prot, true,
702 __builtin_return_address(0));
706 * Create userspace mapping for the DMA-coherent memory.
708 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
709 void *cpu_addr, dma_addr_t dma_addr, size_t size,
710 struct dma_attrs *attrs)
714 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
715 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
716 unsigned long pfn = dma_to_pfn(dev, dma_addr);
717 unsigned long off = vma->vm_pgoff;
719 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
721 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
724 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
725 ret = remap_pfn_range(vma, vma->vm_start,
727 vma->vm_end - vma->vm_start,
730 #endif /* CONFIG_MMU */
736 * Free a buffer as defined by the above mapping.
738 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
739 dma_addr_t handle, struct dma_attrs *attrs,
742 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
744 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
747 size = PAGE_ALIGN(size);
749 if (is_coherent || nommu()) {
750 __dma_free_buffer(page, size);
751 } else if (__free_from_pool(cpu_addr, size)) {
753 } else if (!IS_ENABLED(CONFIG_DMA_CMA)) {
754 __dma_free_remap(cpu_addr, size);
755 __dma_free_buffer(page, size);
758 * Non-atomic allocations cannot be freed with IRQs disabled
760 WARN_ON(irqs_disabled());
761 __free_from_contiguous(dev, page, cpu_addr, size);
765 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
766 dma_addr_t handle, struct dma_attrs *attrs)
768 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
771 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
772 dma_addr_t handle, struct dma_attrs *attrs)
774 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
777 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
778 void *cpu_addr, dma_addr_t handle, size_t size,
779 struct dma_attrs *attrs)
781 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
784 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
788 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
792 static void dma_cache_maint_page(struct page *page, unsigned long offset,
793 size_t size, enum dma_data_direction dir,
794 void (*op)(const void *, size_t, int))
799 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
803 * A single sg entry may refer to multiple physically contiguous
804 * pages. But we still need to process highmem pages individually.
805 * If highmem is not configured then the bulk of this loop gets
812 page = pfn_to_page(pfn);
814 if (PageHighMem(page)) {
815 if (len + offset > PAGE_SIZE)
816 len = PAGE_SIZE - offset;
818 if (cache_is_vipt_nonaliasing()) {
819 vaddr = kmap_atomic(page);
820 op(vaddr + offset, len, dir);
821 kunmap_atomic(vaddr);
823 vaddr = kmap_high_get(page);
825 op(vaddr + offset, len, dir);
830 vaddr = page_address(page) + offset;
840 * Make an area consistent for devices.
841 * Note: Drivers should NOT use this function directly, as it will break
842 * platforms with CONFIG_DMABOUNCE.
843 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
845 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
846 size_t size, enum dma_data_direction dir)
850 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
852 paddr = page_to_phys(page) + off;
853 if (dir == DMA_FROM_DEVICE) {
854 outer_inv_range(paddr, paddr + size);
856 outer_clean_range(paddr, paddr + size);
858 /* FIXME: non-speculating: flush on bidirectional mappings? */
861 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
862 size_t size, enum dma_data_direction dir)
864 unsigned long paddr = page_to_phys(page) + off;
866 /* FIXME: non-speculating: not required */
867 /* don't bother invalidating if DMA to device */
868 if (dir != DMA_TO_DEVICE)
869 outer_inv_range(paddr, paddr + size);
871 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
874 * Mark the D-cache clean for this page to avoid extra flushing.
876 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
877 set_bit(PG_dcache_clean, &page->flags);
881 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
882 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
883 * @sg: list of buffers
884 * @nents: number of buffers to map
885 * @dir: DMA transfer direction
887 * Map a set of buffers described by scatterlist in streaming mode for DMA.
888 * This is the scatter-gather version of the dma_map_single interface.
889 * Here the scatter gather list elements are each tagged with the
890 * appropriate dma address and length. They are obtained via
891 * sg_dma_{address,length}.
893 * Device ownership issues as mentioned for dma_map_single are the same
896 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
897 enum dma_data_direction dir, struct dma_attrs *attrs)
899 struct dma_map_ops *ops = get_dma_ops(dev);
900 struct scatterlist *s;
903 for_each_sg(sg, s, nents, i) {
904 #ifdef CONFIG_NEED_SG_DMA_LENGTH
905 s->dma_length = s->length;
907 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
908 s->length, dir, attrs);
909 if (dma_mapping_error(dev, s->dma_address))
915 for_each_sg(sg, s, i, j)
916 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
921 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
922 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
923 * @sg: list of buffers
924 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
925 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
927 * Unmap a set of streaming mode DMA translations. Again, CPU access
928 * rules concerning calls here are the same as for dma_unmap_single().
930 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
931 enum dma_data_direction dir, struct dma_attrs *attrs)
933 struct dma_map_ops *ops = get_dma_ops(dev);
934 struct scatterlist *s;
938 for_each_sg(sg, s, nents, i)
939 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
943 * arm_dma_sync_sg_for_cpu
944 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
945 * @sg: list of buffers
946 * @nents: number of buffers to map (returned from dma_map_sg)
947 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
949 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
950 int nents, enum dma_data_direction dir)
952 struct dma_map_ops *ops = get_dma_ops(dev);
953 struct scatterlist *s;
956 for_each_sg(sg, s, nents, i)
957 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
962 * arm_dma_sync_sg_for_device
963 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
964 * @sg: list of buffers
965 * @nents: number of buffers to map (returned from dma_map_sg)
966 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
968 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
969 int nents, enum dma_data_direction dir)
971 struct dma_map_ops *ops = get_dma_ops(dev);
972 struct scatterlist *s;
975 for_each_sg(sg, s, nents, i)
976 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
981 * Return whether the given device DMA address mask can be supported
982 * properly. For example, if your device can only drive the low 24-bits
983 * during bus mastering, then you would pass 0x00ffffff as the mask
986 int dma_supported(struct device *dev, u64 mask)
988 if (mask < (u64)arm_dma_limit)
992 EXPORT_SYMBOL(dma_supported);
994 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
996 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
999 *dev->dma_mask = dma_mask;
1004 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1006 static int __init dma_debug_do_init(void)
1008 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1011 fs_initcall(dma_debug_do_init);
1013 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1017 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1020 unsigned int order = get_order(size);
1021 unsigned int align = 0;
1022 unsigned int count, start;
1023 unsigned long flags;
1025 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1026 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1028 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1029 (1 << mapping->order) - 1) >> mapping->order;
1031 if (order > mapping->order)
1032 align = (1 << (order - mapping->order)) - 1;
1034 spin_lock_irqsave(&mapping->lock, flags);
1035 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1037 if (start > mapping->bits) {
1038 spin_unlock_irqrestore(&mapping->lock, flags);
1039 return DMA_ERROR_CODE;
1042 bitmap_set(mapping->bitmap, start, count);
1043 spin_unlock_irqrestore(&mapping->lock, flags);
1045 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1048 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1049 dma_addr_t addr, size_t size)
1051 unsigned int start = (addr - mapping->base) >>
1052 (mapping->order + PAGE_SHIFT);
1053 unsigned int count = ((size >> PAGE_SHIFT) +
1054 (1 << mapping->order) - 1) >> mapping->order;
1055 unsigned long flags;
1057 spin_lock_irqsave(&mapping->lock, flags);
1058 bitmap_clear(mapping->bitmap, start, count);
1059 spin_unlock_irqrestore(&mapping->lock, flags);
1062 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1063 gfp_t gfp, struct dma_attrs *attrs)
1065 struct page **pages;
1066 int count = size >> PAGE_SHIFT;
1067 int array_size = count * sizeof(struct page *);
1070 if (array_size <= PAGE_SIZE)
1071 pages = kzalloc(array_size, gfp);
1073 pages = vzalloc(array_size);
1077 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1079 unsigned long order = get_order(size);
1082 page = dma_alloc_from_contiguous(dev, count, order);
1086 __dma_clear_buffer(page, size);
1088 for (i = 0; i < count; i++)
1089 pages[i] = page + i;
1095 * IOMMU can map any pages, so himem can also be used here
1097 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1100 int j, order = __fls(count);
1102 pages[i] = alloc_pages(gfp, order);
1103 while (!pages[i] && order)
1104 pages[i] = alloc_pages(gfp, --order);
1109 split_page(pages[i], order);
1112 pages[i + j] = pages[i] + j;
1115 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1117 count -= 1 << order;
1124 __free_pages(pages[i], 0);
1125 if (array_size <= PAGE_SIZE)
1132 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1133 size_t size, struct dma_attrs *attrs)
1135 int count = size >> PAGE_SHIFT;
1136 int array_size = count * sizeof(struct page *);
1139 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1140 dma_release_from_contiguous(dev, pages[0], count);
1142 for (i = 0; i < count; i++)
1144 __free_pages(pages[i], 0);
1147 if (array_size <= PAGE_SIZE)
1155 * Create a CPU mapping for a specified pages
1158 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1161 return dma_common_pages_remap(pages, size,
1162 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1167 * Create a mapping in device IO address space for specified pages
1170 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1172 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1173 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1174 dma_addr_t dma_addr, iova;
1175 int i, ret = DMA_ERROR_CODE;
1177 dma_addr = __alloc_iova(mapping, size);
1178 if (dma_addr == DMA_ERROR_CODE)
1182 for (i = 0; i < count; ) {
1183 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1184 phys_addr_t phys = page_to_phys(pages[i]);
1185 unsigned int len, j;
1187 for (j = i + 1; j < count; j++, next_pfn++)
1188 if (page_to_pfn(pages[j]) != next_pfn)
1191 len = (j - i) << PAGE_SHIFT;
1192 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1200 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1201 __free_iova(mapping, dma_addr, size);
1202 return DMA_ERROR_CODE;
1205 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1207 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1210 * add optional in-page offset from iova to size and align
1211 * result to page size
1213 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1216 iommu_unmap(mapping->domain, iova, size);
1217 __free_iova(mapping, iova, size);
1221 static struct page **__atomic_get_pages(void *addr)
1223 struct dma_pool *pool = &atomic_pool;
1224 struct page **pages = pool->pages;
1225 int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1227 return pages + offs;
1230 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1232 struct vm_struct *area;
1234 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1235 return __atomic_get_pages(cpu_addr);
1237 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1240 area = find_vm_area(cpu_addr);
1241 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1246 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1252 addr = __alloc_from_pool(size, &page);
1256 *handle = __iommu_create_mapping(dev, &page, size);
1257 if (*handle == DMA_ERROR_CODE)
1263 __free_from_pool(addr, size);
1267 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1268 dma_addr_t handle, size_t size)
1270 __iommu_remove_mapping(dev, handle, size);
1271 __free_from_pool(cpu_addr, size);
1274 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1275 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1277 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1278 struct page **pages;
1281 *handle = DMA_ERROR_CODE;
1282 size = PAGE_ALIGN(size);
1284 if (!(gfp & __GFP_WAIT))
1285 return __iommu_alloc_atomic(dev, size, handle);
1287 pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1291 *handle = __iommu_create_mapping(dev, pages, size);
1292 if (*handle == DMA_ERROR_CODE)
1295 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1298 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1299 __builtin_return_address(0));
1306 __iommu_remove_mapping(dev, *handle, size);
1308 __iommu_free_buffer(dev, pages, size, attrs);
1312 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1313 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1314 struct dma_attrs *attrs)
1316 unsigned long uaddr = vma->vm_start;
1317 unsigned long usize = vma->vm_end - vma->vm_start;
1318 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1320 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1326 int ret = vm_insert_page(vma, uaddr, *pages++);
1328 pr_err("Remapping memory failed: %d\n", ret);
1333 } while (usize > 0);
1339 * free a page as defined by the above mapping.
1340 * Must not be called with IRQs disabled.
1342 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1343 dma_addr_t handle, struct dma_attrs *attrs)
1345 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1346 size = PAGE_ALIGN(size);
1349 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1353 if (__in_atomic_pool(cpu_addr, size)) {
1354 __iommu_free_atomic(dev, cpu_addr, handle, size);
1358 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1359 dma_common_free_remap(cpu_addr, size,
1360 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1363 __iommu_remove_mapping(dev, handle, size);
1364 __iommu_free_buffer(dev, pages, size, attrs);
1367 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1368 void *cpu_addr, dma_addr_t dma_addr,
1369 size_t size, struct dma_attrs *attrs)
1371 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1372 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1377 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1382 * Map a part of the scatter-gather list into contiguous io address space
1384 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1385 size_t size, dma_addr_t *handle,
1386 enum dma_data_direction dir, struct dma_attrs *attrs,
1389 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1390 dma_addr_t iova, iova_base;
1393 struct scatterlist *s;
1395 size = PAGE_ALIGN(size);
1396 *handle = DMA_ERROR_CODE;
1398 iova_base = iova = __alloc_iova(mapping, size);
1399 if (iova == DMA_ERROR_CODE)
1402 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1403 phys_addr_t phys = page_to_phys(sg_page(s));
1404 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1407 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1408 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1410 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1413 count += len >> PAGE_SHIFT;
1416 *handle = iova_base;
1420 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1421 __free_iova(mapping, iova_base, size);
1425 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1426 enum dma_data_direction dir, struct dma_attrs *attrs,
1429 struct scatterlist *s = sg, *dma = sg, *start = sg;
1431 unsigned int offset = s->offset;
1432 unsigned int size = s->offset + s->length;
1433 unsigned int max = dma_get_max_seg_size(dev);
1435 for (i = 1; i < nents; i++) {
1438 s->dma_address = DMA_ERROR_CODE;
1441 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1442 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1443 dir, attrs, is_coherent) < 0)
1446 dma->dma_address += offset;
1447 dma->dma_length = size - offset;
1449 size = offset = s->offset;
1456 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1460 dma->dma_address += offset;
1461 dma->dma_length = size - offset;
1466 for_each_sg(sg, s, count, i)
1467 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1472 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1473 * @dev: valid struct device pointer
1474 * @sg: list of buffers
1475 * @nents: number of buffers to map
1476 * @dir: DMA transfer direction
1478 * Map a set of i/o coherent buffers described by scatterlist in streaming
1479 * mode for DMA. The scatter gather list elements are merged together (if
1480 * possible) and tagged with the appropriate dma address and length. They are
1481 * obtained via sg_dma_{address,length}.
1483 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1484 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1486 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1490 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1491 * @dev: valid struct device pointer
1492 * @sg: list of buffers
1493 * @nents: number of buffers to map
1494 * @dir: DMA transfer direction
1496 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1497 * The scatter gather list elements are merged together (if possible) and
1498 * tagged with the appropriate dma address and length. They are obtained via
1499 * sg_dma_{address,length}.
1501 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1502 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1504 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1507 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1508 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1511 struct scatterlist *s;
1514 for_each_sg(sg, s, nents, i) {
1516 __iommu_remove_mapping(dev, sg_dma_address(s),
1519 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1520 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1526 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1527 * @dev: valid struct device pointer
1528 * @sg: list of buffers
1529 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1530 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1532 * Unmap a set of streaming mode DMA translations. Again, CPU access
1533 * rules concerning calls here are the same as for dma_unmap_single().
1535 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1536 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1538 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1542 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1543 * @dev: valid struct device pointer
1544 * @sg: list of buffers
1545 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1546 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1548 * Unmap a set of streaming mode DMA translations. Again, CPU access
1549 * rules concerning calls here are the same as for dma_unmap_single().
1551 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1552 enum dma_data_direction dir, struct dma_attrs *attrs)
1554 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1558 * arm_iommu_sync_sg_for_cpu
1559 * @dev: valid struct device pointer
1560 * @sg: list of buffers
1561 * @nents: number of buffers to map (returned from dma_map_sg)
1562 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1564 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1565 int nents, enum dma_data_direction dir)
1567 struct scatterlist *s;
1570 for_each_sg(sg, s, nents, i)
1571 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1576 * arm_iommu_sync_sg_for_device
1577 * @dev: valid struct device pointer
1578 * @sg: list of buffers
1579 * @nents: number of buffers to map (returned from dma_map_sg)
1580 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1582 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1583 int nents, enum dma_data_direction dir)
1585 struct scatterlist *s;
1588 for_each_sg(sg, s, nents, i)
1589 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1594 * arm_coherent_iommu_map_page
1595 * @dev: valid struct device pointer
1596 * @page: page that buffer resides in
1597 * @offset: offset into page for start of buffer
1598 * @size: size of buffer to map
1599 * @dir: DMA transfer direction
1601 * Coherent IOMMU aware version of arm_dma_map_page()
1603 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1604 unsigned long offset, size_t size, enum dma_data_direction dir,
1605 struct dma_attrs *attrs)
1607 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1608 dma_addr_t dma_addr;
1609 int ret, len = PAGE_ALIGN(size + offset);
1611 dma_addr = __alloc_iova(mapping, len);
1612 if (dma_addr == DMA_ERROR_CODE)
1615 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1619 return dma_addr + offset;
1621 __free_iova(mapping, dma_addr, len);
1622 return DMA_ERROR_CODE;
1626 * arm_iommu_map_page
1627 * @dev: valid struct device pointer
1628 * @page: page that buffer resides in
1629 * @offset: offset into page for start of buffer
1630 * @size: size of buffer to map
1631 * @dir: DMA transfer direction
1633 * IOMMU aware version of arm_dma_map_page()
1635 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1636 unsigned long offset, size_t size, enum dma_data_direction dir,
1637 struct dma_attrs *attrs)
1639 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1640 __dma_page_cpu_to_dev(page, offset, size, dir);
1642 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1646 * arm_coherent_iommu_unmap_page
1647 * @dev: valid struct device pointer
1648 * @handle: DMA address of buffer
1649 * @size: size of buffer (same as passed to dma_map_page)
1650 * @dir: DMA transfer direction (same as passed to dma_map_page)
1652 * Coherent IOMMU aware version of arm_dma_unmap_page()
1654 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1655 size_t size, enum dma_data_direction dir,
1656 struct dma_attrs *attrs)
1658 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1659 dma_addr_t iova = handle & PAGE_MASK;
1660 int offset = handle & ~PAGE_MASK;
1661 int len = PAGE_ALIGN(size + offset);
1666 iommu_unmap(mapping->domain, iova, len);
1667 __free_iova(mapping, iova, len);
1671 * arm_iommu_unmap_page
1672 * @dev: valid struct device pointer
1673 * @handle: DMA address of buffer
1674 * @size: size of buffer (same as passed to dma_map_page)
1675 * @dir: DMA transfer direction (same as passed to dma_map_page)
1677 * IOMMU aware version of arm_dma_unmap_page()
1679 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1680 size_t size, enum dma_data_direction dir,
1681 struct dma_attrs *attrs)
1683 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1684 dma_addr_t iova = handle & PAGE_MASK;
1685 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1686 int offset = handle & ~PAGE_MASK;
1687 int len = PAGE_ALIGN(size + offset);
1692 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1693 __dma_page_dev_to_cpu(page, offset, size, dir);
1695 iommu_unmap(mapping->domain, iova, len);
1696 __free_iova(mapping, iova, len);
1699 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1700 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1702 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1703 dma_addr_t iova = handle & PAGE_MASK;
1704 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1705 unsigned int offset = handle & ~PAGE_MASK;
1710 __dma_page_dev_to_cpu(page, offset, size, dir);
1713 static void arm_iommu_sync_single_for_device(struct device *dev,
1714 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1716 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1717 dma_addr_t iova = handle & PAGE_MASK;
1718 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1719 unsigned int offset = handle & ~PAGE_MASK;
1724 __dma_page_cpu_to_dev(page, offset, size, dir);
1727 struct dma_map_ops iommu_ops = {
1728 .alloc = arm_iommu_alloc_attrs,
1729 .free = arm_iommu_free_attrs,
1730 .mmap = arm_iommu_mmap_attrs,
1731 .get_sgtable = arm_iommu_get_sgtable,
1733 .map_page = arm_iommu_map_page,
1734 .unmap_page = arm_iommu_unmap_page,
1735 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1736 .sync_single_for_device = arm_iommu_sync_single_for_device,
1738 .map_sg = arm_iommu_map_sg,
1739 .unmap_sg = arm_iommu_unmap_sg,
1740 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1741 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1743 .set_dma_mask = arm_dma_set_mask,
1746 struct dma_map_ops iommu_coherent_ops = {
1747 .alloc = arm_iommu_alloc_attrs,
1748 .free = arm_iommu_free_attrs,
1749 .mmap = arm_iommu_mmap_attrs,
1750 .get_sgtable = arm_iommu_get_sgtable,
1752 .map_page = arm_coherent_iommu_map_page,
1753 .unmap_page = arm_coherent_iommu_unmap_page,
1755 .map_sg = arm_coherent_iommu_map_sg,
1756 .unmap_sg = arm_coherent_iommu_unmap_sg,
1758 .set_dma_mask = arm_dma_set_mask,
1762 * arm_iommu_create_mapping
1763 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1764 * @base: start address of the valid IO address space
1765 * @size: size of the valid IO address space
1766 * @order: accuracy of the IO addresses allocations
1768 * Creates a mapping structure which holds information about used/unused
1769 * IO address ranges, which is required to perform memory allocation and
1770 * mapping with IOMMU aware functions.
1772 * The client device need to be attached to the mapping with
1773 * arm_iommu_attach_device function.
1775 struct dma_iommu_mapping *
1776 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1779 unsigned int count = size >> (PAGE_SHIFT + order);
1780 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1781 struct dma_iommu_mapping *mapping;
1785 return ERR_PTR(-EINVAL);
1787 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1791 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1792 if (!mapping->bitmap)
1795 mapping->base = base;
1796 mapping->bits = BITS_PER_BYTE * bitmap_size;
1797 mapping->order = order;
1798 spin_lock_init(&mapping->lock);
1800 mapping->domain = iommu_domain_alloc(bus);
1801 if (!mapping->domain)
1804 kref_init(&mapping->kref);
1807 kfree(mapping->bitmap);
1811 return ERR_PTR(err);
1813 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1815 static void release_iommu_mapping(struct kref *kref)
1817 struct dma_iommu_mapping *mapping =
1818 container_of(kref, struct dma_iommu_mapping, kref);
1820 iommu_domain_free(mapping->domain);
1821 kfree(mapping->bitmap);
1825 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1828 kref_put(&mapping->kref, release_iommu_mapping);
1830 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1833 * arm_iommu_attach_device
1834 * @dev: valid struct device pointer
1835 * @mapping: io address space mapping structure (returned from
1836 * arm_iommu_create_mapping)
1838 * Attaches specified io address space mapping to the provided device,
1839 * this replaces the dma operations (dma_map_ops pointer) with the
1840 * IOMMU aware version. More than one client might be attached to
1841 * the same io address space mapping.
1843 int arm_iommu_attach_device(struct device *dev,
1844 struct dma_iommu_mapping *mapping)
1848 err = iommu_attach_device(mapping->domain, dev);
1852 kref_get(&mapping->kref);
1853 dev->archdata.mapping = mapping;
1854 set_dma_ops(dev, &iommu_ops);
1856 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1859 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1862 * arm_iommu_detach_device
1863 * @dev: valid struct device pointer
1865 * Detaches the provided device from a previously attached map.
1866 * This voids the dma operations (dma_map_ops pointer)
1868 void arm_iommu_detach_device(struct device *dev)
1870 struct dma_iommu_mapping *mapping;
1872 mapping = to_dma_iommu_mapping(dev);
1874 dev_warn(dev, "Not attached\n");
1878 iommu_detach_device(mapping->domain, dev);
1879 kref_put(&mapping->kref, release_iommu_mapping);
1881 set_dma_ops(dev, NULL);
1883 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1885 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);