2 * linux/arch/arm/mm/flush.c
4 * Copyright (C) 1995-2002 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/module.h>
12 #include <linux/pagemap.h>
13 #include <linux/highmem.h>
15 #include <asm/cacheflush.h>
16 #include <asm/cachetype.h>
17 #include <asm/highmem.h>
18 #include <asm/smp_plat.h>
19 #include <asm/tlbflush.h>
23 #ifdef CONFIG_CPU_CACHE_VIPT
25 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
27 unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
30 set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
32 asm( "mcrr p15, 0, %1, %0, c14\n"
33 " mcr p15, 0, %2, c7, c10, 4"
35 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
39 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
41 unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
42 unsigned long offset = vaddr & (PAGE_SIZE - 1);
45 set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
47 flush_icache_range(to, to + len);
50 void flush_cache_mm(struct mm_struct *mm)
52 if (cache_is_vivt()) {
53 vivt_flush_cache_mm(mm);
57 if (cache_is_vipt_aliasing()) {
58 asm( "mcr p15, 0, %0, c7, c14, 0\n"
59 " mcr p15, 0, %0, c7, c10, 4"
66 void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
68 if (cache_is_vivt()) {
69 vivt_flush_cache_range(vma, start, end);
73 if (cache_is_vipt_aliasing()) {
74 asm( "mcr p15, 0, %0, c7, c14, 0\n"
75 " mcr p15, 0, %0, c7, c10, 4"
81 if (vma->vm_flags & VM_EXEC)
85 void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
87 if (cache_is_vivt()) {
88 vivt_flush_cache_page(vma, user_addr, pfn);
92 if (cache_is_vipt_aliasing()) {
93 flush_pfn_alias(pfn, user_addr);
97 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
102 #define flush_pfn_alias(pfn,vaddr) do { } while (0)
103 #define flush_icache_alias(pfn,vaddr,len) do { } while (0)
106 static void flush_ptrace_access_other(void *args)
108 __flush_icache_all();
112 void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
113 unsigned long uaddr, void *kaddr, unsigned long len)
115 if (cache_is_vivt()) {
116 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
117 unsigned long addr = (unsigned long)kaddr;
118 __cpuc_coherent_kern_range(addr, addr + len);
123 if (cache_is_vipt_aliasing()) {
124 flush_pfn_alias(page_to_pfn(page), uaddr);
125 __flush_icache_all();
129 /* VIPT non-aliasing D-cache */
130 if (vma->vm_flags & VM_EXEC) {
131 unsigned long addr = (unsigned long)kaddr;
132 if (icache_is_vipt_aliasing())
133 flush_icache_alias(page_to_pfn(page), uaddr, len);
135 __cpuc_coherent_kern_range(addr, addr + len);
136 if (cache_ops_need_broadcast())
137 smp_call_function(flush_ptrace_access_other,
143 * Copy user data from/to a page which is mapped into a different
144 * processes address space. Really, we want to allow our "user
145 * space" model to handle this.
147 * Note that this code needs to run on the current CPU.
149 void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
150 unsigned long uaddr, void *dst, const void *src,
156 memcpy(dst, src, len);
157 flush_ptrace_access(vma, page, uaddr, dst, len);
163 void __flush_dcache_page(struct address_space *mapping, struct page *page)
166 * Writeback any data associated with the kernel mapping of this
167 * page. This ensures that data in the physical page is mutually
168 * coherent with the kernels mapping.
170 if (!PageHighMem(page)) {
171 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
173 void *addr = kmap_high_get(page);
175 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
177 } else if (cache_is_vipt()) {
178 /* unmapped pages might still be cached */
179 addr = kmap_atomic(page);
180 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
186 * If this is a page cache page, and we have an aliasing VIPT cache,
187 * we only need to do one flush - which would be at the relevant
188 * userspace colour, which is congruent with page->index.
190 if (mapping && cache_is_vipt_aliasing())
191 flush_pfn_alias(page_to_pfn(page),
192 page->index << PAGE_CACHE_SHIFT);
195 static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
197 struct mm_struct *mm = current->active_mm;
198 struct vm_area_struct *mpnt;
202 * There are possible user space mappings of this page:
203 * - VIVT cache: we need to also write back and invalidate all user
204 * data in the current VM view associated with this page.
205 * - aliasing VIPT: we only need to find one mapping of this page.
207 pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
209 flush_dcache_mmap_lock(mapping);
210 vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
211 unsigned long offset;
214 * If this VMA is not in our MM, we can ignore it.
216 if (mpnt->vm_mm != mm)
218 if (!(mpnt->vm_flags & VM_MAYSHARE))
220 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
221 flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
223 flush_dcache_mmap_unlock(mapping);
226 #if __LINUX_ARM_ARCH__ >= 6
227 void __sync_icache_dcache(pte_t pteval)
231 struct address_space *mapping;
233 if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
234 /* only flush non-aliasing VIPT caches for exec mappings */
236 pfn = pte_pfn(pteval);
240 page = pfn_to_page(pfn);
241 if (cache_is_vipt_aliasing())
242 mapping = page_mapping(page);
246 if (!test_and_set_bit(PG_dcache_clean, &page->flags))
247 __flush_dcache_page(mapping, page);
249 if (pte_exec(pteval))
250 __flush_icache_all();
255 * Ensure cache coherency between kernel mapping and userspace mapping
258 * We have three cases to consider:
259 * - VIPT non-aliasing cache: fully coherent so nothing required.
260 * - VIVT: fully aliasing, so we need to handle every alias in our
262 * - VIPT aliasing: need to handle one alias in our current VM view.
264 * If we need to handle aliasing:
265 * If the page only exists in the page cache and there are no user
266 * space mappings, we can be lazy and remember that we may have dirty
267 * kernel cache lines for later. Otherwise, we assume we have
270 * Note that we disable the lazy flush for SMP configurations where
271 * the cache maintenance operations are not automatically broadcasted.
273 void flush_dcache_page(struct page *page)
275 struct address_space *mapping;
278 * The zero page is never written to, so never has any dirty
279 * cache lines, and therefore never needs to be flushed.
281 if (page == ZERO_PAGE(0))
284 mapping = page_mapping(page);
286 if (!cache_ops_need_broadcast() &&
287 mapping && !mapping_mapped(mapping))
288 clear_bit(PG_dcache_clean, &page->flags);
290 __flush_dcache_page(mapping, page);
291 if (mapping && cache_is_vivt())
292 __flush_dcache_aliases(mapping, page);
294 __flush_icache_all();
295 set_bit(PG_dcache_clean, &page->flags);
298 EXPORT_SYMBOL(flush_dcache_page);
301 * Flush an anonymous page so that users of get_user_pages()
302 * can safely access the data. The expected sequence is:
306 * memcpy() to/from page
307 * if written to page, flush_dcache_page()
309 void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
313 /* VIPT non-aliasing caches need do nothing */
314 if (cache_is_vipt_nonaliasing())
318 * Write back and invalidate userspace mapping.
320 pfn = page_to_pfn(page);
321 if (cache_is_vivt()) {
322 flush_cache_page(vma, vmaddr, pfn);
325 * For aliasing VIPT, we can flush an alias of the
326 * userspace address only.
328 flush_pfn_alias(pfn, vmaddr);
329 __flush_icache_all();
333 * Invalidate kernel mapping. No data should be contained
334 * in this mapping of the page. FIXME: this is overkill
335 * since we actually ask for a write-back and invalidate.
337 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);