arch/arm/plat-omap/i2c.c

   1 /*
   2  * linux/arch/arm/plat-omap/i2c.c
   3  *
   4  * Helper module for board specific I2C bus registration
   5  *
   6  * Copyright (C) 2007 Nokia Corporation.
   7  *
   8  * Contact: Jarkko Nikula <jhnikula@gmail.com>
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * version 2 as published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22  * 02110-1301 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/i2c.h>
  29 #include <linux/i2c-omap.h>
  30 #include <linux/slab.h>
  31 #include <linux/err.h>
  32 #include <linux/clk.h>
  33
  34 #include <mach/irqs.h>
  35 #include <plat/mux.h>
  36 #include <plat/i2c.h>
  37 #include <plat/omap-pm.h>
  38 #include <plat/omap_device.h>
  39
  40 #define OMAP_I2C_SIZE           0x3f
  41 #define OMAP1_I2C_BASE          0xfffb3800
  42
  43 static const char name[] = "omap_i2c";
  44
  45 #define I2C_RESOURCE_BUILDER(base, irq)                 \
  46         {                                               \
  47                 .start  = (base),                       \
  48                 .end    = (base) + OMAP_I2C_SIZE,       \
  49                 .flags  = IORESOURCE_MEM,               \
  50         },                                              \
  51         {                                               \
  52                 .start  = (irq),                        \
  53                 .flags  = IORESOURCE_IRQ,               \
  54         },
  55
  56 static struct resource i2c_resources[][2] = {
  57         { I2C_RESOURCE_BUILDER(0, 0) },
  58 };
  59
  60 #define I2C_DEV_BUILDER(bus_id, res, data)              \
  61         {                                               \
  62                 .id     = (bus_id),                     \
  63                 .name   = name,                         \
  64                 .num_resources  = ARRAY_SIZE(res),      \
  65                 .resource       = (res),                \
  66                 .dev            = {                     \
  67                         .platform_data  = (data),       \
  68                 },                                      \
  69         }
  70
  71 #define MAX_OMAP_I2C_HWMOD_NAME_LEN     16
  72 #define OMAP_I2C_MAX_CONTROLLERS 4
  73 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
  74 static struct platform_device omap_i2c_devices[] = {
  75         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
  76 };
  77
  78 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
  79
  80 static int __init omap_i2c_nr_ports(void)
  81 {
  82         int ports = 0;
  83
  84         if (cpu_class_is_omap1())
  85                 ports = 1;
  86         else if (cpu_is_omap24xx())
  87                 ports = 2;
  88         else if (cpu_is_omap34xx())
  89                 ports = 3;
  90         else if (cpu_is_omap44xx())
  91                 ports = 4;
  92
  93         return ports;
  94 }
  95
  96 static inline int omap1_i2c_add_bus(int bus_id)
  97 {
  98         struct platform_device *pdev;
  99         struct omap_i2c_bus_platform_data *pdata;
 100         struct resource *res;
 101
 102         omap1_i2c_mux_pins(bus_id);
 103
 104         pdev = &omap_i2c_devices[bus_id - 1];
 105         res = pdev->resource;
 106         res[0].start = OMAP1_I2C_BASE;
 107         res[0].end = res[0].start + OMAP_I2C_SIZE;
 108         res[1].start = INT_I2C;
 109         pdata = &i2c_pdata[bus_id - 1];
 110
 111         /* all OMAP1 have IP version 1 register set */
 112         pdata->rev = OMAP_I2C_IP_VERSION_1;
 113
 114         return platform_device_register(pdev);
 115 }
 116
 117
 118 #ifdef CONFIG_ARCH_OMAP2PLUS
 119 /*
 120  * XXX This function is a temporary compatibility wrapper - only
 121  * needed until the I2C driver can be converted to call
 122  * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
 123  */
 124 static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
 125 {
 126         omap_pm_set_max_mpu_wakeup_lat(dev, t);
 127 }
 128
 129 static struct omap_device_pm_latency omap_i2c_latency[] = {
 130         [0] = {
 131                 .deactivate_func        = omap_device_idle_hwmods,
 132                 .activate_func          = omap_device_enable_hwmods,
 133                 .flags                  = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
 134         },
 135 };
 136
 137 static inline int omap2_i2c_add_bus(int bus_id)
 138 {
 139         int l;
 140         struct omap_hwmod *oh;
 141         struct omap_device *od;
 142         char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
 143         struct omap_i2c_bus_platform_data *pdata;
 144
 145         omap2_i2c_mux_pins(bus_id);
 146
 147         l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
 148         WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
 149                 "String buffer overflow in I2C%d device setup\n", bus_id);
 150         oh = omap_hwmod_lookup(oh_name);
 151         if (!oh) {
 152                         pr_err("Could not look up %s\n", oh_name);
 153                         return -EEXIST;
 154         }
 155
 156         pdata = &i2c_pdata[bus_id - 1];
 157         /*
 158          * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
 159          * use up to the OMAP I2C driver via platform data
 160          */
 161         pdata->rev = oh->class->rev;
 162
 163         /*
 164          * When waiting for completion of a i2c transfer, we need to
 165          * set a wake up latency constraint for the MPU. This is to
 166          * ensure quick enough wakeup from idle, when transfer
 167          * completes.
 168          * Only omap3 has support for constraints
 169          */
 170         if (cpu_is_omap34xx())
 171                 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
 172         od = omap_device_build(name, bus_id, oh, pdata,
 173                         sizeof(struct omap_i2c_bus_platform_data),
 174                         omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0);
 175         WARN(IS_ERR(od), "Could not build omap_device for %s\n", name);
 176
 177         return PTR_ERR(od);
 178 }
 179 #else
 180 static inline int omap2_i2c_add_bus(int bus_id)
 181 {
 182         return 0;
 183 }
 184 #endif
 185
 186 static int __init omap_i2c_add_bus(int bus_id)
 187 {
 188         if (cpu_class_is_omap1())
 189                 return omap1_i2c_add_bus(bus_id);
 190         else
 191                 return omap2_i2c_add_bus(bus_id);
 192 }
 193
 194 /**
 195  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
 196  * @str: String of options
 197  *
 198  * This function allow to override the default I2C bus speed for given I2C
 199  * bus with a command line option.
 200  *
 201  * Format: i2c_bus=bus_id,clkrate (in kHz)
 202  *
 203  * Returns 1 on success, 0 otherwise.
 204  */
 205 static int __init omap_i2c_bus_setup(char *str)
 206 {
 207         int ports;
 208         int ints[3];
 209
 210         ports = omap_i2c_nr_ports();
 211         get_options(str, 3, ints);
 212         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 213                 return 0;
 214         i2c_pdata[ints[1] - 1].clkrate = ints[2];
 215         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 216
 217         return 1;
 218 }
 219 __setup("i2c_bus=", omap_i2c_bus_setup);
 220
 221 /*
 222  * Register busses defined in command line but that are not registered with
 223  * omap_register_i2c_bus from board initialization code.
 224  */
 225 static int __init omap_register_i2c_bus_cmdline(void)
 226 {
 227         int i, err = 0;
 228
 229         for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
 230                 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
 231                         i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 232                         err = omap_i2c_add_bus(i + 1);
 233                         if (err)
 234                                 goto out;
 235                 }
 236
 237 out:
 238         return err;
 239 }
 240 subsys_initcall(omap_register_i2c_bus_cmdline);
 241
 242 /**
 243  * omap_register_i2c_bus - register I2C bus with device descriptors
 244  * @bus_id: bus id counting from number 1
 245  * @clkrate: clock rate of the bus in kHz
 246  * @info: pointer into I2C device descriptor table or NULL
 247  * @len: number of descriptors in the table
 248  *
 249  * Returns 0 on success or an error code.
 250  */
 251 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 252                           struct i2c_board_info const *info,
 253                           unsigned len)
 254 {
 255         int err;
 256
 257         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
 258
 259         if (info) {
 260                 err = i2c_register_board_info(bus_id, info, len);
 261                 if (err)
 262                         return err;
 263         }
 264
 265         if (!i2c_pdata[bus_id - 1].clkrate)
 266                 i2c_pdata[bus_id - 1].clkrate = clkrate;
 267
 268         i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 269
 270         return omap_i2c_add_bus(bus_id);
 271 }