arch/arm/plat-omap/include/plat/display.h

   1 /*
   2  * linux/include/asm-arm/arch-omap/display.h
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  21 #define __ASM_ARCH_OMAP_DISPLAY_H
  22
  23 #include <linux/list.h>
  24 #include <linux/kobject.h>
  25 #include <linux/device.h>
  26 #include <asm/atomic.h>
  27
  28 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  29 #define DISPC_IRQ_VSYNC                 (1 << 1)
  30 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  31 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  32 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  33 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  35 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  36 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  37 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  39 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  41 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  42 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  43 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  44 #define DISPC_IRQ_WAKEUP                (1 << 16)
  45 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  46 #define DISPC_IRQ_VSYNC2                (1 << 18)
  47 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  48 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  49
  50 struct omap_dss_device;
  51 struct omap_overlay_manager;
  52
  53 enum omap_display_type {
  54         OMAP_DISPLAY_TYPE_NONE          = 0,
  55         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  56         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  57         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  58         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  59         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  60 };
  61
  62 enum omap_plane {
  63         OMAP_DSS_GFX    = 0,
  64         OMAP_DSS_VIDEO1 = 1,
  65         OMAP_DSS_VIDEO2 = 2
  66 };
  67
  68 enum omap_channel {
  69         OMAP_DSS_CHANNEL_LCD    = 0,
  70         OMAP_DSS_CHANNEL_DIGIT  = 1,
  71         OMAP_DSS_CHANNEL_LCD2   = 2,
  72 };
  73
  74 enum omap_color_mode {
  75         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  76         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  77         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  78         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  79         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  80         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  81         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  82         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
  83         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
  84         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
  85         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
  86         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
  87         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
  88         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
  89 };
  90
  91 enum omap_lcd_display_type {
  92         OMAP_DSS_LCD_DISPLAY_STN,
  93         OMAP_DSS_LCD_DISPLAY_TFT,
  94 };
  95
  96 enum omap_dss_load_mode {
  97         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
  98         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
  99         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 100         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 101 };
 102
 103 enum omap_dss_trans_key_type {
 104         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 105         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 106 };
 107
 108 enum omap_rfbi_te_mode {
 109         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 110         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 111 };
 112
 113 enum omap_panel_config {
 114         OMAP_DSS_LCD_IVS                = 1<<0,
 115         OMAP_DSS_LCD_IHS                = 1<<1,
 116         OMAP_DSS_LCD_IPC                = 1<<2,
 117         OMAP_DSS_LCD_IEO                = 1<<3,
 118         OMAP_DSS_LCD_RF                 = 1<<4,
 119         OMAP_DSS_LCD_ONOFF              = 1<<5,
 120
 121         OMAP_DSS_LCD_TFT                = 1<<20,
 122 };
 123
 124 enum omap_dss_venc_type {
 125         OMAP_DSS_VENC_TYPE_COMPOSITE,
 126         OMAP_DSS_VENC_TYPE_SVIDEO,
 127 };
 128
 129 enum omap_display_caps {
 130         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 131         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 132 };
 133
 134 enum omap_dss_update_mode {
 135         OMAP_DSS_UPDATE_DISABLED = 0,
 136         OMAP_DSS_UPDATE_AUTO,
 137         OMAP_DSS_UPDATE_MANUAL,
 138 };
 139
 140 enum omap_dss_display_state {
 141         OMAP_DSS_DISPLAY_DISABLED = 0,
 142         OMAP_DSS_DISPLAY_ACTIVE,
 143         OMAP_DSS_DISPLAY_SUSPENDED,
 144 };
 145
 146 /* XXX perhaps this should be removed */
 147 enum omap_dss_overlay_managers {
 148         OMAP_DSS_OVL_MGR_LCD,
 149         OMAP_DSS_OVL_MGR_TV,
 150         OMAP_DSS_OVL_MGR_LCD2,
 151 };
 152
 153 enum omap_dss_rotation_type {
 154         OMAP_DSS_ROT_DMA = 0,
 155         OMAP_DSS_ROT_VRFB = 1,
 156 };
 157
 158 /* clockwise rotation angle */
 159 enum omap_dss_rotation_angle {
 160         OMAP_DSS_ROT_0   = 0,
 161         OMAP_DSS_ROT_90  = 1,
 162         OMAP_DSS_ROT_180 = 2,
 163         OMAP_DSS_ROT_270 = 3,
 164 };
 165
 166 enum omap_overlay_caps {
 167         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 168         OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
 169 };
 170
 171 enum omap_overlay_manager_caps {
 172         OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
 173 };
 174
 175 /* RFBI */
 176
 177 struct rfbi_timings {
 178         int cs_on_time;
 179         int cs_off_time;
 180         int we_on_time;
 181         int we_off_time;
 182         int re_on_time;
 183         int re_off_time;
 184         int we_cycle_time;
 185         int re_cycle_time;
 186         int cs_pulse_width;
 187         int access_time;
 188
 189         int clk_div;
 190
 191         u32 tim[5];             /* set by rfbi_convert_timings() */
 192
 193         int converted;
 194 };
 195
 196 void omap_rfbi_write_command(const void *buf, u32 len);
 197 void omap_rfbi_read_data(void *buf, u32 len);
 198 void omap_rfbi_write_data(const void *buf, u32 len);
 199 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 200                 u16 x, u16 y,
 201                 u16 w, u16 h);
 202 int omap_rfbi_enable_te(bool enable, unsigned line);
 203 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 204                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 205                              int hs_pol_inv, int vs_pol_inv, int extif_div);
 206
 207 /* DSI */
 208 void dsi_bus_lock(void);
 209 void dsi_bus_unlock(void);
 210 int dsi_vc_dcs_write(int channel, u8 *data, int len);
 211 int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
 212 int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
 213 int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
 214 int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
 215 int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
 216 int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
 217 int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
 218 int dsi_vc_send_null(int channel);
 219 int dsi_vc_send_bta_sync(int channel);
 220
 221 /* Board specific data */
 222 struct omap_dss_board_info {
 223         int (*get_last_off_on_transaction_id)(struct device *dev);
 224         int num_devices;
 225         struct omap_dss_device **devices;
 226         struct omap_dss_device *default_device;
 227 };
 228
 229 struct omap_video_timings {
 230         /* Unit: pixels */
 231         u16 x_res;
 232         /* Unit: pixels */
 233         u16 y_res;
 234         /* Unit: KHz */
 235         u32 pixel_clock;
 236         /* Unit: pixel clocks */
 237         u16 hsw;        /* Horizontal synchronization pulse width */
 238         /* Unit: pixel clocks */
 239         u16 hfp;        /* Horizontal front porch */
 240         /* Unit: pixel clocks */
 241         u16 hbp;        /* Horizontal back porch */
 242         /* Unit: line clocks */
 243         u16 vsw;        /* Vertical synchronization pulse width */
 244         /* Unit: line clocks */
 245         u16 vfp;        /* Vertical front porch */
 246         /* Unit: line clocks */
 247         u16 vbp;        /* Vertical back porch */
 248 };
 249
 250 #ifdef CONFIG_OMAP2_DSS_VENC
 251 /* Hardcoded timings for tv modes. Venc only uses these to
 252  * identify the mode, and does not actually use the configs
 253  * itself. However, the configs should be something that
 254  * a normal monitor can also show */
 255 extern const struct omap_video_timings omap_dss_pal_timings;
 256 extern const struct omap_video_timings omap_dss_ntsc_timings;
 257 #endif
 258
 259 struct omap_overlay_info {
 260         bool enabled;
 261
 262         u32 paddr;
 263         void __iomem *vaddr;
 264         u16 screen_width;
 265         u16 width;
 266         u16 height;
 267         enum omap_color_mode color_mode;
 268         u8 rotation;
 269         enum omap_dss_rotation_type rotation_type;
 270         bool mirror;
 271
 272         u16 pos_x;
 273         u16 pos_y;
 274         u16 out_width;  /* if 0, out_width == width */
 275         u16 out_height; /* if 0, out_height == height */
 276         u8 global_alpha;
 277         u8 pre_mult_alpha;
 278 };
 279
 280 struct omap_overlay {
 281         struct kobject kobj;
 282         struct list_head list;
 283
 284         /* static fields */
 285         const char *name;
 286         int id;
 287         enum omap_color_mode supported_modes;
 288         enum omap_overlay_caps caps;
 289
 290         /* dynamic fields */
 291         struct omap_overlay_manager *manager;
 292         struct omap_overlay_info info;
 293
 294         /* if true, info has been changed, but not applied() yet */
 295         bool info_dirty;
 296
 297         int (*set_manager)(struct omap_overlay *ovl,
 298                 struct omap_overlay_manager *mgr);
 299         int (*unset_manager)(struct omap_overlay *ovl);
 300
 301         int (*set_overlay_info)(struct omap_overlay *ovl,
 302                         struct omap_overlay_info *info);
 303         void (*get_overlay_info)(struct omap_overlay *ovl,
 304                         struct omap_overlay_info *info);
 305
 306         int (*wait_for_go)(struct omap_overlay *ovl);
 307 };
 308
 309 struct omap_overlay_manager_info {
 310         u32 default_color;
 311
 312         enum omap_dss_trans_key_type trans_key_type;
 313         u32 trans_key;
 314         bool trans_enabled;
 315
 316         bool alpha_enabled;
 317 };
 318
 319 struct omap_overlay_manager {
 320         struct kobject kobj;
 321         struct list_head list;
 322
 323         /* static fields */
 324         const char *name;
 325         int id;
 326         enum omap_overlay_manager_caps caps;
 327         int num_overlays;
 328         struct omap_overlay **overlays;
 329         enum omap_display_type supported_displays;
 330
 331         /* dynamic fields */
 332         struct omap_dss_device *device;
 333         struct omap_overlay_manager_info info;
 334
 335         bool device_changed;
 336         /* if true, info has been changed but not applied() yet */
 337         bool info_dirty;
 338
 339         int (*set_device)(struct omap_overlay_manager *mgr,
 340                 struct omap_dss_device *dssdev);
 341         int (*unset_device)(struct omap_overlay_manager *mgr);
 342
 343         int (*set_manager_info)(struct omap_overlay_manager *mgr,
 344                         struct omap_overlay_manager_info *info);
 345         void (*get_manager_info)(struct omap_overlay_manager *mgr,
 346                         struct omap_overlay_manager_info *info);
 347
 348         int (*apply)(struct omap_overlay_manager *mgr);
 349         int (*wait_for_go)(struct omap_overlay_manager *mgr);
 350         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 351
 352         int (*enable)(struct omap_overlay_manager *mgr);
 353         int (*disable)(struct omap_overlay_manager *mgr);
 354 };
 355
 356 struct omap_dss_device {
 357         struct device dev;
 358
 359         enum omap_display_type type;
 360
 361         union {
 362                 struct {
 363                         u8 data_lines;
 364                 } dpi;
 365
 366                 struct {
 367                         u8 channel;
 368                         u8 data_lines;
 369                 } rfbi;
 370
 371                 struct {
 372                         u8 datapairs;
 373                 } sdi;
 374
 375                 struct {
 376                         u8 clk_lane;
 377                         u8 clk_pol;
 378                         u8 data1_lane;
 379                         u8 data1_pol;
 380                         u8 data2_lane;
 381                         u8 data2_pol;
 382
 383                         struct {
 384                                 u16 regn;
 385                                 u16 regm;
 386                                 u16 regm3;
 387                                 u16 regm4;
 388
 389                                 u16 lp_clk_div;
 390
 391                                 u16 lck_div;
 392                                 u16 pck_div;
 393                         } div;
 394
 395                         bool ext_te;
 396                         u8 ext_te_gpio;
 397                 } dsi;
 398
 399                 struct {
 400                         enum omap_dss_venc_type type;
 401                         bool invert_polarity;
 402                 } venc;
 403         } phy;
 404
 405         struct {
 406                 struct omap_video_timings timings;
 407
 408                 int acbi;       /* ac-bias pin transitions per interrupt */
 409                 /* Unit: line clocks */
 410                 int acb;        /* ac-bias pin frequency */
 411
 412                 enum omap_panel_config config;
 413         } panel;
 414
 415         struct {
 416                 u8 pixel_size;
 417                 struct rfbi_timings rfbi_timings;
 418         } ctrl;
 419
 420         int reset_gpio;
 421
 422         int max_backlight_level;
 423
 424         const char *name;
 425
 426         /* used to match device to driver */
 427         const char *driver_name;
 428
 429         void *data;
 430
 431         struct omap_dss_driver *driver;
 432
 433         /* helper variable for driver suspend/resume */
 434         bool activate_after_resume;
 435
 436         enum omap_display_caps caps;
 437
 438         struct omap_overlay_manager *manager;
 439
 440         enum omap_dss_display_state state;
 441
 442         /* platform specific  */
 443         int (*platform_enable)(struct omap_dss_device *dssdev);
 444         void (*platform_disable)(struct omap_dss_device *dssdev);
 445         int (*set_backlight)(struct omap_dss_device *dssdev, int level);
 446         int (*get_backlight)(struct omap_dss_device *dssdev);
 447 };
 448
 449 struct omap_dss_driver {
 450         struct device_driver driver;
 451
 452         int (*probe)(struct omap_dss_device *);
 453         void (*remove)(struct omap_dss_device *);
 454
 455         int (*enable)(struct omap_dss_device *display);
 456         void (*disable)(struct omap_dss_device *display);
 457         int (*suspend)(struct omap_dss_device *display);
 458         int (*resume)(struct omap_dss_device *display);
 459         int (*run_test)(struct omap_dss_device *display, int test);
 460
 461         int (*set_update_mode)(struct omap_dss_device *dssdev,
 462                         enum omap_dss_update_mode);
 463         enum omap_dss_update_mode (*get_update_mode)(
 464                         struct omap_dss_device *dssdev);
 465
 466         int (*update)(struct omap_dss_device *dssdev,
 467                                u16 x, u16 y, u16 w, u16 h);
 468         int (*sync)(struct omap_dss_device *dssdev);
 469
 470         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 471         int (*get_te)(struct omap_dss_device *dssdev);
 472
 473         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 474         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 475
 476         bool (*get_mirror)(struct omap_dss_device *dssdev);
 477         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 478
 479         int (*memory_read)(struct omap_dss_device *dssdev,
 480                         void *buf, size_t size,
 481                         u16 x, u16 y, u16 w, u16 h);
 482
 483         void (*get_resolution)(struct omap_dss_device *dssdev,
 484                         u16 *xres, u16 *yres);
 485         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 486
 487         int (*check_timings)(struct omap_dss_device *dssdev,
 488                         struct omap_video_timings *timings);
 489         void (*set_timings)(struct omap_dss_device *dssdev,
 490                         struct omap_video_timings *timings);
 491         void (*get_timings)(struct omap_dss_device *dssdev,
 492                         struct omap_video_timings *timings);
 493
 494         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 495         u32 (*get_wss)(struct omap_dss_device *dssdev);
 496 };
 497
 498 int omap_dss_register_driver(struct omap_dss_driver *);
 499 void omap_dss_unregister_driver(struct omap_dss_driver *);
 500
 501 int omap_dss_register_device(struct omap_dss_device *);
 502 void omap_dss_unregister_device(struct omap_dss_device *);
 503
 504 void omap_dss_get_device(struct omap_dss_device *dssdev);
 505 void omap_dss_put_device(struct omap_dss_device *dssdev);
 506 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 507 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 508 struct omap_dss_device *omap_dss_find_device(void *data,
 509                 int (*match)(struct omap_dss_device *dssdev, void *data));
 510
 511 int omap_dss_start_device(struct omap_dss_device *dssdev);
 512 void omap_dss_stop_device(struct omap_dss_device *dssdev);
 513
 514 int omap_dss_get_num_overlay_managers(void);
 515 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 516
 517 int omap_dss_get_num_overlays(void);
 518 struct omap_overlay *omap_dss_get_overlay(int num);
 519
 520 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 521                 u16 *xres, u16 *yres);
 522 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 523
 524 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 525 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 526 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 527
 528 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
 529 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
 530                 unsigned long timeout);
 531
 532 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
 533 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
 534
 535 void omapdss_dsi_vc_enable_hs(int channel, bool enable);
 536 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
 537
 538 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
 539                                     u16 *x, u16 *y, u16 *w, u16 *h,
 540                                     bool enlarge_update_area);
 541 int omap_dsi_update(struct omap_dss_device *dssdev,
 542                 int channel,
 543                 u16 x, u16 y, u16 w, u16 h,
 544                 void (*callback)(int, void *), void *data);
 545
 546 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
 547 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
 548
 549 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
 550 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
 551 void dpi_set_timings(struct omap_dss_device *dssdev,
 552                         struct omap_video_timings *timings);
 553 int dpi_check_timings(struct omap_dss_device *dssdev,
 554                         struct omap_video_timings *timings);
 555
 556 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
 557 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
 558
 559 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
 560 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
 561 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
 562                 u16 *x, u16 *y, u16 *w, u16 *h);
 563 int omap_rfbi_update(struct omap_dss_device *dssdev,
 564                 u16 x, u16 y, u16 w, u16 h,
 565                 void (*callback)(void *), void *data);
 566
 567 #endif