2 * omap iommu: main structures
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __MACH_IOMMU_H
14 #define __MACH_IOMMU_H
18 #if defined(CONFIG_ARCH_OMAP1)
19 #error "iommu for this processor not implemented yet"
25 u32 pgsz, prsvd, valid;
29 u32 endian, elsz, mixed;
38 void __iomem *regbase;
41 struct iommu_domain *domain;
43 unsigned int refcount;
44 spinlock_t iommu_lock; /* global for this whole object */
47 * We don't change iopgd for a situation like pgd for a task,
48 * but share it globally for each iommu.
51 spinlock_t page_table_lock; /* protect iopgd */
55 struct list_head mmap;
56 struct mutex mmap_lock; /* protect mmap */
58 void *ctx; /* iommu context: registres saved area */
85 /* architecture specific functions */
86 struct iommu_functions {
87 unsigned long version;
89 int (*enable)(struct omap_iommu *obj);
90 void (*disable)(struct omap_iommu *obj);
91 void (*set_twl)(struct omap_iommu *obj, bool on);
92 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);
94 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);
95 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);
97 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,
98 struct iotlb_entry *e);
99 int (*cr_valid)(struct cr_regs *cr);
100 u32 (*cr_to_virt)(struct cr_regs *cr);
101 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
102 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,
105 u32 (*get_pte_attr)(struct iotlb_entry *e);
107 void (*save_ctx)(struct omap_iommu *obj);
108 void (*restore_ctx)(struct omap_iommu *obj);
109 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
113 * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
114 * @da_start: device address where the va space starts.
115 * @da_end: device address where the va space ends.
116 * @nr_tlb_entries: number of entries supported by the translation
117 * look-aside buffer (TLB).
119 struct omap_mmu_dev_attr {
125 struct iommu_platform_data {
127 const char *clk_name;
128 const int nr_tlb_entries;
134 * struct iommu_arch_data - omap iommu private data
135 * @name: name of the iommu device
136 * @iommu_dev: handle of the iommu device
138 * This is an omap iommu private data object, which binds an iommu user
139 * to its iommu device. This object should be placed at the iommu user's
140 * dev_archdata so generic IOMMU API can be used without having to
141 * utilize omap-specific plumbing anymore.
143 struct omap_iommu_arch_data {
145 struct omap_iommu *iommu_dev;
148 #ifdef CONFIG_IOMMU_API
150 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
151 * @dev: iommu client device
153 static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
155 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
157 return arch_data->iommu_dev;
162 #define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
163 #define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
164 #define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
165 #define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
166 #define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
169 * MMU Register offsets
171 #define MMU_REVISION 0x00
172 #define MMU_SYSCONFIG 0x10
173 #define MMU_SYSSTATUS 0x14
174 #define MMU_IRQSTATUS 0x18
175 #define MMU_IRQENABLE 0x1c
176 #define MMU_WALKING_ST 0x40
177 #define MMU_CNTL 0x44
178 #define MMU_FAULT_AD 0x48
180 #define MMU_LOCK 0x50
181 #define MMU_LD_TLB 0x54
184 #define MMU_GFLUSH 0x60
185 #define MMU_FLUSH_ENTRY 0x64
186 #define MMU_READ_CAM 0x68
187 #define MMU_READ_RAM 0x6c
188 #define MMU_EMU_FAULT_AD 0x70
190 #define MMU_REG_SIZE 256
193 * MMU Register bit definitions
195 #define MMU_LOCK_BASE_SHIFT 10
196 #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
197 #define MMU_LOCK_BASE(x) \
198 ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
200 #define MMU_LOCK_VICT_SHIFT 4
201 #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
202 #define MMU_LOCK_VICT(x) \
203 ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
205 #define MMU_CAM_VATAG_SHIFT 12
206 #define MMU_CAM_VATAG_MASK \
207 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
208 #define MMU_CAM_P (1 << 3)
209 #define MMU_CAM_V (1 << 2)
210 #define MMU_CAM_PGSZ_MASK 3
211 #define MMU_CAM_PGSZ_1M (0 << 0)
212 #define MMU_CAM_PGSZ_64K (1 << 0)
213 #define MMU_CAM_PGSZ_4K (2 << 0)
214 #define MMU_CAM_PGSZ_16M (3 << 0)
216 #define MMU_RAM_PADDR_SHIFT 12
217 #define MMU_RAM_PADDR_MASK \
218 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
220 #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
221 #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
223 #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
224 #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
225 #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
226 #define MMU_RAM_MIXED_SHIFT 6
227 #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
228 #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
231 * utilities for super page(16MB, 1MB, 64KB and 4KB)
234 #define iopgsz_max(bytes) \
235 (((bytes) >= SZ_16M) ? SZ_16M : \
236 ((bytes) >= SZ_1M) ? SZ_1M : \
237 ((bytes) >= SZ_64K) ? SZ_64K : \
238 ((bytes) >= SZ_4K) ? SZ_4K : 0)
240 #define bytes_to_iopgsz(bytes) \
241 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \
242 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \
243 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \
244 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
246 #define iopgsz_to_bytes(iopgsz) \
247 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \
248 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \
249 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \
250 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
252 #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)
257 extern u32 omap_iommu_arch_version(void);
259 extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
262 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
264 extern int omap_iommu_set_isr(const char *name,
265 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
269 extern int omap_install_iommu_arch(const struct iommu_functions *ops);
270 extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
272 extern int omap_foreach_iommu_device(void *data,
273 int (*fn)(struct device *, void *));
276 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
278 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
283 static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
285 return __raw_readl(obj->regbase + offs);
288 static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
290 __raw_writel(val, obj->regbase + offs);
293 #endif /* __MACH_IOMMU_H */