arch/arm/plat-samsung/devs.c

   1 /* linux/arch/arm/plat-samsung/devs.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Base SAMSUNG platform device definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/types.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/list.h>
  17 #include <linux/timer.h>
  18 #include <linux/init.h>
  19 #include <linux/serial_core.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/slab.h>
  23 #include <linux/string.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/fb.h>
  26 #include <linux/gfp.h>
  27 #include <linux/mtd/mtd.h>
  28 #include <linux/mtd/onenand.h>
  29 #include <linux/mtd/partitions.h>
  30 #include <linux/mmc/host.h>
  31 #include <linux/ioport.h>
  32 #include <linux/platform_data/s3c-hsudc.h>
  33 #include <linux/platform_data/s3c-hsotg.h>
  34
  35 #include <media/s5p_hdmi.h>
  36
  37 #include <asm/irq.h>
  38 #include <asm/pmu.h>
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/map.h>
  41 #include <asm/mach/irq.h>
  42
  43 #include <mach/hardware.h>
  44 #include <mach/dma.h>
  45 #include <mach/irqs.h>
  46 #include <mach/map.h>
  47
  48 #include <plat/cpu.h>
  49 #include <plat/devs.h>
  50 #include <plat/adc.h>
  51 #include <plat/ata.h>
  52 #include <plat/ehci.h>
  53 #include <plat/fb.h>
  54 #include <plat/fb-s3c2410.h>
  55 #include <plat/hdmi.h>
  56 #include <plat/hwmon.h>
  57 #include <plat/iic.h>
  58 #include <plat/keypad.h>
  59 #include <plat/mci.h>
  60 #include <plat/nand.h>
  61 #include <plat/sdhci.h>
  62 #include <plat/ts.h>
  63 #include <plat/udc.h>
  64 #include <plat/usb-control.h>
  65 #include <plat/usb-phy.h>
  66 #include <plat/regs-iic.h>
  67 #include <plat/regs-serial.h>
  68 #include <plat/regs-spi.h>
  69 #include <plat/s3c64xx-spi.h>
  70
  71 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  72
  73 /* AC97 */
  74 #ifdef CONFIG_CPU_S3C2440
  75 static struct resource s3c_ac97_resource[] = {
  76         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  77         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  78         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  79         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  80         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  81 };
  82
  83 struct platform_device s3c_device_ac97 = {
  84         .name           = "samsung-ac97",
  85         .id             = -1,
  86         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
  87         .resource       = s3c_ac97_resource,
  88         .dev            = {
  89                 .dma_mask               = &samsung_device_dma_mask,
  90                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  91         }
  92 };
  93 #endif /* CONFIG_CPU_S3C2440 */
  94
  95 /* ADC */
  96
  97 #ifdef CONFIG_PLAT_S3C24XX
  98 static struct resource s3c_adc_resource[] = {
  99         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
 100         [1] = DEFINE_RES_IRQ(IRQ_TC),
 101         [2] = DEFINE_RES_IRQ(IRQ_ADC),
 102 };
 103
 104 struct platform_device s3c_device_adc = {
 105         .name           = "s3c24xx-adc",
 106         .id             = -1,
 107         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 108         .resource       = s3c_adc_resource,
 109 };
 110 #endif /* CONFIG_PLAT_S3C24XX */
 111
 112 #if defined(CONFIG_SAMSUNG_DEV_ADC)
 113 static struct resource s3c_adc_resource[] = {
 114         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
 115         [1] = DEFINE_RES_IRQ(IRQ_TC),
 116         [2] = DEFINE_RES_IRQ(IRQ_ADC),
 117 };
 118
 119 struct platform_device s3c_device_adc = {
 120         .name           = "samsung-adc",
 121         .id             = -1,
 122         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 123         .resource       = s3c_adc_resource,
 124 };
 125 #endif /* CONFIG_SAMSUNG_DEV_ADC */
 126
 127 /* Camif Controller */
 128
 129 #ifdef CONFIG_CPU_S3C2440
 130 static struct resource s3c_camif_resource[] = {
 131         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
 132         [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
 133         [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
 134 };
 135
 136 struct platform_device s3c_device_camif = {
 137         .name           = "s3c2440-camif",
 138         .id             = -1,
 139         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
 140         .resource       = s3c_camif_resource,
 141         .dev            = {
 142                 .dma_mask               = &samsung_device_dma_mask,
 143                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 144         }
 145 };
 146 #endif /* CONFIG_CPU_S3C2440 */
 147
 148 /* ASOC DMA */
 149
 150 struct platform_device samsung_asoc_dma = {
 151         .name           = "samsung-audio",
 152         .id             = -1,
 153         .dev            = {
 154                 .dma_mask               = &samsung_device_dma_mask,
 155                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 156         }
 157 };
 158
 159 struct platform_device samsung_asoc_idma = {
 160         .name           = "samsung-idma",
 161         .id             = -1,
 162         .dev            = {
 163                 .dma_mask               = &samsung_device_dma_mask,
 164                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 165         }
 166 };
 167
 168 /* FB */
 169
 170 #ifdef CONFIG_S3C_DEV_FB
 171 static struct resource s3c_fb_resource[] = {
 172         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
 173         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
 174         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
 175         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
 176 };
 177
 178 struct platform_device s3c_device_fb = {
 179         .name           = "s3c-fb",
 180         .id             = -1,
 181         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
 182         .resource       = s3c_fb_resource,
 183         .dev            = {
 184                 .dma_mask               = &samsung_device_dma_mask,
 185                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 186         },
 187 };
 188
 189 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
 190 {
 191         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 192                          &s3c_device_fb);
 193 }
 194 #endif /* CONFIG_S3C_DEV_FB */
 195
 196 /* FIMC */
 197
 198 #ifdef CONFIG_S5P_DEV_FIMC0
 199 static struct resource s5p_fimc0_resource[] = {
 200         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
 201         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
 202 };
 203
 204 struct platform_device s5p_device_fimc0 = {
 205         .name           = "s5p-fimc",
 206         .id             = 0,
 207         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
 208         .resource       = s5p_fimc0_resource,
 209         .dev            = {
 210                 .dma_mask               = &samsung_device_dma_mask,
 211                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 212         },
 213 };
 214
 215 struct platform_device s5p_device_fimc_md = {
 216         .name   = "s5p-fimc-md",
 217         .id     = -1,
 218 };
 219 #endif /* CONFIG_S5P_DEV_FIMC0 */
 220
 221 #ifdef CONFIG_S5P_DEV_FIMC1
 222 static struct resource s5p_fimc1_resource[] = {
 223         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
 224         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
 225 };
 226
 227 struct platform_device s5p_device_fimc1 = {
 228         .name           = "s5p-fimc",
 229         .id             = 1,
 230         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
 231         .resource       = s5p_fimc1_resource,
 232         .dev            = {
 233                 .dma_mask               = &samsung_device_dma_mask,
 234                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 235         },
 236 };
 237 #endif /* CONFIG_S5P_DEV_FIMC1 */
 238
 239 #ifdef CONFIG_S5P_DEV_FIMC2
 240 static struct resource s5p_fimc2_resource[] = {
 241         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
 242         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
 243 };
 244
 245 struct platform_device s5p_device_fimc2 = {
 246         .name           = "s5p-fimc",
 247         .id             = 2,
 248         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
 249         .resource       = s5p_fimc2_resource,
 250         .dev            = {
 251                 .dma_mask               = &samsung_device_dma_mask,
 252                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 253         },
 254 };
 255 #endif /* CONFIG_S5P_DEV_FIMC2 */
 256
 257 #ifdef CONFIG_S5P_DEV_FIMC3
 258 static struct resource s5p_fimc3_resource[] = {
 259         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
 260         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
 261 };
 262
 263 struct platform_device s5p_device_fimc3 = {
 264         .name           = "s5p-fimc",
 265         .id             = 3,
 266         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
 267         .resource       = s5p_fimc3_resource,
 268         .dev            = {
 269                 .dma_mask               = &samsung_device_dma_mask,
 270                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 271         },
 272 };
 273 #endif /* CONFIG_S5P_DEV_FIMC3 */
 274
 275 /* G2D */
 276
 277 #ifdef CONFIG_S5P_DEV_G2D
 278 static struct resource s5p_g2d_resource[] = {
 279         [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
 280         [1] = DEFINE_RES_IRQ(IRQ_2D),
 281 };
 282
 283 struct platform_device s5p_device_g2d = {
 284         .name           = "s5p-g2d",
 285         .id             = 0,
 286         .num_resources  = ARRAY_SIZE(s5p_g2d_resource),
 287         .resource       = s5p_g2d_resource,
 288         .dev            = {
 289                 .dma_mask               = &samsung_device_dma_mask,
 290                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 291         },
 292 };
 293 #endif /* CONFIG_S5P_DEV_G2D */
 294
 295 #ifdef CONFIG_S5P_DEV_JPEG
 296 static struct resource s5p_jpeg_resource[] = {
 297         [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
 298         [1] = DEFINE_RES_IRQ(IRQ_JPEG),
 299 };
 300
 301 struct platform_device s5p_device_jpeg = {
 302         .name           = "s5p-jpeg",
 303         .id             = 0,
 304         .num_resources  = ARRAY_SIZE(s5p_jpeg_resource),
 305         .resource       = s5p_jpeg_resource,
 306         .dev            = {
 307                 .dma_mask               = &samsung_device_dma_mask,
 308                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 309         },
 310 };
 311 #endif /*  CONFIG_S5P_DEV_JPEG */
 312
 313 /* FIMD0 */
 314
 315 #ifdef CONFIG_S5P_DEV_FIMD0
 316 static struct resource s5p_fimd0_resource[] = {
 317         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
 318         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
 319         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
 320         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
 321 };
 322
 323 struct platform_device s5p_device_fimd0 = {
 324         .name           = "s5p-fb",
 325         .id             = 0,
 326         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
 327         .resource       = s5p_fimd0_resource,
 328         .dev            = {
 329                 .dma_mask               = &samsung_device_dma_mask,
 330                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 331         },
 332 };
 333
 334 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
 335 {
 336         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 337                          &s5p_device_fimd0);
 338 }
 339 #endif /* CONFIG_S5P_DEV_FIMD0 */
 340
 341 /* HWMON */
 342
 343 #ifdef CONFIG_S3C_DEV_HWMON
 344 struct platform_device s3c_device_hwmon = {
 345         .name           = "s3c-hwmon",
 346         .id             = -1,
 347         .dev.parent     = &s3c_device_adc.dev,
 348 };
 349
 350 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
 351 {
 352         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
 353                          &s3c_device_hwmon);
 354 }
 355 #endif /* CONFIG_S3C_DEV_HWMON */
 356
 357 /* HSMMC */
 358
 359 #ifdef CONFIG_S3C_DEV_HSMMC
 360 static struct resource s3c_hsmmc_resource[] = {
 361         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
 362         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
 363 };
 364
 365 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
 366         .max_width      = 4,
 367         .host_caps      = (MMC_CAP_4_BIT_DATA |
 368                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 369 };
 370
 371 struct platform_device s3c_device_hsmmc0 = {
 372         .name           = "s3c-sdhci",
 373         .id             = 0,
 374         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
 375         .resource       = s3c_hsmmc_resource,
 376         .dev            = {
 377                 .dma_mask               = &samsung_device_dma_mask,
 378                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 379                 .platform_data          = &s3c_hsmmc0_def_platdata,
 380         },
 381 };
 382
 383 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 384 {
 385         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
 386 }
 387 #endif /* CONFIG_S3C_DEV_HSMMC */
 388
 389 #ifdef CONFIG_S3C_DEV_HSMMC1
 390 static struct resource s3c_hsmmc1_resource[] = {
 391         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
 392         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
 393 };
 394
 395 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
 396         .max_width      = 4,
 397         .host_caps      = (MMC_CAP_4_BIT_DATA |
 398                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 399 };
 400
 401 struct platform_device s3c_device_hsmmc1 = {
 402         .name           = "s3c-sdhci",
 403         .id             = 1,
 404         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
 405         .resource       = s3c_hsmmc1_resource,
 406         .dev            = {
 407                 .dma_mask               = &samsung_device_dma_mask,
 408                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 409                 .platform_data          = &s3c_hsmmc1_def_platdata,
 410         },
 411 };
 412
 413 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 414 {
 415         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
 416 }
 417 #endif /* CONFIG_S3C_DEV_HSMMC1 */
 418
 419 /* HSMMC2 */
 420
 421 #ifdef CONFIG_S3C_DEV_HSMMC2
 422 static struct resource s3c_hsmmc2_resource[] = {
 423         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
 424         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
 425 };
 426
 427 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
 428         .max_width      = 4,
 429         .host_caps      = (MMC_CAP_4_BIT_DATA |
 430                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 431 };
 432
 433 struct platform_device s3c_device_hsmmc2 = {
 434         .name           = "s3c-sdhci",
 435         .id             = 2,
 436         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
 437         .resource       = s3c_hsmmc2_resource,
 438         .dev            = {
 439                 .dma_mask               = &samsung_device_dma_mask,
 440                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 441                 .platform_data          = &s3c_hsmmc2_def_platdata,
 442         },
 443 };
 444
 445 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 446 {
 447         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
 448 }
 449 #endif /* CONFIG_S3C_DEV_HSMMC2 */
 450
 451 #ifdef CONFIG_S3C_DEV_HSMMC3
 452 static struct resource s3c_hsmmc3_resource[] = {
 453         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
 454         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
 455 };
 456
 457 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
 458         .max_width      = 4,
 459         .host_caps      = (MMC_CAP_4_BIT_DATA |
 460                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 461 };
 462
 463 struct platform_device s3c_device_hsmmc3 = {
 464         .name           = "s3c-sdhci",
 465         .id             = 3,
 466         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
 467         .resource       = s3c_hsmmc3_resource,
 468         .dev            = {
 469                 .dma_mask               = &samsung_device_dma_mask,
 470                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 471                 .platform_data          = &s3c_hsmmc3_def_platdata,
 472         },
 473 };
 474
 475 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 476 {
 477         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
 478 }
 479 #endif /* CONFIG_S3C_DEV_HSMMC3 */
 480
 481 /* I2C */
 482
 483 static struct resource s3c_i2c0_resource[] = {
 484         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
 485         [1] = DEFINE_RES_IRQ(IRQ_IIC),
 486 };
 487
 488 struct platform_device s3c_device_i2c0 = {
 489         .name           = "s3c2410-i2c",
 490 #ifdef CONFIG_S3C_DEV_I2C1
 491         .id             = 0,
 492 #else
 493         .id             = -1,
 494 #endif
 495         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
 496         .resource       = s3c_i2c0_resource,
 497 };
 498
 499 struct s3c2410_platform_i2c default_i2c_data __initdata = {
 500         .flags          = 0,
 501         .slave_addr     = 0x10,
 502         .frequency      = 100*1000,
 503         .sda_delay      = 100,
 504 };
 505
 506 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
 507 {
 508         struct s3c2410_platform_i2c *npd;
 509
 510         if (!pd) {
 511                 pd = &default_i2c_data;
 512                 pd->bus_num = 0;
 513         }
 514
 515         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 516                                &s3c_device_i2c0);
 517
 518         if (!npd->cfg_gpio)
 519                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
 520 }
 521
 522 #ifdef CONFIG_S3C_DEV_I2C1
 523 static struct resource s3c_i2c1_resource[] = {
 524         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
 525         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
 526 };
 527
 528 struct platform_device s3c_device_i2c1 = {
 529         .name           = "s3c2410-i2c",
 530         .id             = 1,
 531         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
 532         .resource       = s3c_i2c1_resource,
 533 };
 534
 535 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
 536 {
 537         struct s3c2410_platform_i2c *npd;
 538
 539         if (!pd) {
 540                 pd = &default_i2c_data;
 541                 pd->bus_num = 1;
 542         }
 543
 544         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 545                                &s3c_device_i2c1);
 546
 547         if (!npd->cfg_gpio)
 548                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
 549 }
 550 #endif /* CONFIG_S3C_DEV_I2C1 */
 551
 552 #ifdef CONFIG_S3C_DEV_I2C2
 553 static struct resource s3c_i2c2_resource[] = {
 554         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
 555         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
 556 };
 557
 558 struct platform_device s3c_device_i2c2 = {
 559         .name           = "s3c2410-i2c",
 560         .id             = 2,
 561         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
 562         .resource       = s3c_i2c2_resource,
 563 };
 564
 565 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
 566 {
 567         struct s3c2410_platform_i2c *npd;
 568
 569         if (!pd) {
 570                 pd = &default_i2c_data;
 571                 pd->bus_num = 2;
 572         }
 573
 574         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 575                                &s3c_device_i2c2);
 576
 577         if (!npd->cfg_gpio)
 578                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
 579 }
 580 #endif /* CONFIG_S3C_DEV_I2C2 */
 581
 582 #ifdef CONFIG_S3C_DEV_I2C3
 583 static struct resource s3c_i2c3_resource[] = {
 584         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
 585         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
 586 };
 587
 588 struct platform_device s3c_device_i2c3 = {
 589         .name           = "s3c2440-i2c",
 590         .id             = 3,
 591         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
 592         .resource       = s3c_i2c3_resource,
 593 };
 594
 595 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
 596 {
 597         struct s3c2410_platform_i2c *npd;
 598
 599         if (!pd) {
 600                 pd = &default_i2c_data;
 601                 pd->bus_num = 3;
 602         }
 603
 604         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 605                                &s3c_device_i2c3);
 606
 607         if (!npd->cfg_gpio)
 608                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
 609 }
 610 #endif /*CONFIG_S3C_DEV_I2C3 */
 611
 612 #ifdef CONFIG_S3C_DEV_I2C4
 613 static struct resource s3c_i2c4_resource[] = {
 614         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
 615         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
 616 };
 617
 618 struct platform_device s3c_device_i2c4 = {
 619         .name           = "s3c2440-i2c",
 620         .id             = 4,
 621         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
 622         .resource       = s3c_i2c4_resource,
 623 };
 624
 625 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
 626 {
 627         struct s3c2410_platform_i2c *npd;
 628
 629         if (!pd) {
 630                 pd = &default_i2c_data;
 631                 pd->bus_num = 4;
 632         }
 633
 634         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 635                                &s3c_device_i2c4);
 636
 637         if (!npd->cfg_gpio)
 638                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
 639 }
 640 #endif /*CONFIG_S3C_DEV_I2C4 */
 641
 642 #ifdef CONFIG_S3C_DEV_I2C5
 643 static struct resource s3c_i2c5_resource[] = {
 644         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
 645         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
 646 };
 647
 648 struct platform_device s3c_device_i2c5 = {
 649         .name           = "s3c2440-i2c",
 650         .id             = 5,
 651         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
 652         .resource       = s3c_i2c5_resource,
 653 };
 654
 655 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
 656 {
 657         struct s3c2410_platform_i2c *npd;
 658
 659         if (!pd) {
 660                 pd = &default_i2c_data;
 661                 pd->bus_num = 5;
 662         }
 663
 664         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 665                                &s3c_device_i2c5);
 666
 667         if (!npd->cfg_gpio)
 668                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
 669 }
 670 #endif /*CONFIG_S3C_DEV_I2C5 */
 671
 672 #ifdef CONFIG_S3C_DEV_I2C6
 673 static struct resource s3c_i2c6_resource[] = {
 674         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
 675         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
 676 };
 677
 678 struct platform_device s3c_device_i2c6 = {
 679         .name           = "s3c2440-i2c",
 680         .id             = 6,
 681         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
 682         .resource       = s3c_i2c6_resource,
 683 };
 684
 685 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
 686 {
 687         struct s3c2410_platform_i2c *npd;
 688
 689         if (!pd) {
 690                 pd = &default_i2c_data;
 691                 pd->bus_num = 6;
 692         }
 693
 694         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 695                                &s3c_device_i2c6);
 696
 697         if (!npd->cfg_gpio)
 698                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
 699 }
 700 #endif /* CONFIG_S3C_DEV_I2C6 */
 701
 702 #ifdef CONFIG_S3C_DEV_I2C7
 703 static struct resource s3c_i2c7_resource[] = {
 704         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
 705         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
 706 };
 707
 708 struct platform_device s3c_device_i2c7 = {
 709         .name           = "s3c2440-i2c",
 710         .id             = 7,
 711         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
 712         .resource       = s3c_i2c7_resource,
 713 };
 714
 715 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
 716 {
 717         struct s3c2410_platform_i2c *npd;
 718
 719         if (!pd) {
 720                 pd = &default_i2c_data;
 721                 pd->bus_num = 7;
 722         }
 723
 724         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 725                                &s3c_device_i2c7);
 726
 727         if (!npd->cfg_gpio)
 728                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
 729 }
 730 #endif /* CONFIG_S3C_DEV_I2C7 */
 731
 732 /* I2C HDMIPHY */
 733
 734 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
 735 static struct resource s5p_i2c_resource[] = {
 736         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
 737         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
 738 };
 739
 740 struct platform_device s5p_device_i2c_hdmiphy = {
 741         .name           = "s3c2440-hdmiphy-i2c",
 742         .id             = -1,
 743         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
 744         .resource       = s5p_i2c_resource,
 745 };
 746
 747 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
 748 {
 749         struct s3c2410_platform_i2c *npd;
 750
 751         if (!pd) {
 752                 pd = &default_i2c_data;
 753
 754                 if (soc_is_exynos4210() ||
 755                     soc_is_exynos4212() || soc_is_exynos4412())
 756                         pd->bus_num = 8;
 757                 else if (soc_is_s5pv210())
 758                         pd->bus_num = 3;
 759                 else
 760                         pd->bus_num = 0;
 761         }
 762
 763         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 764                                &s5p_device_i2c_hdmiphy);
 765 }
 766
 767 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
 768
 769 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
 770                                   struct i2c_board_info *mhl_info, int mhl_bus)
 771 {
 772         struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
 773
 774         if (soc_is_exynos4210() ||
 775             soc_is_exynos4212() || soc_is_exynos4412())
 776                 pd->hdmiphy_bus = 8;
 777         else if (soc_is_s5pv210())
 778                 pd->hdmiphy_bus = 3;
 779         else
 780                 pd->hdmiphy_bus = 0;
 781
 782         pd->hdmiphy_info = hdmiphy_info;
 783         pd->mhl_info = mhl_info;
 784         pd->mhl_bus = mhl_bus;
 785
 786         s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
 787                          &s5p_device_hdmi);
 788 }
 789
 790 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
 791
 792 /* I2S */
 793
 794 #ifdef CONFIG_PLAT_S3C24XX
 795 static struct resource s3c_iis_resource[] = {
 796         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
 797 };
 798
 799 struct platform_device s3c_device_iis = {
 800         .name           = "s3c24xx-iis",
 801         .id             = -1,
 802         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
 803         .resource       = s3c_iis_resource,
 804         .dev            = {
 805                 .dma_mask               = &samsung_device_dma_mask,
 806                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 807         }
 808 };
 809 #endif /* CONFIG_PLAT_S3C24XX */
 810
 811 /* IDE CFCON */
 812
 813 #ifdef CONFIG_SAMSUNG_DEV_IDE
 814 static struct resource s3c_cfcon_resource[] = {
 815         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
 816         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
 817 };
 818
 819 struct platform_device s3c_device_cfcon = {
 820         .id             = 0,
 821         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
 822         .resource       = s3c_cfcon_resource,
 823 };
 824
 825 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
 826 {
 827         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
 828                          &s3c_device_cfcon);
 829 }
 830 #endif /* CONFIG_SAMSUNG_DEV_IDE */
 831
 832 /* KEYPAD */
 833
 834 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
 835 static struct resource samsung_keypad_resources[] = {
 836         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
 837         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
 838 };
 839
 840 struct platform_device samsung_device_keypad = {
 841         .name           = "samsung-keypad",
 842         .id             = -1,
 843         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
 844         .resource       = samsung_keypad_resources,
 845 };
 846
 847 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
 848 {
 849         struct samsung_keypad_platdata *npd;
 850
 851         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
 852                         &samsung_device_keypad);
 853
 854         if (!npd->cfg_gpio)
 855                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
 856 }
 857 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
 858
 859 /* LCD Controller */
 860
 861 #ifdef CONFIG_PLAT_S3C24XX
 862 static struct resource s3c_lcd_resource[] = {
 863         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
 864         [1] = DEFINE_RES_IRQ(IRQ_LCD),
 865 };
 866
 867 struct platform_device s3c_device_lcd = {
 868         .name           = "s3c2410-lcd",
 869         .id             = -1,
 870         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
 871         .resource       = s3c_lcd_resource,
 872         .dev            = {
 873                 .dma_mask               = &samsung_device_dma_mask,
 874                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 875         }
 876 };
 877
 878 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 879 {
 880         struct s3c2410fb_mach_info *npd;
 881
 882         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
 883         if (npd) {
 884                 npd->displays = kmemdup(pd->displays,
 885                         sizeof(struct s3c2410fb_display) * npd->num_displays,
 886                         GFP_KERNEL);
 887                 if (!npd->displays)
 888                         printk(KERN_ERR "no memory for LCD display data\n");
 889         } else {
 890                 printk(KERN_ERR "no memory for LCD platform data\n");
 891         }
 892 }
 893 #endif /* CONFIG_PLAT_S3C24XX */
 894
 895 /* MFC */
 896
 897 #ifdef CONFIG_S5P_DEV_MFC
 898 static struct resource s5p_mfc_resource[] = {
 899         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
 900         [1] = DEFINE_RES_IRQ(IRQ_MFC),
 901 };
 902
 903 struct platform_device s5p_device_mfc = {
 904         .name           = "s5p-mfc",
 905         .id             = -1,
 906         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
 907         .resource       = s5p_mfc_resource,
 908 };
 909
 910 /*
 911  * MFC hardware has 2 memory interfaces which are modelled as two separate
 912  * platform devices to let dma-mapping distinguish between them.
 913  *
 914  * MFC parent device (s5p_device_mfc) must be registered before memory
 915  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
 916  */
 917
 918 struct platform_device s5p_device_mfc_l = {
 919         .name           = "s5p-mfc-l",
 920         .id             = -1,
 921         .dev            = {
 922                 .parent                 = &s5p_device_mfc.dev,
 923                 .dma_mask               = &samsung_device_dma_mask,
 924                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 925         },
 926 };
 927
 928 struct platform_device s5p_device_mfc_r = {
 929         .name           = "s5p-mfc-r",
 930         .id             = -1,
 931         .dev            = {
 932                 .parent                 = &s5p_device_mfc.dev,
 933                 .dma_mask               = &samsung_device_dma_mask,
 934                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 935         },
 936 };
 937 #endif /* CONFIG_S5P_DEV_MFC */
 938
 939 /* MIPI CSIS */
 940
 941 #ifdef CONFIG_S5P_DEV_CSIS0
 942 static struct resource s5p_mipi_csis0_resource[] = {
 943         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
 944         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
 945 };
 946
 947 struct platform_device s5p_device_mipi_csis0 = {
 948         .name           = "s5p-mipi-csis",
 949         .id             = 0,
 950         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
 951         .resource       = s5p_mipi_csis0_resource,
 952 };
 953 #endif /* CONFIG_S5P_DEV_CSIS0 */
 954
 955 #ifdef CONFIG_S5P_DEV_CSIS1
 956 static struct resource s5p_mipi_csis1_resource[] = {
 957         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
 958         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
 959 };
 960
 961 struct platform_device s5p_device_mipi_csis1 = {
 962         .name           = "s5p-mipi-csis",
 963         .id             = 1,
 964         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
 965         .resource       = s5p_mipi_csis1_resource,
 966 };
 967 #endif
 968
 969 /* NAND */
 970
 971 #ifdef CONFIG_S3C_DEV_NAND
 972 static struct resource s3c_nand_resource[] = {
 973         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
 974 };
 975
 976 struct platform_device s3c_device_nand = {
 977         .name           = "s3c2410-nand",
 978         .id             = -1,
 979         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
 980         .resource       = s3c_nand_resource,
 981 };
 982
 983 /*
 984  * s3c_nand_copy_set() - copy nand set data
 985  * @set: The new structure, directly copied from the old.
 986  *
 987  * Copy all the fields from the NAND set field from what is probably __initdata
 988  * to new kernel memory. The code returns 0 if the copy happened correctly or
 989  * an error code for the calling function to display.
 990  *
 991  * Note, we currently do not try and look to see if we've already copied the
 992  * data in a previous set.
 993  */
 994 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
 995 {
 996         void *ptr;
 997         int size;
 998
 999         size = sizeof(struct mtd_partition) * set->nr_partitions;
1000         if (size) {
1001                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
1002                 set->partitions = ptr;
1003
1004                 if (!ptr)
1005                         return -ENOMEM;
1006         }
1007
1008         if (set->nr_map && set->nr_chips) {
1009                 size = sizeof(int) * set->nr_chips;
1010                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1011                 set->nr_map = ptr;
1012
1013                 if (!ptr)
1014                         return -ENOMEM;
1015         }
1016
1017         if (set->ecc_layout) {
1018                 ptr = kmemdup(set->ecc_layout,
1019                               sizeof(struct nand_ecclayout), GFP_KERNEL);
1020                 set->ecc_layout = ptr;
1021
1022                 if (!ptr)
1023                         return -ENOMEM;
1024         }
1025
1026         return 0;
1027 }
1028
1029 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1030 {
1031         struct s3c2410_platform_nand *npd;
1032         int size;
1033         int ret;
1034
1035         /* note, if we get a failure in allocation, we simply drop out of the
1036          * function. If there is so little memory available at initialisation
1037          * time then there is little chance the system is going to run.
1038          */
1039
1040         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1041                                 &s3c_device_nand);
1042         if (!npd)
1043                 return;
1044
1045         /* now see if we need to copy any of the nand set data */
1046
1047         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1048         if (size) {
1049                 struct s3c2410_nand_set *from = npd->sets;
1050                 struct s3c2410_nand_set *to;
1051                 int i;
1052
1053                 to = kmemdup(from, size, GFP_KERNEL);
1054                 npd->sets = to; /* set, even if we failed */
1055
1056                 if (!to) {
1057                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1058                         return;
1059                 }
1060
1061                 for (i = 0; i < npd->nr_sets; i++) {
1062                         ret = s3c_nand_copy_set(to);
1063                         if (ret) {
1064                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1065                                 __func__, i);
1066                                 return;
1067                         }
1068                         to++;
1069                 }
1070         }
1071 }
1072 #endif /* CONFIG_S3C_DEV_NAND */
1073
1074 /* ONENAND */
1075
1076 #ifdef CONFIG_S3C_DEV_ONENAND
1077 static struct resource s3c_onenand_resources[] = {
1078         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1079         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1080         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1081 };
1082
1083 struct platform_device s3c_device_onenand = {
1084         .name           = "samsung-onenand",
1085         .id             = 0,
1086         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1087         .resource       = s3c_onenand_resources,
1088 };
1089 #endif /* CONFIG_S3C_DEV_ONENAND */
1090
1091 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1092 static struct resource s3c64xx_onenand1_resources[] = {
1093         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1094         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1095         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1096 };
1097
1098 struct platform_device s3c64xx_device_onenand1 = {
1099         .name           = "samsung-onenand",
1100         .id             = 1,
1101         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1102         .resource       = s3c64xx_onenand1_resources,
1103 };
1104
1105 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1106 {
1107         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1108                          &s3c64xx_device_onenand1);
1109 }
1110 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1111
1112 #ifdef CONFIG_S5P_DEV_ONENAND
1113 static struct resource s5p_onenand_resources[] = {
1114         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1115         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1116         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1117 };
1118
1119 struct platform_device s5p_device_onenand = {
1120         .name           = "s5pc110-onenand",
1121         .id             = -1,
1122         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1123         .resource       = s5p_onenand_resources,
1124 };
1125 #endif /* CONFIG_S5P_DEV_ONENAND */
1126
1127 /* PMU */
1128
1129 #ifdef CONFIG_PLAT_S5P
1130 static struct resource s5p_pmu_resource[] = {
1131         DEFINE_RES_IRQ(IRQ_PMU)
1132 };
1133
1134 static struct platform_device s5p_device_pmu = {
1135         .name           = "arm-pmu",
1136         .id             = ARM_PMU_DEVICE_CPU,
1137         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1138         .resource       = s5p_pmu_resource,
1139 };
1140
1141 static int __init s5p_pmu_init(void)
1142 {
1143         platform_device_register(&s5p_device_pmu);
1144         return 0;
1145 }
1146 arch_initcall(s5p_pmu_init);
1147 #endif /* CONFIG_PLAT_S5P */
1148
1149 /* PWM Timer */
1150
1151 #ifdef CONFIG_SAMSUNG_DEV_PWM
1152
1153 #define TIMER_RESOURCE_SIZE (1)
1154
1155 #define TIMER_RESOURCE(_tmr, _irq)                      \
1156         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1157                 [0] = {                                 \
1158                         .start  = _irq,                 \
1159                         .end    = _irq,                 \
1160                         .flags  = IORESOURCE_IRQ        \
1161                 }                                       \
1162         }
1163
1164 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1165         .name           = "s3c24xx-pwm",                \
1166         .id             = _tmr_no,                      \
1167         .num_resources  = TIMER_RESOURCE_SIZE,          \
1168         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1169
1170 /*
1171  * since we already have an static mapping for the timer,
1172  * we do not bother setting any IO resource for the base.
1173  */
1174
1175 struct platform_device s3c_device_timer[] = {
1176         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1177         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1178         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1179         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1180         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1181 };
1182 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1183
1184 /* RTC */
1185
1186 #ifdef CONFIG_PLAT_S3C24XX
1187 static struct resource s3c_rtc_resource[] = {
1188         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1189         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1190         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1191 };
1192
1193 struct platform_device s3c_device_rtc = {
1194         .name           = "s3c2410-rtc",
1195         .id             = -1,
1196         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1197         .resource       = s3c_rtc_resource,
1198 };
1199 #endif /* CONFIG_PLAT_S3C24XX */
1200
1201 #ifdef CONFIG_S3C_DEV_RTC
1202 static struct resource s3c_rtc_resource[] = {
1203         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1204         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1205         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1206 };
1207
1208 struct platform_device s3c_device_rtc = {
1209         .name           = "s3c64xx-rtc",
1210         .id             = -1,
1211         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1212         .resource       = s3c_rtc_resource,
1213 };
1214 #endif /* CONFIG_S3C_DEV_RTC */
1215
1216 /* SDI */
1217
1218 #ifdef CONFIG_PLAT_S3C24XX
1219 static struct resource s3c_sdi_resource[] = {
1220         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1221         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1222 };
1223
1224 struct platform_device s3c_device_sdi = {
1225         .name           = "s3c2410-sdi",
1226         .id             = -1,
1227         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1228         .resource       = s3c_sdi_resource,
1229 };
1230
1231 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1232 {
1233         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1234                          &s3c_device_sdi);
1235 }
1236 #endif /* CONFIG_PLAT_S3C24XX */
1237
1238 /* SPI */
1239
1240 #ifdef CONFIG_PLAT_S3C24XX
1241 static struct resource s3c_spi0_resource[] = {
1242         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1243         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1244 };
1245
1246 struct platform_device s3c_device_spi0 = {
1247         .name           = "s3c2410-spi",
1248         .id             = 0,
1249         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1250         .resource       = s3c_spi0_resource,
1251         .dev            = {
1252                 .dma_mask               = &samsung_device_dma_mask,
1253                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1254         }
1255 };
1256
1257 static struct resource s3c_spi1_resource[] = {
1258         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1259         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1260 };
1261
1262 struct platform_device s3c_device_spi1 = {
1263         .name           = "s3c2410-spi",
1264         .id             = 1,
1265         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1266         .resource       = s3c_spi1_resource,
1267         .dev            = {
1268                 .dma_mask               = &samsung_device_dma_mask,
1269                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1270         }
1271 };
1272 #endif /* CONFIG_PLAT_S3C24XX */
1273
1274 /* Touchscreen */
1275
1276 #ifdef CONFIG_PLAT_S3C24XX
1277 static struct resource s3c_ts_resource[] = {
1278         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1279         [1] = DEFINE_RES_IRQ(IRQ_TC),
1280 };
1281
1282 struct platform_device s3c_device_ts = {
1283         .name           = "s3c2410-ts",
1284         .id             = -1,
1285         .dev.parent     = &s3c_device_adc.dev,
1286         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1287         .resource       = s3c_ts_resource,
1288 };
1289
1290 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1291 {
1292         s3c_set_platdata(hard_s3c2410ts_info,
1293                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1294 }
1295 #endif /* CONFIG_PLAT_S3C24XX */
1296
1297 #ifdef CONFIG_SAMSUNG_DEV_TS
1298 static struct resource s3c_ts_resource[] = {
1299         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1300         [1] = DEFINE_RES_IRQ(IRQ_TC),
1301 };
1302
1303 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1304         .delay                  = 10000,
1305         .presc                  = 49,
1306         .oversampling_shift     = 2,
1307 };
1308
1309 struct platform_device s3c_device_ts = {
1310         .name           = "s3c64xx-ts",
1311         .id             = -1,
1312         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1313         .resource       = s3c_ts_resource,
1314 };
1315
1316 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1317 {
1318         if (!pd)
1319                 pd = &default_ts_data;
1320
1321         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1322                          &s3c_device_ts);
1323 }
1324 #endif /* CONFIG_SAMSUNG_DEV_TS */
1325
1326 /* TV */
1327
1328 #ifdef CONFIG_S5P_DEV_TV
1329
1330 static struct resource s5p_hdmi_resources[] = {
1331         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1332         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1333 };
1334
1335 struct platform_device s5p_device_hdmi = {
1336         .name           = "s5p-hdmi",
1337         .id             = -1,
1338         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1339         .resource       = s5p_hdmi_resources,
1340 };
1341
1342 static struct resource s5p_sdo_resources[] = {
1343         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1344         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1345 };
1346
1347 struct platform_device s5p_device_sdo = {
1348         .name           = "s5p-sdo",
1349         .id             = -1,
1350         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1351         .resource       = s5p_sdo_resources,
1352 };
1353
1354 static struct resource s5p_mixer_resources[] = {
1355         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1356         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1357         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1358 };
1359
1360 struct platform_device s5p_device_mixer = {
1361         .name           = "s5p-mixer",
1362         .id             = -1,
1363         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1364         .resource       = s5p_mixer_resources,
1365         .dev            = {
1366                 .dma_mask               = &samsung_device_dma_mask,
1367                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1368         }
1369 };
1370 #endif /* CONFIG_S5P_DEV_TV */
1371
1372 /* USB */
1373
1374 #ifdef CONFIG_S3C_DEV_USB_HOST
1375 static struct resource s3c_usb_resource[] = {
1376         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1377         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1378 };
1379
1380 struct platform_device s3c_device_ohci = {
1381         .name           = "s3c2410-ohci",
1382         .id             = -1,
1383         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1384         .resource       = s3c_usb_resource,
1385         .dev            = {
1386                 .dma_mask               = &samsung_device_dma_mask,
1387                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1388         }
1389 };
1390
1391 /*
1392  * s3c_ohci_set_platdata - initialise OHCI device platform data
1393  * @info: The platform data.
1394  *
1395  * This call copies the @info passed in and sets the device .platform_data
1396  * field to that copy. The @info is copied so that the original can be marked
1397  * __initdata.
1398  */
1399
1400 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1401 {
1402         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1403                          &s3c_device_ohci);
1404 }
1405 #endif /* CONFIG_S3C_DEV_USB_HOST */
1406
1407 /* USB Device (Gadget) */
1408
1409 #ifdef CONFIG_PLAT_S3C24XX
1410 static struct resource s3c_usbgadget_resource[] = {
1411         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1412         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1413 };
1414
1415 struct platform_device s3c_device_usbgadget = {
1416         .name           = "s3c2410-usbgadget",
1417         .id             = -1,
1418         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1419         .resource       = s3c_usbgadget_resource,
1420 };
1421
1422 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1423 {
1424         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1425 }
1426 #endif /* CONFIG_PLAT_S3C24XX */
1427
1428 /* USB EHCI Host Controller */
1429
1430 #ifdef CONFIG_S5P_DEV_USB_EHCI
1431 static struct resource s5p_ehci_resource[] = {
1432         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1433         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1434 };
1435
1436 struct platform_device s5p_device_ehci = {
1437         .name           = "s5p-ehci",
1438         .id             = -1,
1439         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1440         .resource       = s5p_ehci_resource,
1441         .dev            = {
1442                 .dma_mask               = &samsung_device_dma_mask,
1443                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1444         }
1445 };
1446
1447 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1448 {
1449         struct s5p_ehci_platdata *npd;
1450
1451         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1452                         &s5p_device_ehci);
1453
1454         if (!npd->phy_init)
1455                 npd->phy_init = s5p_usb_phy_init;
1456         if (!npd->phy_exit)
1457                 npd->phy_exit = s5p_usb_phy_exit;
1458 }
1459 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1460
1461 /* USB HSOTG */
1462
1463 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1464 static struct resource s3c_usb_hsotg_resources[] = {
1465         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1466         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1467 };
1468
1469 struct platform_device s3c_device_usb_hsotg = {
1470         .name           = "s3c-hsotg",
1471         .id             = -1,
1472         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1473         .resource       = s3c_usb_hsotg_resources,
1474         .dev            = {
1475                 .dma_mask               = &samsung_device_dma_mask,
1476                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1477         },
1478 };
1479
1480 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1481 {
1482         struct s3c_hsotg_plat *npd;
1483
1484         npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1485                         &s3c_device_usb_hsotg);
1486
1487         if (!npd->phy_init)
1488                 npd->phy_init = s5p_usb_phy_init;
1489         if (!npd->phy_exit)
1490                 npd->phy_exit = s5p_usb_phy_exit;
1491 }
1492 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1493
1494 /* USB High Spped 2.0 Device (Gadget) */
1495
1496 #ifdef CONFIG_PLAT_S3C24XX
1497 static struct resource s3c_hsudc_resource[] = {
1498         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1499         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1500 };
1501
1502 struct platform_device s3c_device_usb_hsudc = {
1503         .name           = "s3c-hsudc",
1504         .id             = -1,
1505         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1506         .resource       = s3c_hsudc_resource,
1507         .dev            = {
1508                 .dma_mask               = &samsung_device_dma_mask,
1509                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1510         },
1511 };
1512
1513 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1514 {
1515         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1516 }
1517 #endif /* CONFIG_PLAT_S3C24XX */
1518
1519 /* WDT */
1520
1521 #ifdef CONFIG_S3C_DEV_WDT
1522 static struct resource s3c_wdt_resource[] = {
1523         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1524         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1525 };
1526
1527 struct platform_device s3c_device_wdt = {
1528         .name           = "s3c2410-wdt",
1529         .id             = -1,
1530         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1531         .resource       = s3c_wdt_resource,
1532 };
1533 #endif /* CONFIG_S3C_DEV_WDT */
1534
1535 #ifdef CONFIG_S3C64XX_DEV_SPI0
1536 static struct resource s3c64xx_spi0_resource[] = {
1537         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1538         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1539         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1540         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1541 };
1542
1543 struct platform_device s3c64xx_device_spi0 = {
1544         .name           = "s3c6410-spi",
1545         .id             = 0,
1546         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1547         .resource       = s3c64xx_spi0_resource,
1548         .dev = {
1549                 .dma_mask               = &samsung_device_dma_mask,
1550                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1551         },
1552 };
1553
1554 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1555                                                 int num_cs)
1556 {
1557         struct s3c64xx_spi_info pd;
1558
1559         /* Reject invalid configuration */
1560         if (!num_cs || src_clk_nr < 0) {
1561                 pr_err("%s: Invalid SPI configuration\n", __func__);
1562                 return;
1563         }
1564
1565         pd.num_cs = num_cs;
1566         pd.src_clk_nr = src_clk_nr;
1567         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1568
1569         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1570 }
1571 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1572
1573 #ifdef CONFIG_S3C64XX_DEV_SPI1
1574 static struct resource s3c64xx_spi1_resource[] = {
1575         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1576         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1577         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1578         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1579 };
1580
1581 struct platform_device s3c64xx_device_spi1 = {
1582         .name           = "s3c6410-spi",
1583         .id             = 1,
1584         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1585         .resource       = s3c64xx_spi1_resource,
1586         .dev = {
1587                 .dma_mask               = &samsung_device_dma_mask,
1588                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1589         },
1590 };
1591
1592 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1593                                                 int num_cs)
1594 {
1595         /* Reject invalid configuration */
1596         if (!num_cs || src_clk_nr < 0) {
1597                 pr_err("%s: Invalid SPI configuration\n", __func__);
1598                 return;
1599         }
1600
1601         pd.num_cs = num_cs;
1602         pd.src_clk_nr = src_clk_nr;
1603         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1604
1605         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1606 }
1607 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1608
1609 #ifdef CONFIG_S3C64XX_DEV_SPI2
1610 static struct resource s3c64xx_spi2_resource[] = {
1611         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1612         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1613         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1614         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1615 };
1616
1617 struct platform_device s3c64xx_device_spi2 = {
1618         .name           = "s3c6410-spi",
1619         .id             = 2,
1620         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1621         .resource       = s3c64xx_spi2_resource,
1622         .dev = {
1623                 .dma_mask               = &samsung_device_dma_mask,
1624                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1625         },
1626 };
1627
1628 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1629                                                 int num_cs)
1630 {
1631         struct s3c64xx_spi_info pd;
1632
1633         /* Reject invalid configuration */
1634         if (!num_cs || src_clk_nr < 0) {
1635                 pr_err("%s: Invalid SPI configuration\n", __func__);
1636                 return;
1637         }
1638
1639         pd.num_cs = num_cs;
1640         pd.src_clk_nr = src_clk_nr;
1641         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1642
1643         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1644 }
1645 #endif /* CONFIG_S3C64XX_DEV_SPI2 */