arch/arm/probes/kprobes/test-arm.c

   1 /*
   2  * arch/arm/kernel/kprobes-test-arm.c
   3  *
   4  * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <asm/system_info.h>
  14 #include <asm/opcodes.h>
  15
  16 #include "test-core.h"
  17
  18
  19 #define TEST_ISA "32"
  20
  21 #define TEST_ARM_TO_THUMB_INTERWORK_R(code1, reg, val, code2)   \
  22         TESTCASE_START(code1 #reg code2)                        \
  23         TEST_ARG_REG(reg, val)                                  \
  24         TEST_ARG_REG(14, 99f)                                   \
  25         TEST_ARG_END("")                                        \
  26         "50:    nop                     \n\t"                   \
  27         "1:     "code1 #reg code2"      \n\t"                   \
  28         "       bx      lr              \n\t"                   \
  29         ".thumb                         \n\t"                   \
  30         "3:     adr     lr, 2f          \n\t"                   \
  31         "       bx      lr              \n\t"                   \
  32         ".arm                           \n\t"                   \
  33         "2:     nop                     \n\t"                   \
  34         TESTCASE_END
  35
  36 #define TEST_ARM_TO_THUMB_INTERWORK_P(code1, reg, val, code2)   \
  37         TESTCASE_START(code1 #reg code2)                        \
  38         TEST_ARG_PTR(reg, val)                                  \
  39         TEST_ARG_REG(14, 99f)                                   \
  40         TEST_ARG_MEM(15, 3f+1)                                  \
  41         TEST_ARG_END("")                                        \
  42         "50:    nop                     \n\t"                   \
  43         "1:     "code1 #reg code2"      \n\t"                   \
  44         "       bx      lr              \n\t"                   \
  45         ".thumb                         \n\t"                   \
  46         "3:     adr     lr, 2f          \n\t"                   \
  47         "       bx      lr              \n\t"                   \
  48         ".arm                           \n\t"                   \
  49         "2:     nop                     \n\t"                   \
  50         TESTCASE_END
  51
  52
  53 void kprobe_arm_test_cases(void)
  54 {
  55         kprobe_test_flags = 0;
  56
  57         TEST_GROUP("Data-processing (register), (register-shifted register), (immediate)")
  58
  59 #define _DATA_PROCESSING_DNM(op,s,val)                                          \
  60         TEST_RR(  op "eq" s "   r0,  r",1, VAL1,", r",2, val, "")               \
  61         TEST_RR(  op "ne" s "   r1,  r",1, VAL1,", r",2, val, ", lsl #3")       \
  62         TEST_RR(  op "cs" s "   r2,  r",3, VAL1,", r",2, val, ", lsr #4")       \
  63         TEST_RR(  op "cc" s "   r3,  r",3, VAL1,", r",2, val, ", asr #5")       \
  64         TEST_RR(  op "mi" s "   r4,  r",5, VAL1,", r",2, N(val),", asr #6")     \
  65         TEST_RR(  op "pl" s "   r5,  r",5, VAL1,", r",2, val, ", ror #7")       \
  66         TEST_RR(  op "vs" s "   r6,  r",7, VAL1,", r",2, val, ", rrx")          \
  67         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", pc, lsl #3")                 \
  68         TEST_R(   op "vc" s "   r6,  r",7, VAL1,", sp, lsr #4")                 \
  69         TEST_R(   op "vc" s "   r6,  pc, r",7, VAL1,", asr #5")                 \
  70         TEST_R(   op "vc" s "   r6,  sp, r",7, VAL1,", ror #6")                 \
  71         TEST_RRR( op "hi" s "   r8,  r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")\
  72         TEST_RRR( op "ls" s "   r9,  r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")\
  73         TEST_RRR( op "ge" s "   r10, r",11,VAL1,", r",14,val, ", asr r",7, 5,"")\
  74         TEST_RRR( op "lt" s "   r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
  75         TEST_RR(  op "gt" s "   r12, r13"       ", r",14,val, ", ror r",14,7,"")\
  76         TEST_RR(  op "le" s "   r14, r",0, val, ", r13"       ", lsl r",14,8,"")\
  77         TEST_R(   op "eq" s "   r0,  r",11,VAL1,", #0xf5")                      \
  78         TEST_R(   op "ne" s "   r11, r",0, VAL1,", #0xf5000000")                \
  79         TEST_R(   op s "        r7,  r",8, VAL2,", #0x000af000")                \
  80         TEST(     op s "        r4,  pc"        ", #0x00005a00")
  81
  82 #define DATA_PROCESSING_DNM(op,val)             \
  83         _DATA_PROCESSING_DNM(op,"",val)         \
  84         _DATA_PROCESSING_DNM(op,"s",val)
  85
  86 #define DATA_PROCESSING_NM(op,val)                                              \
  87         TEST_RR(  op "ne        r",1, VAL1,", r",2, val, "")                    \
  88         TEST_RR(  op "eq        r",1, VAL1,", r",2, val, ", lsl #3")            \
  89         TEST_RR(  op "cc        r",3, VAL1,", r",2, val, ", lsr #4")            \
  90         TEST_RR(  op "cs        r",3, VAL1,", r",2, val, ", asr #5")            \
  91         TEST_RR(  op "pl        r",5, VAL1,", r",2, N(val),", asr #6")          \
  92         TEST_RR(  op "mi        r",5, VAL1,", r",2, val, ", ror #7")            \
  93         TEST_RR(  op "vc        r",7, VAL1,", r",2, val, ", rrx")               \
  94         TEST_R (  op "vs        r",7, VAL1,", pc, lsl #3")                      \
  95         TEST_R (  op "vs        r",7, VAL1,", sp, lsr #4")                      \
  96         TEST_R(   op "vs        pc, r",7, VAL1,", asr #5")                      \
  97         TEST_R(   op "vs        sp, r",7, VAL1,", ror #6")                      \
  98         TEST_RRR( op "ls        r",9, VAL1,", r",14,val, ", lsl r",0, 3,"")     \
  99         TEST_RRR( op "hi        r",9, VAL1,", r",14,val, ", lsr r",7, 4,"")     \
 100         TEST_RRR( op "lt        r",11,VAL1,", r",14,val, ", asr r",7, 5,"")     \
 101         TEST_RRR( op "ge        r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")   \
 102         TEST_RR(  op "le        r13"       ", r",14,val, ", ror r",14,7,"")     \
 103         TEST_RR(  op "gt        r",0, val, ", r13"       ", lsl r",14,8,"")     \
 104         TEST_R(   op "eq        r",11,VAL1,", #0xf5")                           \
 105         TEST_R(   op "ne        r",0, VAL1,", #0xf5000000")                     \
 106         TEST_R(   op "  r",8, VAL2,", #0x000af000")
 107
 108 #define _DATA_PROCESSING_DM(op,s,val)                                   \
 109         TEST_R(   op "eq" s "   r0,  r",1, val, "")                     \
 110         TEST_R(   op "ne" s "   r1,  r",1, val, ", lsl #3")             \
 111         TEST_R(   op "cs" s "   r2,  r",3, val, ", lsr #4")             \
 112         TEST_R(   op "cc" s "   r3,  r",3, val, ", asr #5")             \
 113         TEST_R(   op "mi" s "   r4,  r",5, N(val),", asr #6")           \
 114         TEST_R(   op "pl" s "   r5,  r",5, val, ", ror #7")             \
 115         TEST_R(   op "vs" s "   r6,  r",10,val, ", rrx")                \
 116         TEST(     op "vs" s "   r7,  pc, lsl #3")                       \
 117         TEST(     op "vs" s "   r7,  sp, lsr #4")                       \
 118         TEST_RR(  op "vc" s "   r8,  r",7, val, ", lsl r",0, 3,"")      \
 119         TEST_RR(  op "hi" s "   r9,  r",9, val, ", lsr r",7, 4,"")      \
 120         TEST_RR(  op "ls" s "   r10, r",9, val, ", asr r",7, 5,"")      \
 121         TEST_RR(  op "ge" s "   r11, r",11,N(val),", asr r",7, 6,"")    \
 122         TEST_RR(  op "lt" s "   r12, r",11,val, ", ror r",14,7,"")      \
 123         TEST_R(   op "gt" s "   r14, r13"       ", lsl r",14,8,"")      \
 124         TEST(     op "eq" s "   r0,  #0xf5")                            \
 125         TEST(     op "ne" s "   r11, #0xf5000000")                      \
 126         TEST(     op s "        r7,  #0x000af000")                      \
 127         TEST(     op s "        r4,  #0x00005a00")
 128
 129 #define DATA_PROCESSING_DM(op,val)              \
 130         _DATA_PROCESSING_DM(op,"",val)          \
 131         _DATA_PROCESSING_DM(op,"s",val)
 132
 133         DATA_PROCESSING_DNM("and",0xf00f00ff)
 134         DATA_PROCESSING_DNM("eor",0xf00f00ff)
 135         DATA_PROCESSING_DNM("sub",VAL2)
 136         DATA_PROCESSING_DNM("rsb",VAL2)
 137         DATA_PROCESSING_DNM("add",VAL2)
 138         DATA_PROCESSING_DNM("adc",VAL2)
 139         DATA_PROCESSING_DNM("sbc",VAL2)
 140         DATA_PROCESSING_DNM("rsc",VAL2)
 141         DATA_PROCESSING_NM("tst",0xf00f00ff)
 142         DATA_PROCESSING_NM("teq",0xf00f00ff)
 143         DATA_PROCESSING_NM("cmp",VAL2)
 144         DATA_PROCESSING_NM("cmn",VAL2)
 145         DATA_PROCESSING_DNM("orr",0xf00f00ff)
 146         DATA_PROCESSING_DM("mov",VAL2)
 147         DATA_PROCESSING_DNM("bic",0xf00f00ff)
 148         DATA_PROCESSING_DM("mvn",VAL2)
 149
 150         TEST("mov       ip, sp") /* This has special case emulation code */
 151
 152         TEST_SUPPORTED("mov     pc, #0x1000");
 153         TEST_SUPPORTED("mov     sp, #0x1000");
 154         TEST_SUPPORTED("cmp     pc, #0x1000");
 155         TEST_SUPPORTED("cmp     sp, #0x1000");
 156
 157         /* Data-processing with PC and a shift count in a register */
 158         TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) "       @ cmp   r12, r14, asl pc")
 159         TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) "       @ mov   r12, r14, asl pc")
 160         TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) "       @ add   r10, r12, r14, asl pc")
 161         TEST_UNSUPPORTED(__inst_arm(0xe151021f) "       @ cmp   r1, pc, lsl r2")
 162         TEST_UNSUPPORTED(__inst_arm(0xe17f0211) "       @ cmn   pc, r1, lsl r2")
 163         TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) "       @ mov   r1, pc, lsl r2")
 164         TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) "       @ mov   pc, r1, lsl r2")
 165         TEST_UNSUPPORTED(__inst_arm(0xe042131f) "       @ sub   r1, r2, pc, lsl r3")
 166         TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) "       @ bic   r1, pc, r2, lsl r3")
 167         TEST_UNSUPPORTED(__inst_arm(0xe081f312) "       @ add   pc, r1, r2, lsl r3")
 168
 169         /* Data-processing with PC as a target and status registers updated */
 170         TEST_UNSUPPORTED("movs  pc, r1")
 171         TEST_UNSUPPORTED("movs  pc, r1, lsl r2")
 172         TEST_UNSUPPORTED("movs  pc, #0x10000")
 173         TEST_UNSUPPORTED("adds  pc, lr, r1")
 174         TEST_UNSUPPORTED("adds  pc, lr, r1, lsl r2")
 175         TEST_UNSUPPORTED("adds  pc, lr, #4")
 176
 177         /* Data-processing with SP as target */
 178         TEST("add       sp, sp, #16")
 179         TEST("sub       sp, sp, #8")
 180         TEST("bic       sp, sp, #0x20")
 181         TEST("orr       sp, sp, #0x20")
 182         TEST_PR( "add   sp, r",10,0,", r",11,4,"")
 183         TEST_PRR("add   sp, r",10,0,", r",11,4,", asl r",12,1,"")
 184         TEST_P(  "mov   sp, r",10,0,"")
 185         TEST_PR( "mov   sp, r",10,0,", asl r",12,0,"")
 186
 187         /* Data-processing with PC as target */
 188         TEST_BF(   "add pc, pc, #2f-1b-8")
 189         TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
 190         TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
 191         TEST_BF_R ("mov pc, r",0,2f,"")
 192         TEST_BF_R ("add pc, pc, r",14,(2f-1f-8)*2,", asr #1")
 193         TEST_BB(   "sub pc, pc, #1b-2b+8")
 194 #if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
 195         TEST_BB(   "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
 196 #endif
 197         TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
 198         TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
 199         TEST_R(    "add pc, pc, r",10,-2,", asl #1")
 200 #ifdef CONFIG_THUMB2_KERNEL
 201         TEST_ARM_TO_THUMB_INTERWORK_R("add      pc, pc, r",0,3f-1f-8+1,"")
 202         TEST_ARM_TO_THUMB_INTERWORK_R("sub      pc, r",0,3f+8+1,", #8")
 203 #endif
 204         TEST_GROUP("Miscellaneous instructions")
 205
 206         TEST("mrs       r0, cpsr")
 207         TEST("mrspl     r7, cpsr")
 208         TEST("mrs       r14, cpsr")
 209         TEST_UNSUPPORTED(__inst_arm(0xe10ff000) "       @ mrs r15, cpsr")
 210         TEST_UNSUPPORTED("mrs   r0, spsr")
 211         TEST_UNSUPPORTED("mrs   lr, spsr")
 212
 213         TEST_UNSUPPORTED("msr   cpsr, r0")
 214         TEST_UNSUPPORTED("msr   cpsr_f, lr")
 215         TEST_UNSUPPORTED("msr   spsr, r0")
 216
 217         TEST_BF_R("bx   r",0,2f,"")
 218         TEST_BB_R("bx   r",7,2f,"")
 219         TEST_BF_R("bxeq r",14,2f,"")
 220
 221 #if __LINUX_ARM_ARCH__ >= 5
 222         TEST_R("clz     r0, r",0, 0x0,"")
 223         TEST_R("clzeq   r7, r",14,0x1,"")
 224         TEST_R("clz     lr, r",7, 0xffffffff,"")
 225         TEST(  "clz     r4, sp")
 226         TEST_UNSUPPORTED(__inst_arm(0x016fff10) "       @ clz pc, r0")
 227         TEST_UNSUPPORTED(__inst_arm(0x016f0f1f) "       @ clz r0, pc")
 228
 229 #if __LINUX_ARM_ARCH__ >= 6
 230         TEST_UNSUPPORTED("bxj   r0")
 231 #endif
 232
 233         TEST_BF_R("blx  r",0,2f,"")
 234         TEST_BB_R("blx  r",7,2f,"")
 235         TEST_BF_R("blxeq        r",14,2f,"")
 236         TEST_UNSUPPORTED(__inst_arm(0x0120003f) "       @ blx pc")
 237
 238         TEST_RR(   "qadd        r0, r",1, VAL1,", r",2, VAL2,"")
 239         TEST_RR(   "qaddvs      lr, r",9, VAL2,", r",8, VAL1,"")
 240         TEST_R(    "qadd        lr, r",9, VAL2,", r13")
 241         TEST_RR(   "qsub        r0, r",1, VAL1,", r",2, VAL2,"")
 242         TEST_RR(   "qsubvs      lr, r",9, VAL2,", r",8, VAL1,"")
 243         TEST_R(    "qsub        lr, r",9, VAL2,", r13")
 244         TEST_RR(   "qdadd       r0, r",1, VAL1,", r",2, VAL2,"")
 245         TEST_RR(   "qdaddvs     lr, r",9, VAL2,", r",8, VAL1,"")
 246         TEST_R(    "qdadd       lr, r",9, VAL2,", r13")
 247         TEST_RR(   "qdsub       r0, r",1, VAL1,", r",2, VAL2,"")
 248         TEST_RR(   "qdsubvs     lr, r",9, VAL2,", r",8, VAL1,"")
 249         TEST_R(    "qdsub       lr, r",9, VAL2,", r13")
 250         TEST_UNSUPPORTED(__inst_arm(0xe101f050) "       @ qadd pc, r0, r1")
 251         TEST_UNSUPPORTED(__inst_arm(0xe121f050) "       @ qsub pc, r0, r1")
 252         TEST_UNSUPPORTED(__inst_arm(0xe141f050) "       @ qdadd pc, r0, r1")
 253         TEST_UNSUPPORTED(__inst_arm(0xe161f050) "       @ qdsub pc, r0, r1")
 254         TEST_UNSUPPORTED(__inst_arm(0xe16f2050) "       @ qdsub r2, r0, pc")
 255         TEST_UNSUPPORTED(__inst_arm(0xe161205f) "       @ qdsub r2, pc, r1")
 256
 257         TEST_UNSUPPORTED("bkpt  0xffff")
 258         TEST_UNSUPPORTED("bkpt  0x0000")
 259
 260         TEST_UNSUPPORTED(__inst_arm(0xe1600070) " @ smc #0")
 261
 262         TEST_GROUP("Halfword multiply and multiply-accumulate")
 263
 264         TEST_RRR(    "smlabb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 265         TEST_RRR(    "smlabbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 266         TEST_RR(     "smlabb    lr, r",1, VAL2,", r",2, VAL3,", r13")
 267         TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3")
 268         TEST_RRR(    "smlatb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 269         TEST_RRR(    "smlatbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 270         TEST_RR(     "smlatb    lr, r",1, VAL2,", r",2, VAL3,", r13")
 271         TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3")
 272         TEST_RRR(    "smlabt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 273         TEST_RRR(    "smlabtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 274         TEST_RR(     "smlabt    lr, r",1, VAL2,", r",2, VAL3,", r13")
 275         TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3")
 276         TEST_RRR(    "smlatt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 277         TEST_RRR(    "smlattge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 278         TEST_RR(     "smlatt    lr, r",1, VAL2,", r",2, VAL3,", r13")
 279         TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3")
 280
 281         TEST_RRR(    "smlawb    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 282         TEST_RRR(    "smlawbge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 283         TEST_RR(     "smlawb    lr, r",1, VAL2,", r",2, VAL3,", r13")
 284         TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3")
 285         TEST_RRR(    "smlawt    r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 286         TEST_RRR(    "smlawtge  r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 287         TEST_RR(     "smlawt    lr, r",1, VAL2,", r",2, VAL3,", r13")
 288         TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3")
 289         TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3")
 290         TEST_UNSUPPORTED(__inst_arm(0xe1203fc1) " @ smlawt r0, r1, pc, r3")
 291         TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc")
 292
 293         TEST_RR(    "smulwb     r0, r",1, VAL1,", r",2, VAL2,"")
 294         TEST_RR(    "smulwbge   r7, r",8, VAL3,", r",9, VAL1,"")
 295         TEST_R(     "smulwb     lr, r",1, VAL2,", r13")
 296         TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2")
 297         TEST_RR(    "smulwt     r0, r",1, VAL1,", r",2, VAL2,"")
 298         TEST_RR(    "smulwtge   r7, r",8, VAL3,", r",9, VAL1,"")
 299         TEST_R(     "smulwt     lr, r",1, VAL2,", r13")
 300         TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2")
 301
 302         TEST_RRRR(  "smlalbb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 303         TEST_RRRR(  "smlalbble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 304         TEST_RRR(   "smlalbb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 305         TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3")
 306         TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3")
 307         TEST_RRRR(  "smlaltb    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 308         TEST_RRRR(  "smlaltble  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 309         TEST_RRR(   "smlaltb    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 310         TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3")
 311         TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3")
 312         TEST_RRRR(  "smlalbt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 313         TEST_RRRR(  "smlalbtle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 314         TEST_RRR(   "smlalbt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 315         TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3")
 316         TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3")
 317         TEST_RRRR(  "smlaltt    r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 318         TEST_RRRR(  "smlalttle  r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 319         TEST_RRR(   "smlaltt    r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 320         TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3")
 321         TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3")
 322         TEST_UNSUPPORTED(__inst_arm(0xe14013ef) " @ smlalbb r0, r1, pc, r3")
 323         TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc")
 324
 325         TEST_RR(    "smulbb     r0, r",1, VAL1,", r",2, VAL2,"")
 326         TEST_RR(    "smulbbge   r7, r",8, VAL3,", r",9, VAL1,"")
 327         TEST_R(     "smulbb     lr, r",1, VAL2,", r13")
 328         TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2")
 329         TEST_RR(    "smultb     r0, r",1, VAL1,", r",2, VAL2,"")
 330         TEST_RR(    "smultbge   r7, r",8, VAL3,", r",9, VAL1,"")
 331         TEST_R(     "smultb     lr, r",1, VAL2,", r13")
 332         TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2")
 333         TEST_RR(    "smulbt     r0, r",1, VAL1,", r",2, VAL2,"")
 334         TEST_RR(    "smulbtge   r7, r",8, VAL3,", r",9, VAL1,"")
 335         TEST_R(     "smulbt     lr, r",1, VAL2,", r13")
 336         TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2")
 337         TEST_RR(    "smultt     r0, r",1, VAL1,", r",2, VAL2,"")
 338         TEST_RR(    "smulttge   r7, r",8, VAL3,", r",9, VAL1,"")
 339         TEST_R(     "smultt     lr, r",1, VAL2,", r13")
 340         TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
 341         TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
 342         TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
 343 #endif
 344
 345         TEST_GROUP("Multiply and multiply-accumulate")
 346
 347         TEST_RR(    "mul        r0, r",1, VAL1,", r",2, VAL2,"")
 348         TEST_RR(    "mulls      r7, r",8, VAL2,", r",9, VAL2,"")
 349         TEST_R(     "mul        lr, r",4, VAL3,", r13")
 350         TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2")
 351         TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2")
 352         TEST_UNSUPPORTED(__inst_arm(0xe0000f91) " @ mul r0, r1, pc")
 353         TEST_RR(    "muls       r0, r",1, VAL1,", r",2, VAL2,"")
 354         TEST_RR(    "mullss     r7, r",8, VAL2,", r",9, VAL2,"")
 355         TEST_R(     "muls       lr, r",4, VAL3,", r13")
 356         TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2")
 357
 358         TEST_RRR(    "mla       r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 359         TEST_RRR(    "mlahi     r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 360         TEST_RR(     "mla       lr, r",1, VAL2,", r",2, VAL3,", r13")
 361         TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3")
 362         TEST_RRR(    "mlas      r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 363         TEST_RRR(    "mlahis    r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 364         TEST_RR(     "mlas      lr, r",1, VAL2,", r",2, VAL3,", r13")
 365         TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3")
 366
 367 #if __LINUX_ARM_ARCH__ >= 6
 368         TEST_RR(  "umaal        r0, r1, r",2, VAL1,", r",3, VAL2,"")
 369         TEST_RR(  "umaalls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
 370         TEST_R(   "umaal        lr, r12, r",11,VAL3,", r13")
 371         TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3")
 372         TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3")
 373         TEST_UNSUPPORTED(__inst_arm(0xe0500090) " @ undef")
 374         TEST_UNSUPPORTED(__inst_arm(0xe05fff9f) " @ undef")
 375 #endif
 376
 377 #if __LINUX_ARM_ARCH__ >= 7
 378         TEST_RRR(  "mls         r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
 379         TEST_RRR(  "mlshi       r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
 380         TEST_RR(   "mls         lr, r",1, VAL2,", r",2, VAL3,", r13")
 381         TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3")
 382         TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3")
 383         TEST_UNSUPPORTED(__inst_arm(0xe0603f91) " @ mls r0, r1, pc, r3")
 384         TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc")
 385 #endif
 386
 387         TEST_UNSUPPORTED(__inst_arm(0xe0700090) " @ undef")
 388         TEST_UNSUPPORTED(__inst_arm(0xe07fff9f) " @ undef")
 389
 390         TEST_RR(  "umull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
 391         TEST_RR(  "umullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
 392         TEST_R(   "umull        lr, r12, r",11,VAL3,", r13")
 393         TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3")
 394         TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3")
 395         TEST_RR(  "umulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
 396         TEST_RR(  "umulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
 397         TEST_R(   "umulls       lr, r12, r",11,VAL3,", r13")
 398         TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3")
 399         TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3")
 400
 401         TEST_RRRR(  "umlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 402         TEST_RRRR(  "umlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 403         TEST_RRR(   "umlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 404         TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3")
 405         TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3")
 406         TEST_RRRR(  "umlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 407         TEST_RRRR(  "umlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 408         TEST_RRR(   "umlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 409         TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3")
 410         TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3")
 411
 412         TEST_RR(  "smull        r0, r1, r",2, VAL1,", r",3, VAL2,"")
 413         TEST_RR(  "smullls      r7, r8, r",9, VAL2,", r",10, VAL1,"")
 414         TEST_R(   "smull        lr, r12, r",11,VAL3,", r13")
 415         TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3")
 416         TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3")
 417         TEST_RR(  "smulls       r0, r1, r",2, VAL1,", r",3, VAL2,"")
 418         TEST_RR(  "smulllss     r7, r8, r",9, VAL2,", r",10, VAL1,"")
 419         TEST_R(   "smulls       lr, r12, r",11,VAL3,", r13")
 420         TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3")
 421         TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3")
 422
 423         TEST_RRRR(  "smlal      r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 424         TEST_RRRR(  "smlalle    r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 425         TEST_RRR(   "smlal      r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 426         TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3")
 427         TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3")
 428         TEST_RRRR(  "smlals     r",0, VAL1,", r",1, VAL2,", r",2, VAL3,", r",3, VAL4)
 429         TEST_RRRR(  "smlalles   r",8, VAL4,", r",9, VAL1,", r",10,VAL2,", r",11,VAL3)
 430         TEST_RRR(   "smlals     r",14,VAL3,", r",7, VAL4,", r",5, VAL1,", r13")
 431         TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3")
 432         TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3")
 433         TEST_UNSUPPORTED(__inst_arm(0xe0f0139f) " @ smlals r0, r1, pc, r3")
 434         TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc")
 435
 436         TEST_GROUP("Synchronization primitives")
 437
 438 #if __LINUX_ARM_ARCH__ < 6
 439         TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
 440         TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
 441         TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
 442 #else
 443         TEST_UNSUPPORTED(__inst_arm(0xe108e097) " @ swp lr, r7, [r8]")
 444         TEST_UNSUPPORTED(__inst_arm(0x610d0091) " @ swpvs       r0, r1, [sp]")
 445         TEST_UNSUPPORTED(__inst_arm(0xe10cd09e) " @ swp sp, r14 [r12]")
 446 #endif
 447         TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]")
 448         TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]")
 449         TEST_UNSUPPORTED(__inst_arm(0xe10f0091) " @ swp r0, r1, [pc]")
 450 #if __LINUX_ARM_ARCH__ < 6
 451         TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
 452         TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
 453 #else
 454         TEST_UNSUPPORTED(__inst_arm(0xe148e097) " @ swpb        lr, r7, [r8]")
 455         TEST_UNSUPPORTED(__inst_arm(0x614d0091) " @ swpvsb      r0, r1, [sp]")
 456 #endif
 457         TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]")
 458
 459         TEST_UNSUPPORTED(__inst_arm(0xe1100090)) /* Unallocated space */
 460         TEST_UNSUPPORTED(__inst_arm(0xe1200090)) /* Unallocated space */
 461         TEST_UNSUPPORTED(__inst_arm(0xe1300090)) /* Unallocated space */
 462         TEST_UNSUPPORTED(__inst_arm(0xe1500090)) /* Unallocated space */
 463         TEST_UNSUPPORTED(__inst_arm(0xe1600090)) /* Unallocated space */
 464         TEST_UNSUPPORTED(__inst_arm(0xe1700090)) /* Unallocated space */
 465 #if __LINUX_ARM_ARCH__ >= 6
 466         TEST_UNSUPPORTED("ldrex r2, [sp]")
 467 #endif
 468 #if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
 469         TEST_UNSUPPORTED("strexd        r0, r2, r3, [sp]")
 470         TEST_UNSUPPORTED("ldrexd        r2, r3, [sp]")
 471         TEST_UNSUPPORTED("strexb        r0, r2, [sp]")
 472         TEST_UNSUPPORTED("ldrexb        r2, [sp]")
 473         TEST_UNSUPPORTED("strexh        r0, r2, [sp]")
 474         TEST_UNSUPPORTED("ldrexh        r2, [sp]")
 475 #endif
 476         TEST_GROUP("Extra load/store instructions")
 477
 478         TEST_RPR(  "strh        r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")
 479         TEST_RPR(  "streqh      r",14,VAL2,", [r",11,0, ", r",12, 48,"]")
 480         TEST_UNSUPPORTED(  "streqh      r14, [r13, r12]")
 481         TEST_RPR(  "strh        r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")
 482         TEST_RPR(  "strneh      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
 483         TEST_RPR(  "strh        r",2, VAL1,", [r",3, 24,"], r",4, 48,"")
 484         TEST_RPR(  "strh        r",10,VAL2,", [r",9, 48,"], -r",11,24,"")
 485         TEST_UNSUPPORTED(__inst_arm(0xe1afc0ba) "       @ strh r12, [pc, r10]!")
 486         TEST_UNSUPPORTED(__inst_arm(0xe089f0bb) "       @ strh pc, [r9], r11")
 487         TEST_UNSUPPORTED(__inst_arm(0xe089a0bf) "       @ strh r10, [r9], pc")
 488
 489         TEST_PR(   "ldrh        r0, [r",0,  48,", -r",2, 24,"]")
 490         TEST_PR(   "ldrcsh      r14, [r",13,0, ", r",12, 48,"]")
 491         TEST_PR(   "ldrh        r1, [r",2,  24,", r",3,  48,"]!")
 492         TEST_PR(   "ldrcch      r12, [r",11,48,", -r",10,24,"]!")
 493         TEST_PR(   "ldrh        r2, [r",3,  24,"], r",4, 48,"")
 494         TEST_PR(   "ldrh        r10, [r",9, 48,"], -r",11,24,"")
 495         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0ba) "       @ ldrh r12, [pc, r10]!")
 496         TEST_UNSUPPORTED(__inst_arm(0xe099f0bb) "       @ ldrh pc, [r9], r11")
 497         TEST_UNSUPPORTED(__inst_arm(0xe099a0bf) "       @ ldrh r10, [r9], pc")
 498
 499         TEST_RP(   "strh        r",0, VAL1,", [r",1, 24,", #-2]")
 500         TEST_RP(   "strmih      r",14,VAL2,", [r",13,0, ", #2]")
 501         TEST_RP(   "strh        r",1, VAL1,", [r",2, 24,", #4]!")
 502         TEST_RP(   "strplh      r",12,VAL2,", [r",11,24,", #-4]!")
 503         TEST_RP(   "strh        r",2, VAL1,", [r",3, 24,"], #48")
 504         TEST_RP(   "strh        r",10,VAL2,", [r",9, 64,"], #-48")
 505         TEST_UNSUPPORTED(__inst_arm(0xe1efc3b0) "       @ strh r12, [pc, #48]!")
 506         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3b0) "       @ strh pc, [r9], #48")
 507
 508         TEST_P(    "ldrh        r0, [r",0,  24,", #-2]")
 509         TEST_P(    "ldrvsh      r14, [r",13,0, ", #2]")
 510         TEST_P(    "ldrh        r1, [r",2,  24,", #4]!")
 511         TEST_P(    "ldrvch      r12, [r",11,24,", #-4]!")
 512         TEST_P(    "ldrh        r2, [r",3,  24,"], #48")
 513         TEST_P(    "ldrh        r10, [r",9, 64,"], #-48")
 514         TEST(      "ldrh        r0, [pc, #0]")
 515         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3b0) "       @ ldrh r12, [pc, #48]!")
 516         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3b0) "       @ ldrh pc, [r9], #48")
 517
 518         TEST_PR(   "ldrsb       r0, [r",0,  48,", -r",2, 24,"]")
 519         TEST_PR(   "ldrhisb     r14, [r",13,0,", r",12,  48,"]")
 520         TEST_PR(   "ldrsb       r1, [r",2,  24,", r",3,  48,"]!")
 521         TEST_PR(   "ldrlssb     r12, [r",11,48,", -r",10,24,"]!")
 522         TEST_PR(   "ldrsb       r2, [r",3,  24,"], r",4, 48,"")
 523         TEST_PR(   "ldrsb       r10, [r",9, 48,"], -r",11,24,"")
 524         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0da) "       @ ldrsb r12, [pc, r10]!")
 525         TEST_UNSUPPORTED(__inst_arm(0xe099f0db) "       @ ldrsb pc, [r9], r11")
 526
 527         TEST_P(    "ldrsb       r0, [r",0,  24,", #-1]")
 528         TEST_P(    "ldrgesb     r14, [r",13,0, ", #1]")
 529         TEST_P(    "ldrsb       r1, [r",2,  24,", #4]!")
 530         TEST_P(    "ldrltsb     r12, [r",11,24,", #-4]!")
 531         TEST_P(    "ldrsb       r2, [r",3,  24,"], #48")
 532         TEST_P(    "ldrsb       r10, [r",9, 64,"], #-48")
 533         TEST(      "ldrsb       r0, [pc, #0]")
 534         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3d0) "       @ ldrsb r12, [pc, #48]!")
 535         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3d0) "       @ ldrsb pc, [r9], #48")
 536
 537         TEST_PR(   "ldrsh       r0, [r",0,  48,", -r",2, 24,"]")
 538         TEST_PR(   "ldrgtsh     r14, [r",13,0, ", r",12, 48,"]")
 539         TEST_PR(   "ldrsh       r1, [r",2,  24,", r",3,  48,"]!")
 540         TEST_PR(   "ldrlesh     r12, [r",11,48,", -r",10,24,"]!")
 541         TEST_PR(   "ldrsh       r2, [r",3,  24,"], r",4, 48,"")
 542         TEST_PR(   "ldrsh       r10, [r",9, 48,"], -r",11,24,"")
 543         TEST_UNSUPPORTED(__inst_arm(0xe1bfc0fa) "       @ ldrsh r12, [pc, r10]!")
 544         TEST_UNSUPPORTED(__inst_arm(0xe099f0fb) "       @ ldrsh pc, [r9], r11")
 545
 546         TEST_P(    "ldrsh       r0, [r",0,  24,", #-1]")
 547         TEST_P(    "ldreqsh     r14, [r",13,0 ,", #1]")
 548         TEST_P(    "ldrsh       r1, [r",2,  24,", #4]!")
 549         TEST_P(    "ldrnesh     r12, [r",11,24,", #-4]!")
 550         TEST_P(    "ldrsh       r2, [r",3,  24,"], #48")
 551         TEST_P(    "ldrsh       r10, [r",9, 64,"], #-48")
 552         TEST(      "ldrsh       r0, [pc, #0]")
 553         TEST_UNSUPPORTED(__inst_arm(0xe1ffc3f0) "       @ ldrsh r12, [pc, #48]!")
 554         TEST_UNSUPPORTED(__inst_arm(0xe0d9f3f0) "       @ ldrsh pc, [r9], #48")
 555
 556 #if __LINUX_ARM_ARCH__ >= 7
 557         TEST_UNSUPPORTED("strht r1, [r2], r3")
 558         TEST_UNSUPPORTED("ldrht r1, [r2], r3")
 559         TEST_UNSUPPORTED("strht r1, [r2], #48")
 560         TEST_UNSUPPORTED("ldrht r1, [r2], #48")
 561         TEST_UNSUPPORTED("ldrsbt        r1, [r2], r3")
 562         TEST_UNSUPPORTED("ldrsbt        r1, [r2], #48")
 563         TEST_UNSUPPORTED("ldrsht        r1, [r2], r3")
 564         TEST_UNSUPPORTED("ldrsht        r1, [r2], #48")
 565 #endif
 566
 567 #if __LINUX_ARM_ARCH__ >= 5
 568         TEST_RPR(  "strd        r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
 569         TEST_RPR(  "strccd      r",8, VAL2,", [r",11,0, ", r",12,48,"]")
 570         TEST_UNSUPPORTED(  "strccd r8, [r13, r12]")
 571         TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
 572         TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
 573         TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
 574         TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
 575         TEST_UNSUPPORTED(__inst_arm(0xe1afc0fa) "       @ strd r12, [pc, r10]!")
 576
 577         TEST_PR(   "ldrd        r0, [r",0, 48,", -r",2,24,"]")
 578         TEST_PR(   "ldrmid      r8, [r",13,0, ", r",12,48,"]")
 579         TEST_PR(   "ldrd        r4, [r",2, 24,", r",3, 48,"]!")
 580         TEST_PR(   "ldrpld      r6, [r",11,48,", -r",10,24,"]!")
 581         TEST_PR(   "ldrd        r2, [r",5, 24,"], r",4,48,"")
 582         TEST_PR(   "ldrd        r10, [r",9,48,"], -r",7,24,"")
 583         TEST_UNSUPPORTED(__inst_arm(0xe1afc0da) "       @ ldrd r12, [pc, r10]!")
 584         TEST_UNSUPPORTED(__inst_arm(0xe089f0db) "       @ ldrd pc, [r9], r11")
 585         TEST_UNSUPPORTED(__inst_arm(0xe089e0db) "       @ ldrd lr, [r9], r11")
 586         TEST_UNSUPPORTED(__inst_arm(0xe089c0df) "       @ ldrd r12, [r9], pc")
 587
 588         TEST_RP(   "strd        r",0, VAL1,", [r",1, 24,", #-8]")
 589         TEST_RP(   "strvsd      r",8, VAL2,", [r",13,0, ", #8]")
 590         TEST_RP(   "strd        r",4, VAL1,", [r",2, 24,", #16]!")
 591         TEST_RP(   "strvcd      r",12,VAL2,", [r",11,24,", #-16]!")
 592         TEST_RP(   "strd        r",2, VAL1,", [r",4, 24,"], #48")
 593         TEST_RP(   "strd        r",10,VAL2,", [r",9, 64,"], #-48")
 594         TEST_UNSUPPORTED(__inst_arm(0xe1efc3f0) "       @ strd r12, [pc, #48]!")
 595
 596         TEST_P(    "ldrd        r0, [r",0, 24,", #-8]")
 597         TEST_P(    "ldrhid      r8, [r",13,0, ", #8]")
 598         TEST_P(    "ldrd        r4, [r",2, 24,", #16]!")
 599         TEST_P(    "ldrlsd      r6, [r",11,24,", #-16]!")
 600         TEST_P(    "ldrd        r2, [r",5, 24,"], #48")
 601         TEST_P(    "ldrd        r10, [r",9,6,"], #-48")
 602         TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) "       @ ldrd r12, [pc, #48]!")
 603         TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) "       @ ldrd pc, [r9], #48")
 604         TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) "       @ ldrd lr, [r9], #48")
 605 #endif
 606
 607         TEST_GROUP("Miscellaneous")
 608
 609 #if __LINUX_ARM_ARCH__ >= 7
 610         TEST("movw      r0, #0")
 611         TEST("movw      r0, #0xffff")
 612         TEST("movw      lr, #0xffff")
 613         TEST_UNSUPPORTED(__inst_arm(0xe300f000) "       @ movw pc, #0")
 614         TEST_R("movt    r",0, VAL1,", #0")
 615         TEST_R("movt    r",0, VAL2,", #0xffff")
 616         TEST_R("movt    r",14,VAL1,", #0xffff")
 617         TEST_UNSUPPORTED(__inst_arm(0xe340f000) "       @ movt pc, #0")
 618 #endif
 619
 620         TEST_UNSUPPORTED("msr   cpsr, 0x13")
 621         TEST_UNSUPPORTED("msr   cpsr_f, 0xf0000000")
 622         TEST_UNSUPPORTED("msr   spsr, 0x13")
 623
 624 #if __LINUX_ARM_ARCH__ >= 7
 625         TEST_SUPPORTED("yield")
 626         TEST("sev")
 627         TEST("nop")
 628         TEST("wfi")
 629         TEST_SUPPORTED("wfe")
 630         TEST_UNSUPPORTED("dbg #0")
 631 #endif
 632
 633         TEST_GROUP("Load/store word and unsigned byte")
 634
 635 #define LOAD_STORE(byte)                                                        \
 636         TEST_RP( "str"byte"     r",0, VAL1,", [r",1, 24,", #-2]")               \
 637         TEST_RP( "str"byte"     r",14,VAL2,", [r",13,0, ", #2]")                \
 638         TEST_RP( "str"byte"     r",1, VAL1,", [r",2, 24,", #4]!")               \
 639         TEST_RP( "str"byte"     r",12,VAL2,", [r",11,24,", #-4]!")              \
 640         TEST_RP( "str"byte"     r",2, VAL1,", [r",3, 24,"], #48")               \
 641         TEST_RP( "str"byte"     r",10,VAL2,", [r",9, 64,"], #-48")              \
 642         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 48,", -r",2, 24,"]")       \
 643         TEST_RPR("str"byte"     r",14,VAL2,", [r",11,0, ", r",12, 48,"]")       \
 644         TEST_UNSUPPORTED("str"byte" r14, [r13, r12]")   \
 645         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  48,"]!")      \
 646         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,48,", -r",10,24,"]!")      \
 647         TEST_RPR("str"byte"     r",2, VAL1,", [r",3, 24,"], r",4, 48,"")        \
 648         TEST_RPR("str"byte"     r",10,VAL2,", [r",9, 48,"], -r",11,24,"")       \
 649         TEST_RPR("str"byte"     r",0, VAL1,", [r",1, 24,", r",2,  32,", asl #1]")\
 650         TEST_RPR("str"byte"     r",14,VAL2,", [r",11,0, ", r",12, 32,", lsr #2]")\
 651         TEST_UNSUPPORTED("str"byte"     r14, [r13, r12, lsr #2]")\
 652         TEST_RPR("str"byte"     r",1, VAL1,", [r",2, 24,", r",3,  32,", asr #3]!")\
 653         TEST_RPR("str"byte"     r",12,VAL2,", [r",11,24,", r",10, 4,", ror #31]!")\
 654         TEST_P(  "ldr"byte"     r0, [r",0,  24,", #-2]")                        \
 655         TEST_P(  "ldr"byte"     r14, [r",13,0, ", #2]")                         \
 656         TEST_P(  "ldr"byte"     r1, [r",2,  24,", #4]!")                        \
 657         TEST_P(  "ldr"byte"     r12, [r",11,24,", #-4]!")                       \
 658         TEST_P(  "ldr"byte"     r2, [r",3,  24,"], #48")                        \
 659         TEST_P(  "ldr"byte"     r10, [r",9, 64,"], #-48")                       \
 660         TEST_PR( "ldr"byte"     r0, [r",0,  48,", -r",2, 24,"]")                \
 661         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 48,"]")                \
 662         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3, 48,"]!")                \
 663         TEST_PR( "ldr"byte"     r12, [r",11,48,", -r",10,24,"]!")               \
 664         TEST_PR( "ldr"byte"     r2, [r",3,  24,"], r",4, 48,"")                 \
 665         TEST_PR( "ldr"byte"     r10, [r",9, 48,"], -r",11,24,"")                \
 666         TEST_PR( "ldr"byte"     r0, [r",0,  24,", r",2,  32,", asl #1]")        \
 667         TEST_PR( "ldr"byte"     r14, [r",13,0, ", r",12, 32,", lsr #2]")        \
 668         TEST_PR( "ldr"byte"     r1, [r",2,  24,", r",3,  32,", asr #3]!")       \
 669         TEST_PR( "ldr"byte"     r12, [r",11,24,", r",10, 4,", ror #31]!")       \
 670         TEST(    "ldr"byte"     r0, [pc, #0]")                                  \
 671         TEST_R(  "ldr"byte"     r12, [pc, r",14,0,"]")
 672
 673         LOAD_STORE("")
 674         TEST_P(   "str  pc, [r",0,0,", #15*4]")
 675         TEST_UNSUPPORTED(   "str        pc, [sp, r2]")
 676         TEST_BF(  "ldr  pc, [sp, #15*4]")
 677         TEST_BF_R("ldr  pc, [sp, r",2,15*4,"]")
 678
 679         TEST_P(   "str  sp, [r",0,0,", #13*4]")
 680         TEST_UNSUPPORTED(   "str        sp, [sp, r2]")
 681         TEST_BF(  "ldr  sp, [sp, #13*4]")
 682         TEST_BF_R("ldr  sp, [sp, r",2,13*4,"]")
 683
 684 #ifdef CONFIG_THUMB2_KERNEL
 685         TEST_ARM_TO_THUMB_INTERWORK_P("ldr      pc, [r",0,0,", #15*4]")
 686 #endif
 687         TEST_UNSUPPORTED(__inst_arm(0xe5af6008) "       @ str r6, [pc, #8]!")
 688         TEST_UNSUPPORTED(__inst_arm(0xe7af6008) "       @ str r6, [pc, r8]!")
 689         TEST_UNSUPPORTED(__inst_arm(0xe5bf6008) "       @ ldr r6, [pc, #8]!")
 690         TEST_UNSUPPORTED(__inst_arm(0xe7bf6008) "       @ ldr r6, [pc, r8]!")
 691         TEST_UNSUPPORTED(__inst_arm(0xe788600f) "       @ str r6, [r8, pc]")
 692         TEST_UNSUPPORTED(__inst_arm(0xe798600f) "       @ ldr r6, [r8, pc]")
 693
 694         LOAD_STORE("b")
 695         TEST_UNSUPPORTED(__inst_arm(0xe5f7f008) "       @ ldrb pc, [r7, #8]!")
 696         TEST_UNSUPPORTED(__inst_arm(0xe7f7f008) "       @ ldrb pc, [r7, r8]!")
 697         TEST_UNSUPPORTED(__inst_arm(0xe5ef6008) "       @ strb r6, [pc, #8]!")
 698         TEST_UNSUPPORTED(__inst_arm(0xe7ef6008) "       @ strb r6, [pc, r3]!")
 699         TEST_UNSUPPORTED(__inst_arm(0xe5ff6008) "       @ ldrb r6, [pc, #8]!")
 700         TEST_UNSUPPORTED(__inst_arm(0xe7ff6008) "       @ ldrb r6, [pc, r3]!")
 701
 702         TEST_UNSUPPORTED("ldrt  r0, [r1], #4")
 703         TEST_UNSUPPORTED("ldrt  r1, [r2], r3")
 704         TEST_UNSUPPORTED("strt  r2, [r3], #4")
 705         TEST_UNSUPPORTED("strt  r3, [r4], r5")
 706         TEST_UNSUPPORTED("ldrbt r4, [r5], #4")
 707         TEST_UNSUPPORTED("ldrbt r5, [r6], r7")
 708         TEST_UNSUPPORTED("strbt r6, [r7], #4")
 709         TEST_UNSUPPORTED("strbt r7, [r8], r9")
 710
 711 #if __LINUX_ARM_ARCH__ >= 7
 712         TEST_GROUP("Parallel addition and subtraction, signed")
 713
 714         TEST_UNSUPPORTED(__inst_arm(0xe6000010) "") /* Unallocated space */
 715         TEST_UNSUPPORTED(__inst_arm(0xe60fffff) "") /* Unallocated space */
 716
 717         TEST_RR(    "sadd16     r0, r",0,  HH1,", r",1, HH2,"")
 718         TEST_RR(    "sadd16     r14, r",12,HH2,", r",10,HH1,"")
 719         TEST_UNSUPPORTED(__inst_arm(0xe61cff1a) "       @ sadd16        pc, r12, r10")
 720         TEST_RR(    "sasx       r0, r",0,  HH1,", r",1, HH2,"")
 721         TEST_RR(    "sasx       r14, r",12,HH2,", r",10,HH1,"")
 722         TEST_UNSUPPORTED(__inst_arm(0xe61cff3a) "       @ sasx  pc, r12, r10")
 723         TEST_RR(    "ssax       r0, r",0,  HH1,", r",1, HH2,"")
 724         TEST_RR(    "ssax       r14, r",12,HH2,", r",10,HH1,"")
 725         TEST_UNSUPPORTED(__inst_arm(0xe61cff5a) "       @ ssax  pc, r12, r10")
 726         TEST_RR(    "ssub16     r0, r",0,  HH1,", r",1, HH2,"")
 727         TEST_RR(    "ssub16     r14, r",12,HH2,", r",10,HH1,"")
 728         TEST_UNSUPPORTED(__inst_arm(0xe61cff7a) "       @ ssub16        pc, r12, r10")
 729         TEST_RR(    "sadd8      r0, r",0,  HH1,", r",1, HH2,"")
 730         TEST_RR(    "sadd8      r14, r",12,HH2,", r",10,HH1,"")
 731         TEST_UNSUPPORTED(__inst_arm(0xe61cff9a) "       @ sadd8 pc, r12, r10")
 732         TEST_UNSUPPORTED(__inst_arm(0xe61000b0) "") /* Unallocated space */
 733         TEST_UNSUPPORTED(__inst_arm(0xe61fffbf) "") /* Unallocated space */
 734         TEST_UNSUPPORTED(__inst_arm(0xe61000d0) "") /* Unallocated space */
 735         TEST_UNSUPPORTED(__inst_arm(0xe61fffdf) "") /* Unallocated space */
 736         TEST_RR(    "ssub8      r0, r",0,  HH1,", r",1, HH2,"")
 737         TEST_RR(    "ssub8      r14, r",12,HH2,", r",10,HH1,"")
 738         TEST_UNSUPPORTED(__inst_arm(0xe61cfffa) "       @ ssub8 pc, r12, r10")
 739
 740         TEST_RR(    "qadd16     r0, r",0,  HH1,", r",1, HH2,"")
 741         TEST_RR(    "qadd16     r14, r",12,HH2,", r",10,HH1,"")
 742         TEST_UNSUPPORTED(__inst_arm(0xe62cff1a) "       @ qadd16        pc, r12, r10")
 743         TEST_RR(    "qasx       r0, r",0,  HH1,", r",1, HH2,"")
 744         TEST_RR(    "qasx       r14, r",12,HH2,", r",10,HH1,"")
 745         TEST_UNSUPPORTED(__inst_arm(0xe62cff3a) "       @ qasx  pc, r12, r10")
 746         TEST_RR(    "qsax       r0, r",0,  HH1,", r",1, HH2,"")
 747         TEST_RR(    "qsax       r14, r",12,HH2,", r",10,HH1,"")
 748         TEST_UNSUPPORTED(__inst_arm(0xe62cff5a) "       @ qsax  pc, r12, r10")
 749         TEST_RR(    "qsub16     r0, r",0,  HH1,", r",1, HH2,"")
 750         TEST_RR(    "qsub16     r14, r",12,HH2,", r",10,HH1,"")
 751         TEST_UNSUPPORTED(__inst_arm(0xe62cff7a) "       @ qsub16        pc, r12, r10")
 752         TEST_RR(    "qadd8      r0, r",0,  HH1,", r",1, HH2,"")
 753         TEST_RR(    "qadd8      r14, r",12,HH2,", r",10,HH1,"")
 754         TEST_UNSUPPORTED(__inst_arm(0xe62cff9a) "       @ qadd8 pc, r12, r10")
 755         TEST_UNSUPPORTED(__inst_arm(0xe62000b0) "") /* Unallocated space */
 756         TEST_UNSUPPORTED(__inst_arm(0xe62fffbf) "") /* Unallocated space */
 757         TEST_UNSUPPORTED(__inst_arm(0xe62000d0) "") /* Unallocated space */
 758         TEST_UNSUPPORTED(__inst_arm(0xe62fffdf) "") /* Unallocated space */
 759         TEST_RR(    "qsub8      r0, r",0,  HH1,", r",1, HH2,"")
 760         TEST_RR(    "qsub8      r14, r",12,HH2,", r",10,HH1,"")
 761         TEST_UNSUPPORTED(__inst_arm(0xe62cfffa) "       @ qsub8 pc, r12, r10")
 762
 763         TEST_RR(    "shadd16    r0, r",0,  HH1,", r",1, HH2,"")
 764         TEST_RR(    "shadd16    r14, r",12,HH2,", r",10,HH1,"")
 765         TEST_UNSUPPORTED(__inst_arm(0xe63cff1a) "       @ shadd16       pc, r12, r10")
 766         TEST_RR(    "shasx      r0, r",0,  HH1,", r",1, HH2,"")
 767         TEST_RR(    "shasx      r14, r",12,HH2,", r",10,HH1,"")
 768         TEST_UNSUPPORTED(__inst_arm(0xe63cff3a) "       @ shasx pc, r12, r10")
 769         TEST_RR(    "shsax      r0, r",0,  HH1,", r",1, HH2,"")
 770         TEST_RR(    "shsax      r14, r",12,HH2,", r",10,HH1,"")
 771         TEST_UNSUPPORTED(__inst_arm(0xe63cff5a) "       @ shsax pc, r12, r10")
 772         TEST_RR(    "shsub16    r0, r",0,  HH1,", r",1, HH2,"")
 773         TEST_RR(    "shsub16    r14, r",12,HH2,", r",10,HH1,"")
 774         TEST_UNSUPPORTED(__inst_arm(0xe63cff7a) "       @ shsub16       pc, r12, r10")
 775         TEST_RR(    "shadd8     r0, r",0,  HH1,", r",1, HH2,"")
 776         TEST_RR(    "shadd8     r14, r",12,HH2,", r",10,HH1,"")
 777         TEST_UNSUPPORTED(__inst_arm(0xe63cff9a) "       @ shadd8        pc, r12, r10")
 778         TEST_UNSUPPORTED(__inst_arm(0xe63000b0) "") /* Unallocated space */
 779         TEST_UNSUPPORTED(__inst_arm(0xe63fffbf) "") /* Unallocated space */
 780         TEST_UNSUPPORTED(__inst_arm(0xe63000d0) "") /* Unallocated space */
 781         TEST_UNSUPPORTED(__inst_arm(0xe63fffdf) "") /* Unallocated space */
 782         TEST_RR(    "shsub8     r0, r",0,  HH1,", r",1, HH2,"")
 783         TEST_RR(    "shsub8     r14, r",12,HH2,", r",10,HH1,"")
 784         TEST_UNSUPPORTED(__inst_arm(0xe63cfffa) "       @ shsub8        pc, r12, r10")
 785
 786         TEST_GROUP("Parallel addition and subtraction, unsigned")
 787
 788         TEST_UNSUPPORTED(__inst_arm(0xe6400010) "") /* Unallocated space */
 789         TEST_UNSUPPORTED(__inst_arm(0xe64fffff) "") /* Unallocated space */
 790
 791         TEST_RR(    "uadd16     r0, r",0,  HH1,", r",1, HH2,"")
 792         TEST_RR(    "uadd16     r14, r",12,HH2,", r",10,HH1,"")
 793         TEST_UNSUPPORTED(__inst_arm(0xe65cff1a) "       @ uadd16        pc, r12, r10")
 794         TEST_RR(    "uasx       r0, r",0,  HH1,", r",1, HH2,"")
 795         TEST_RR(    "uasx       r14, r",12,HH2,", r",10,HH1,"")
 796         TEST_UNSUPPORTED(__inst_arm(0xe65cff3a) "       @ uasx  pc, r12, r10")
 797         TEST_RR(    "usax       r0, r",0,  HH1,", r",1, HH2,"")
 798         TEST_RR(    "usax       r14, r",12,HH2,", r",10,HH1,"")
 799         TEST_UNSUPPORTED(__inst_arm(0xe65cff5a) "       @ usax  pc, r12, r10")
 800         TEST_RR(    "usub16     r0, r",0,  HH1,", r",1, HH2,"")
 801         TEST_RR(    "usub16     r14, r",12,HH2,", r",10,HH1,"")
 802         TEST_UNSUPPORTED(__inst_arm(0xe65cff7a) "       @ usub16        pc, r12, r10")
 803         TEST_RR(    "uadd8      r0, r",0,  HH1,", r",1, HH2,"")
 804         TEST_RR(    "uadd8      r14, r",12,HH2,", r",10,HH1,"")
 805         TEST_UNSUPPORTED(__inst_arm(0xe65cff9a) "       @ uadd8 pc, r12, r10")
 806         TEST_UNSUPPORTED(__inst_arm(0xe65000b0) "") /* Unallocated space */
 807         TEST_UNSUPPORTED(__inst_arm(0xe65fffbf) "") /* Unallocated space */
 808         TEST_UNSUPPORTED(__inst_arm(0xe65000d0) "") /* Unallocated space */
 809         TEST_UNSUPPORTED(__inst_arm(0xe65fffdf) "") /* Unallocated space */
 810         TEST_RR(    "usub8      r0, r",0,  HH1,", r",1, HH2,"")
 811         TEST_RR(    "usub8      r14, r",12,HH2,", r",10,HH1,"")
 812         TEST_UNSUPPORTED(__inst_arm(0xe65cfffa) "       @ usub8 pc, r12, r10")
 813
 814         TEST_RR(    "uqadd16    r0, r",0,  HH1,", r",1, HH2,"")
 815         TEST_RR(    "uqadd16    r14, r",12,HH2,", r",10,HH1,"")
 816         TEST_UNSUPPORTED(__inst_arm(0xe66cff1a) "       @ uqadd16       pc, r12, r10")
 817         TEST_RR(    "uqasx      r0, r",0,  HH1,", r",1, HH2,"")
 818         TEST_RR(    "uqasx      r14, r",12,HH2,", r",10,HH1,"")
 819         TEST_UNSUPPORTED(__inst_arm(0xe66cff3a) "       @ uqasx pc, r12, r10")
 820         TEST_RR(    "uqsax      r0, r",0,  HH1,", r",1, HH2,"")
 821         TEST_RR(    "uqsax      r14, r",12,HH2,", r",10,HH1,"")
 822         TEST_UNSUPPORTED(__inst_arm(0xe66cff5a) "       @ uqsax pc, r12, r10")
 823         TEST_RR(    "uqsub16    r0, r",0,  HH1,", r",1, HH2,"")
 824         TEST_RR(    "uqsub16    r14, r",12,HH2,", r",10,HH1,"")
 825         TEST_UNSUPPORTED(__inst_arm(0xe66cff7a) "       @ uqsub16       pc, r12, r10")
 826         TEST_RR(    "uqadd8     r0, r",0,  HH1,", r",1, HH2,"")
 827         TEST_RR(    "uqadd8     r14, r",12,HH2,", r",10,HH1,"")
 828         TEST_UNSUPPORTED(__inst_arm(0xe66cff9a) "       @ uqadd8        pc, r12, r10")
 829         TEST_UNSUPPORTED(__inst_arm(0xe66000b0) "") /* Unallocated space */
 830         TEST_UNSUPPORTED(__inst_arm(0xe66fffbf) "") /* Unallocated space */
 831         TEST_UNSUPPORTED(__inst_arm(0xe66000d0) "") /* Unallocated space */
 832         TEST_UNSUPPORTED(__inst_arm(0xe66fffdf) "") /* Unallocated space */
 833         TEST_RR(    "uqsub8     r0, r",0,  HH1,", r",1, HH2,"")
 834         TEST_RR(    "uqsub8     r14, r",12,HH2,", r",10,HH1,"")
 835         TEST_UNSUPPORTED(__inst_arm(0xe66cfffa) "       @ uqsub8        pc, r12, r10")
 836
 837         TEST_RR(    "uhadd16    r0, r",0,  HH1,", r",1, HH2,"")
 838         TEST_RR(    "uhadd16    r14, r",12,HH2,", r",10,HH1,"")
 839         TEST_UNSUPPORTED(__inst_arm(0xe67cff1a) "       @ uhadd16       pc, r12, r10")
 840         TEST_RR(    "uhasx      r0, r",0,  HH1,", r",1, HH2,"")
 841         TEST_RR(    "uhasx      r14, r",12,HH2,", r",10,HH1,"")
 842         TEST_UNSUPPORTED(__inst_arm(0xe67cff3a) "       @ uhasx pc, r12, r10")
 843         TEST_RR(    "uhsax      r0, r",0,  HH1,", r",1, HH2,"")
 844         TEST_RR(    "uhsax      r14, r",12,HH2,", r",10,HH1,"")
 845         TEST_UNSUPPORTED(__inst_arm(0xe67cff5a) "       @ uhsax pc, r12, r10")
 846         TEST_RR(    "uhsub16    r0, r",0,  HH1,", r",1, HH2,"")
 847         TEST_RR(    "uhsub16    r14, r",12,HH2,", r",10,HH1,"")
 848         TEST_UNSUPPORTED(__inst_arm(0xe67cff7a) "       @ uhsub16       pc, r12, r10")
 849         TEST_RR(    "uhadd8     r0, r",0,  HH1,", r",1, HH2,"")
 850         TEST_RR(    "uhadd8     r14, r",12,HH2,", r",10,HH1,"")
 851         TEST_UNSUPPORTED(__inst_arm(0xe67cff9a) "       @ uhadd8        pc, r12, r10")
 852         TEST_UNSUPPORTED(__inst_arm(0xe67000b0) "") /* Unallocated space */
 853         TEST_UNSUPPORTED(__inst_arm(0xe67fffbf) "") /* Unallocated space */
 854         TEST_UNSUPPORTED(__inst_arm(0xe67000d0) "") /* Unallocated space */
 855         TEST_UNSUPPORTED(__inst_arm(0xe67fffdf) "") /* Unallocated space */
 856         TEST_RR(    "uhsub8     r0, r",0,  HH1,", r",1, HH2,"")
 857         TEST_RR(    "uhsub8     r14, r",12,HH2,", r",10,HH1,"")
 858         TEST_UNSUPPORTED(__inst_arm(0xe67cfffa) "       @ uhsub8        pc, r12, r10")
 859         TEST_UNSUPPORTED(__inst_arm(0xe67feffa) "       @ uhsub8        r14, pc, r10")
 860         TEST_UNSUPPORTED(__inst_arm(0xe67cefff) "       @ uhsub8        r14, r12, pc")
 861 #endif /* __LINUX_ARM_ARCH__ >= 7 */
 862
 863 #if __LINUX_ARM_ARCH__ >= 6
 864         TEST_GROUP("Packing, unpacking, saturation, and reversal")
 865
 866         TEST_RR(    "pkhbt      r0, r",0,  HH1,", r",1, HH2,"")
 867         TEST_RR(    "pkhbt      r14,r",12, HH1,", r",10,HH2,", lsl #2")
 868         TEST_UNSUPPORTED(__inst_arm(0xe68cf11a) "       @ pkhbt pc, r12, r10, lsl #2")
 869         TEST_RR(    "pkhtb      r0, r",0,  HH1,", r",1, HH2,"")
 870         TEST_RR(    "pkhtb      r14,r",12, HH1,", r",10,HH2,", asr #2")
 871         TEST_UNSUPPORTED(__inst_arm(0xe68cf15a) "       @ pkhtb pc, r12, r10, asr #2")
 872         TEST_UNSUPPORTED(__inst_arm(0xe68fe15a) "       @ pkhtb r14, pc, r10, asr #2")
 873         TEST_UNSUPPORTED(__inst_arm(0xe68ce15f) "       @ pkhtb r14, r12, pc, asr #2")
 874         TEST_UNSUPPORTED(__inst_arm(0xe6900010) "") /* Unallocated space */
 875         TEST_UNSUPPORTED(__inst_arm(0xe69fffdf) "") /* Unallocated space */
 876
 877         TEST_R(     "ssat       r0, #24, r",0,   VAL1,"")
 878         TEST_R(     "ssat       r14, #24, r",12, VAL2,"")
 879         TEST_R(     "ssat       r0, #24, r",0,   VAL1,", lsl #8")
 880         TEST_R(     "ssat       r14, #24, r",12, VAL2,", asr #8")
 881         TEST_UNSUPPORTED(__inst_arm(0xe6b7f01c) "       @ ssat  pc, #24, r12")
 882
 883         TEST_R(     "usat       r0, #24, r",0,   VAL1,"")
 884         TEST_R(     "usat       r14, #24, r",12, VAL2,"")
 885         TEST_R(     "usat       r0, #24, r",0,   VAL1,", lsl #8")
 886         TEST_R(     "usat       r14, #24, r",12, VAL2,", asr #8")
 887         TEST_UNSUPPORTED(__inst_arm(0xe6f7f01c) "       @ usat  pc, #24, r12")
 888
 889         TEST_RR(    "sxtab16    r0, r",0,  HH1,", r",1, HH2,"")
 890         TEST_RR(    "sxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
 891         TEST_R(     "sxtb16     r8, r",7,  HH1,"")
 892         TEST_UNSUPPORTED(__inst_arm(0xe68cf47a) "       @ sxtab16       pc,r12, r10, ror #8")
 893
 894         TEST_RR(    "sel        r0, r",0,  VAL1,", r",1, VAL2,"")
 895         TEST_RR(    "sel        r14, r",12,VAL1,", r",10, VAL2,"")
 896         TEST_UNSUPPORTED(__inst_arm(0xe68cffba) "       @ sel   pc, r12, r10")
 897         TEST_UNSUPPORTED(__inst_arm(0xe68fefba) "       @ sel   r14, pc, r10")
 898         TEST_UNSUPPORTED(__inst_arm(0xe68cefbf) "       @ sel   r14, r12, pc")
 899
 900         TEST_R(     "ssat16     r0, #12, r",0,   HH1,"")
 901         TEST_R(     "ssat16     r14, #12, r",12, HH2,"")
 902         TEST_UNSUPPORTED(__inst_arm(0xe6abff3c) "       @ ssat16        pc, #12, r12")
 903
 904         TEST_RR(    "sxtab      r0, r",0,  HH1,", r",1, HH2,"")
 905         TEST_RR(    "sxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
 906         TEST_R(     "sxtb       r8, r",7,  HH1,"")
 907         TEST_UNSUPPORTED(__inst_arm(0xe6acf47a) "       @ sxtab pc,r12, r10, ror #8")
 908
 909         TEST_R(     "rev        r0, r",0,   VAL1,"")
 910         TEST_R(     "rev        r14, r",12, VAL2,"")
 911         TEST_UNSUPPORTED(__inst_arm(0xe6bfff3c) "       @ rev   pc, r12")
 912
 913         TEST_RR(    "sxtah      r0, r",0,  HH1,", r",1, HH2,"")
 914         TEST_RR(    "sxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
 915         TEST_R(     "sxth       r8, r",7,  HH1,"")
 916         TEST_UNSUPPORTED(__inst_arm(0xe6bcf47a) "       @ sxtah pc,r12, r10, ror #8")
 917
 918         TEST_R(     "rev16      r0, r",0,   VAL1,"")
 919         TEST_R(     "rev16      r14, r",12, VAL2,"")
 920         TEST_UNSUPPORTED(__inst_arm(0xe6bfffbc) "       @ rev16 pc, r12")
 921
 922         TEST_RR(    "uxtab16    r0, r",0,  HH1,", r",1, HH2,"")
 923         TEST_RR(    "uxtab16    r14,r",12, HH2,", r",10,HH1,", ror #8")
 924         TEST_R(     "uxtb16     r8, r",7,  HH1,"")
 925         TEST_UNSUPPORTED(__inst_arm(0xe6ccf47a) "       @ uxtab16       pc,r12, r10, ror #8")
 926
 927         TEST_R(     "usat16     r0, #12, r",0,   HH1,"")
 928         TEST_R(     "usat16     r14, #12, r",12, HH2,"")
 929         TEST_UNSUPPORTED(__inst_arm(0xe6ecff3c) "       @ usat16        pc, #12, r12")
 930         TEST_UNSUPPORTED(__inst_arm(0xe6ecef3f) "       @ usat16        r14, #12, pc")
 931
 932         TEST_RR(    "uxtab      r0, r",0,  HH1,", r",1, HH2,"")
 933         TEST_RR(    "uxtab      r14,r",12, HH2,", r",10,HH1,", ror #8")
 934         TEST_R(     "uxtb       r8, r",7,  HH1,"")
 935         TEST_UNSUPPORTED(__inst_arm(0xe6ecf47a) "       @ uxtab pc,r12, r10, ror #8")
 936
 937 #if __LINUX_ARM_ARCH__ >= 7
 938         TEST_R(     "rbit       r0, r",0,   VAL1,"")
 939         TEST_R(     "rbit       r14, r",12, VAL2,"")
 940         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ rbit  pc, r12")
 941 #endif
 942
 943         TEST_RR(    "uxtah      r0, r",0,  HH1,", r",1, HH2,"")
 944         TEST_RR(    "uxtah      r14,r",12, HH2,", r",10,HH1,", ror #8")
 945         TEST_R(     "uxth       r8, r",7,  HH1,"")
 946         TEST_UNSUPPORTED(__inst_arm(0xe6fff077) "       @ uxth  pc, r7")
 947         TEST_UNSUPPORTED(__inst_arm(0xe6ff807f) "       @ uxth  r8, pc")
 948         TEST_UNSUPPORTED(__inst_arm(0xe6fcf47a) "       @ uxtah pc, r12, r10, ror #8")
 949         TEST_UNSUPPORTED(__inst_arm(0xe6fce47f) "       @ uxtah r14, r12, pc, ror #8")
 950
 951         TEST_R(     "revsh      r0, r",0,   VAL1,"")
 952         TEST_R(     "revsh      r14, r",12, VAL2,"")
 953         TEST_UNSUPPORTED(__inst_arm(0xe6ffff3c) "       @ revsh pc, r12")
 954         TEST_UNSUPPORTED(__inst_arm(0xe6ffef3f) "       @ revsh r14, pc")
 955
 956         TEST_UNSUPPORTED(__inst_arm(0xe6900070) "") /* Unallocated space */
 957         TEST_UNSUPPORTED(__inst_arm(0xe69fff7f) "") /* Unallocated space */
 958
 959         TEST_UNSUPPORTED(__inst_arm(0xe6d00070) "") /* Unallocated space */
 960         TEST_UNSUPPORTED(__inst_arm(0xe6dfff7f) "") /* Unallocated space */
 961 #endif /* __LINUX_ARM_ARCH__ >= 6 */
 962
 963 #if __LINUX_ARM_ARCH__ >= 6
 964         TEST_GROUP("Signed multiplies")
 965
 966         TEST_RRR(   "smlad      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
 967         TEST_RRR(   "smlad      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
 968         TEST_UNSUPPORTED(__inst_arm(0xe70f8a1c) "       @ smlad pc, r12, r10, r8")
 969         TEST_RRR(   "smladx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
 970         TEST_RRR(   "smladx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
 971         TEST_UNSUPPORTED(__inst_arm(0xe70f8a3c) "       @ smladx        pc, r12, r10, r8")
 972
 973         TEST_RR(   "smuad       r0, r",0,  HH1,", r",1, HH2,"")
 974         TEST_RR(   "smuad       r14, r",12,HH2,", r",10,HH1,"")
 975         TEST_UNSUPPORTED(__inst_arm(0xe70ffa1c) "       @ smuad pc, r12, r10")
 976         TEST_RR(   "smuadx      r0, r",0,  HH1,", r",1, HH2,"")
 977         TEST_RR(   "smuadx      r14, r",12,HH2,", r",10,HH1,"")
 978         TEST_UNSUPPORTED(__inst_arm(0xe70ffa3c) "       @ smuadx        pc, r12, r10")
 979
 980         TEST_RRR(   "smlsd      r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
 981         TEST_RRR(   "smlsd      r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
 982         TEST_UNSUPPORTED(__inst_arm(0xe70f8a5c) "       @ smlsd pc, r12, r10, r8")
 983         TEST_RRR(   "smlsdx     r0, r",0,  HH1,", r",1, HH2,", r",2, VAL1,"")
 984         TEST_RRR(   "smlsdx     r14, r",12,HH2,", r",10,HH1,", r",8, VAL2,"")
 985         TEST_UNSUPPORTED(__inst_arm(0xe70f8a7c) "       @ smlsdx        pc, r12, r10, r8")
 986
 987         TEST_RR(   "smusd       r0, r",0,  HH1,", r",1, HH2,"")
 988         TEST_RR(   "smusd       r14, r",12,HH2,", r",10,HH1,"")
 989         TEST_UNSUPPORTED(__inst_arm(0xe70ffa5c) "       @ smusd pc, r12, r10")
 990         TEST_RR(   "smusdx      r0, r",0,  HH1,", r",1, HH2,"")
 991         TEST_RR(   "smusdx      r14, r",12,HH2,", r",10,HH1,"")
 992         TEST_UNSUPPORTED(__inst_arm(0xe70ffa7c) "       @ smusdx        pc, r12, r10")
 993
 994         TEST_RRRR( "smlald      r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
 995         TEST_RRRR( "smlald      r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
 996         TEST_UNSUPPORTED(__inst_arm(0xe74af819) "       @ smlald        pc, r10, r9, r8")
 997         TEST_UNSUPPORTED(__inst_arm(0xe74fb819) "       @ smlald        r11, pc, r9, r8")
 998         TEST_UNSUPPORTED(__inst_arm(0xe74ab81f) "       @ smlald        r11, r10, pc, r8")
 999         TEST_UNSUPPORTED(__inst_arm(0xe74abf19) "       @ smlald        r11, r10, r9, pc")
1000
1001         TEST_RRRR( "smlaldx     r",0, VAL1,", r",1, VAL2, ", r",0, HH1,", r",1, HH2)
1002         TEST_RRRR( "smlaldx     r",11,VAL2,", r",10,VAL1, ", r",9, HH2,", r",8, HH1)
1003         TEST_UNSUPPORTED(__inst_arm(0xe74af839) "       @ smlaldx       pc, r10, r9, r8")
1004         TEST_UNSUPPORTED(__inst_arm(0xe74fb839) "       @ smlaldx       r11, pc, r9, r8")
1005
1006         TEST_RRR(  "smmla       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1007         TEST_RRR(  "smmla       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1008         TEST_UNSUPPORTED(__inst_arm(0xe75f8a1c) "       @ smmla pc, r12, r10, r8")
1009         TEST_RRR(  "smmlar      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1010         TEST_RRR(  "smmlar      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1011         TEST_UNSUPPORTED(__inst_arm(0xe75f8a3c) "       @ smmlar        pc, r12, r10, r8")
1012
1013         TEST_RR(   "smmul       r0, r",0,  VAL1,", r",1, VAL2,"")
1014         TEST_RR(   "smmul       r14, r",12,VAL2,", r",10,VAL1,"")
1015         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ smmul pc, r12, r10")
1016         TEST_RR(   "smmulr      r0, r",0,  VAL1,", r",1, VAL2,"")
1017         TEST_RR(   "smmulr      r14, r",12,VAL2,", r",10,VAL1,"")
1018         TEST_UNSUPPORTED(__inst_arm(0xe75ffa3c) "       @ smmulr        pc, r12, r10")
1019
1020         TEST_RRR(  "smmls       r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1021         TEST_RRR(  "smmls       r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1022         TEST_UNSUPPORTED(__inst_arm(0xe75f8adc) "       @ smmls pc, r12, r10, r8")
1023         TEST_RRR(  "smmlsr      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL1,"")
1024         TEST_RRR(  "smmlsr      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL2,"")
1025         TEST_UNSUPPORTED(__inst_arm(0xe75f8afc) "       @ smmlsr        pc, r12, r10, r8")
1026         TEST_UNSUPPORTED(__inst_arm(0xe75e8aff) "       @ smmlsr        r14, pc, r10, r8")
1027         TEST_UNSUPPORTED(__inst_arm(0xe75e8ffc) "       @ smmlsr        r14, r12, pc, r8")
1028         TEST_UNSUPPORTED(__inst_arm(0xe75efafc) "       @ smmlsr        r14, r12, r10, pc")
1029
1030         TEST_RR(   "usad8       r0, r",0,  VAL1,", r",1, VAL2,"")
1031         TEST_RR(   "usad8       r14, r",12,VAL2,", r",10,VAL1,"")
1032         TEST_UNSUPPORTED(__inst_arm(0xe75ffa1c) "       @ usad8 pc, r12, r10")
1033         TEST_UNSUPPORTED(__inst_arm(0xe75efa1f) "       @ usad8 r14, pc, r10")
1034         TEST_UNSUPPORTED(__inst_arm(0xe75eff1c) "       @ usad8 r14, r12, pc")
1035
1036         TEST_RRR(  "usada8      r0, r",0,  VAL1,", r",1, VAL2,", r",2, VAL3,"")
1037         TEST_RRR(  "usada8      r14, r",12,VAL2,", r",10,VAL1,", r",8, VAL3,"")
1038         TEST_UNSUPPORTED(__inst_arm(0xe78f8a1c) "       @ usada8        pc, r12, r10, r8")
1039         TEST_UNSUPPORTED(__inst_arm(0xe78e8a1f) "       @ usada8        r14, pc, r10, r8")
1040         TEST_UNSUPPORTED(__inst_arm(0xe78e8f1c) "       @ usada8        r14, r12, pc, r8")
1041 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1042
1043 #if __LINUX_ARM_ARCH__ >= 7
1044         TEST_GROUP("Bit Field")
1045
1046         TEST_R(     "sbfx       r0, r",0  , VAL1,", #0, #31")
1047         TEST_R(     "sbfxeq     r14, r",12, VAL2,", #8, #16")
1048         TEST_R(     "sbfx       r4, r",10,  VAL1,", #16, #15")
1049         TEST_UNSUPPORTED(__inst_arm(0xe7aff45c) "       @ sbfx  pc, r12, #8, #16")
1050
1051         TEST_R(     "ubfx       r0, r",0  , VAL1,", #0, #31")
1052         TEST_R(     "ubfxcs     r14, r",12, VAL2,", #8, #16")
1053         TEST_R(     "ubfx       r4, r",10,  VAL1,", #16, #15")
1054         TEST_UNSUPPORTED(__inst_arm(0xe7eff45c) "       @ ubfx  pc, r12, #8, #16")
1055         TEST_UNSUPPORTED(__inst_arm(0xe7efc45f) "       @ ubfx  r12, pc, #8, #16")
1056
1057         TEST_R(     "bfc        r",0, VAL1,", #4, #20")
1058         TEST_R(     "bfcvs      r",14,VAL2,", #4, #20")
1059         TEST_R(     "bfc        r",7, VAL1,", #0, #31")
1060         TEST_R(     "bfc        r",8, VAL2,", #0, #31")
1061         TEST_UNSUPPORTED(__inst_arm(0xe7def01f) "       @ bfc   pc, #0, #31");
1062
1063         TEST_RR(    "bfi        r",0, VAL1,", r",0  , VAL2,", #0, #31")
1064         TEST_RR(    "bfipl      r",12,VAL1,", r",14 , VAL2,", #4, #20")
1065         TEST_UNSUPPORTED(__inst_arm(0xe7d7f21e) "       @ bfi   pc, r14, #4, #20")
1066
1067         TEST_UNSUPPORTED(__inst_arm(0x07f000f0) "")  /* Permanently UNDEFINED */
1068         TEST_UNSUPPORTED(__inst_arm(0x07ffffff) "")  /* Permanently UNDEFINED */
1069 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1070
1071         TEST_GROUP("Branch, branch with link, and block data transfer")
1072
1073         TEST_P(   "stmda        r",0, 16*4,", {r0}")
1074         TEST_P(   "stmeqda      r",4, 16*4,", {r0-r15}")
1075         TEST_P(   "stmneda      r",8, 16*4,"!, {r8-r15}")
1076         TEST_P(   "stmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1077         TEST_P(   "stmda        r",13,0,   "!, {pc}")
1078
1079         TEST_P(   "ldmda        r",0, 16*4,", {r0}")
1080         TEST_BF_P("ldmcsda      r",4, 15*4,", {r0-r15}")
1081         TEST_BF_P("ldmccda      r",7, 15*4,"!, {r8-r15}")
1082         TEST_P(   "ldmda        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1083         TEST_BF_P("ldmda        r",14,15*4,"!, {pc}")
1084
1085         TEST_P(   "stmia        r",0, 16*4,", {r0}")
1086         TEST_P(   "stmmiia      r",4, 16*4,", {r0-r15}")
1087         TEST_P(   "stmplia      r",8, 16*4,"!, {r8-r15}")
1088         TEST_P(   "stmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1089         TEST_P(   "stmia        r",14,0,   "!, {pc}")
1090
1091         TEST_P(   "ldmia        r",0, 16*4,", {r0}")
1092         TEST_BF_P("ldmvsia      r",4, 0,   ", {r0-r15}")
1093         TEST_BF_P("ldmvcia      r",7, 8*4, "!, {r8-r15}")
1094         TEST_P(   "ldmia        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1095         TEST_BF_P("ldmia        r",14,15*4,"!, {pc}")
1096
1097         TEST_P(   "stmdb        r",0, 16*4,", {r0}")
1098         TEST_P(   "stmhidb      r",4, 16*4,", {r0-r15}")
1099         TEST_P(   "stmlsdb      r",8, 16*4,"!, {r8-r15}")
1100         TEST_P(   "stmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1101         TEST_P(   "stmdb        r",13,4,   "!, {pc}")
1102
1103         TEST_P(   "ldmdb        r",0, 16*4,", {r0}")
1104         TEST_BF_P("ldmgedb      r",4, 16*4,", {r0-r15}")
1105         TEST_BF_P("ldmltdb      r",7, 16*4,"!, {r8-r15}")
1106         TEST_P(   "ldmdb        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1107         TEST_BF_P("ldmdb        r",14,16*4,"!, {pc}")
1108
1109         TEST_P(   "stmib        r",0, 16*4,", {r0}")
1110         TEST_P(   "stmgtib      r",4, 16*4,", {r0-r15}")
1111         TEST_P(   "stmleib      r",8, 16*4,"!, {r8-r15}")
1112         TEST_P(   "stmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1113         TEST_P(   "stmib        r",13,-4,  "!, {pc}")
1114
1115         TEST_P(   "ldmib        r",0, 16*4,", {r0}")
1116         TEST_BF_P("ldmeqib      r",4, -4,", {r0-r15}")
1117         TEST_BF_P("ldmneib      r",7, 7*4,"!, {r8-r15}")
1118         TEST_P(   "ldmib        r",12,16*4,"!, {r1,r3,r5,r7,r8-r11,r14}")
1119         TEST_BF_P("ldmib        r",14,14*4,"!, {pc}")
1120
1121         TEST_P(   "stmdb        r",13,16*4,"!, {r3-r12,lr}")
1122         TEST_P(   "stmeqdb      r",13,16*4,"!, {r3-r12}")
1123         TEST_P(   "stmnedb      r",2, 16*4,", {r3-r12,lr}")
1124         TEST_P(   "stmdb        r",13,16*4,"!, {r2-r12,lr}")
1125         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12}")
1126         TEST_P(   "stmdb        r",0, 16*4,", {r0-r12,lr}")
1127
1128         TEST_BF_P("ldmia        r",13,5*4, "!, {r3-r12,pc}")
1129         TEST_P(   "ldmccia      r",13,5*4, "!, {r3-r12}")
1130         TEST_BF_P("ldmcsia      r",2, 5*4, "!, {r3-r12,pc}")
1131         TEST_BF_P("ldmia        r",13,4*4, "!, {r2-r12,pc}")
1132         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12}")
1133         TEST_P(   "ldmia        r",0, 16*4,", {r0-r12,lr}")
1134
1135 #ifdef CONFIG_THUMB2_KERNEL
1136         TEST_ARM_TO_THUMB_INTERWORK_P("ldmplia  r",0,15*4,", {pc}")
1137         TEST_ARM_TO_THUMB_INTERWORK_P("ldmmiia  r",13,0,", {r0-r15}")
1138 #endif
1139         TEST_BF("b      2f")
1140         TEST_BF("bl     2f")
1141         TEST_BB("b      2b")
1142         TEST_BB("bl     2b")
1143
1144         TEST_BF("beq    2f")
1145         TEST_BF("bleq   2f")
1146         TEST_BB("bne    2b")
1147         TEST_BB("blne   2b")
1148
1149         TEST_BF("bgt    2f")
1150         TEST_BF("blgt   2f")
1151         TEST_BB("blt    2b")
1152         TEST_BB("bllt   2b")
1153
1154         TEST_GROUP("Supervisor Call, and coprocessor instructions")
1155
1156         /*
1157          * We can't really test these by executing them, so all
1158          * we can do is check that probes are, or are not allowed.
1159          * At the moment none are allowed...
1160          */
1161 #define TEST_COPROCESSOR(code) TEST_UNSUPPORTED(code)
1162
1163 #define COPROCESSOR_INSTRUCTIONS_ST_LD(two,cc)                                  \
1164         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]")                     \
1165         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]")                    \
1166         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #4]!")                    \
1167         TEST_COPROCESSOR("stc"two"      0, cr0, [r13, #-4]!")                   \
1168         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #4")                     \
1169         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], #-4")                    \
1170         TEST_COPROCESSOR("stc"two"      0, cr0, [r13], {1}")                    \
1171         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]")                     \
1172         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]")                    \
1173         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #4]!")                    \
1174         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13, #-4]!")                   \
1175         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #4")                     \
1176         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], #-4")                    \
1177         TEST_COPROCESSOR("stc"two"l     0, cr0, [r13], {1}")                    \
1178         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]")                     \
1179         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]")                    \
1180         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #4]!")                    \
1181         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13, #-4]!")                   \
1182         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #4")                     \
1183         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], #-4")                    \
1184         TEST_COPROCESSOR("ldc"two"      0, cr0, [r13], {1}")                    \
1185         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]")                     \
1186         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]")                    \
1187         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #4]!")                    \
1188         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13, #-4]!")                   \
1189         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #4")                     \
1190         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], #-4")                    \
1191         TEST_COPROCESSOR("ldc"two"l     0, cr0, [r13], {1}")                    \
1192                                                                                 \
1193         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #4]")                     \
1194         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15, #-4]")                    \
1195         TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) "  @ stc"two"      0, cr0, [r15, #4]!")    \
1196         TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) "  @ stc"two"      0, cr0, [r15, #-4]!")   \
1197         TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) "  @ stc"two"      0, cr0, [r15], #4")     \
1198         TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) "  @ stc"two"      0, cr0, [r15], #-4")    \
1199         TEST_COPROCESSOR( "stc"two"     0, cr0, [r15], {1}")                    \
1200         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #4]")                     \
1201         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15, #-4]")                    \
1202         TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) "  @ stc"two"l     0, cr0, [r15, #4]!")    \
1203         TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) "  @ stc"two"l     0, cr0, [r15, #-4]!")   \
1204         TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) "  @ stc"two"l     0, cr0, [r15], #4")     \
1205         TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) "  @ stc"two"l     0, cr0, [r15], #-4")    \
1206         TEST_COPROCESSOR( "stc"two"l    0, cr0, [r15], {1}")                    \
1207         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #4]")                     \
1208         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15, #-4]")                    \
1209         TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) "  @ ldc"two"      0, cr0, [r15, #4]!")    \
1210         TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) "  @ ldc"two"      0, cr0, [r15, #-4]!")   \
1211         TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) "  @ ldc"two"      0, cr0, [r15], #4")     \
1212         TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) "  @ ldc"two"      0, cr0, [r15], #-4")    \
1213         TEST_COPROCESSOR( "ldc"two"     0, cr0, [r15], {1}")                    \
1214         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #4]")                     \
1215         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15, #-4]")                    \
1216         TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) "  @ ldc"two"l     0, cr0, [r15, #4]!")    \
1217         TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) "  @ ldc"two"l     0, cr0, [r15, #-4]!")   \
1218         TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) "  @ ldc"two"l     0, cr0, [r15], #4")     \
1219         TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) "  @ ldc"two"l     0, cr0, [r15], #-4")    \
1220         TEST_COPROCESSOR( "ldc"two"l    0, cr0, [r15], {1}")
1221
1222 #define COPROCESSOR_INSTRUCTIONS_MC_MR(two,cc)                                  \
1223                                                                                 \
1224         TEST_COPROCESSOR( "mcrr"two"    0, 15, r0, r14, cr0")                   \
1225         TEST_COPROCESSOR( "mcrr"two"    15, 0, r14, r0, cr15")                  \
1226         TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) "  @ mcrr"two"     0, 15, r0, r15, cr0")   \
1227         TEST_UNSUPPORTED(__inst_arm(0x##cc##c40ff0f) "  @ mcrr"two"     15, 0, r15, r0, cr15")  \
1228         TEST_COPROCESSOR( "mrrc"two"    0, 15, r0, r14, cr0")                   \
1229         TEST_COPROCESSOR( "mrrc"two"    15, 0, r14, r0, cr15")                  \
1230         TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) "  @ mrrc"two"     0, 15, r0, r15, cr0")   \
1231         TEST_UNSUPPORTED(__inst_arm(0x##cc##c50ff0f) "  @ mrrc"two"     15, 0, r15, r0, cr15")  \
1232         TEST_COPROCESSOR( "cdp"two"     15, 15, cr15, cr15, cr15, 7")           \
1233         TEST_COPROCESSOR( "cdp"two"     0, 0, cr0, cr0, cr0, 0")                \
1234         TEST_COPROCESSOR( "mcr"two"     15, 7, r15, cr15, cr15, 7")             \
1235         TEST_COPROCESSOR( "mcr"two"     0, 0, r0, cr0, cr0, 0")                 \
1236         TEST_COPROCESSOR( "mrc"two"     15, 7, r15, cr15, cr15, 7")             \
1237         TEST_COPROCESSOR( "mrc"two"     0, 0, r0, cr0, cr0, 0")
1238
1239         COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1240 #if __LINUX_ARM_ARCH__ >= 5
1241         COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1242 #endif
1243         TEST_UNSUPPORTED("svc   0")
1244         TEST_UNSUPPORTED("svc   0xffffff")
1245
1246         TEST_UNSUPPORTED("svc   0")
1247
1248         TEST_GROUP("Unconditional instruction")
1249
1250 #if __LINUX_ARM_ARCH__ >= 6
1251         TEST_UNSUPPORTED("srsda sp, 0x13")
1252         TEST_UNSUPPORTED("srsdb sp, 0x13")
1253         TEST_UNSUPPORTED("srsia sp, 0x13")
1254         TEST_UNSUPPORTED("srsib sp, 0x13")
1255         TEST_UNSUPPORTED("srsda sp!, 0x13")
1256         TEST_UNSUPPORTED("srsdb sp!, 0x13")
1257         TEST_UNSUPPORTED("srsia sp!, 0x13")
1258         TEST_UNSUPPORTED("srsib sp!, 0x13")
1259
1260         TEST_UNSUPPORTED("rfeda sp")
1261         TEST_UNSUPPORTED("rfedb sp")
1262         TEST_UNSUPPORTED("rfeia sp")
1263         TEST_UNSUPPORTED("rfeib sp")
1264         TEST_UNSUPPORTED("rfeda sp!")
1265         TEST_UNSUPPORTED("rfedb sp!")
1266         TEST_UNSUPPORTED("rfeia sp!")
1267         TEST_UNSUPPORTED("rfeib sp!")
1268         TEST_UNSUPPORTED(__inst_arm(0xf81d0a00) "       @ rfeda pc")
1269         TEST_UNSUPPORTED(__inst_arm(0xf91d0a00) "       @ rfedb pc")
1270         TEST_UNSUPPORTED(__inst_arm(0xf89d0a00) "       @ rfeia pc")
1271         TEST_UNSUPPORTED(__inst_arm(0xf99d0a00) "       @ rfeib pc")
1272         TEST_UNSUPPORTED(__inst_arm(0xf83d0a00) "       @ rfeda pc!")
1273         TEST_UNSUPPORTED(__inst_arm(0xf93d0a00) "       @ rfedb pc!")
1274         TEST_UNSUPPORTED(__inst_arm(0xf8bd0a00) "       @ rfeia pc!")
1275         TEST_UNSUPPORTED(__inst_arm(0xf9bd0a00) "       @ rfeib pc!")
1276 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1277
1278 #if __LINUX_ARM_ARCH__ >= 6
1279         TEST_X( "blx    __dummy_thumb_subroutine_even",
1280                 ".thumb                         \n\t"
1281                 ".space 4                       \n\t"
1282                 ".type __dummy_thumb_subroutine_even, %%function \n\t"
1283                 "__dummy_thumb_subroutine_even: \n\t"
1284                 "mov    r0, pc                  \n\t"
1285                 "bx     lr                      \n\t"
1286                 ".arm                           \n\t"
1287         )
1288         TEST(   "blx    __dummy_thumb_subroutine_even")
1289
1290         TEST_X( "blx    __dummy_thumb_subroutine_odd",
1291                 ".thumb                         \n\t"
1292                 ".space 2                       \n\t"
1293                 ".type __dummy_thumb_subroutine_odd, %%function \n\t"
1294                 "__dummy_thumb_subroutine_odd:  \n\t"
1295                 "mov    r0, pc                  \n\t"
1296                 "bx     lr                      \n\t"
1297                 ".arm                           \n\t"
1298         )
1299         TEST(   "blx    __dummy_thumb_subroutine_odd")
1300 #endif /* __LINUX_ARM_ARCH__ >= 6 */
1301
1302 #if __LINUX_ARM_ARCH__ >= 5
1303         COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1304 #endif
1305 #if __LINUX_ARM_ARCH__ >= 6
1306         COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1307 #endif
1308
1309         TEST_GROUP("Miscellaneous instructions, memory hints, and Advanced SIMD instructions")
1310
1311 #if __LINUX_ARM_ARCH__ >= 6
1312         TEST_UNSUPPORTED("cps   0x13")
1313         TEST_UNSUPPORTED("cpsie i")
1314         TEST_UNSUPPORTED("cpsid i")
1315         TEST_UNSUPPORTED("cpsie i,0x13")
1316         TEST_UNSUPPORTED("cpsid i,0x13")
1317         TEST_UNSUPPORTED("setend        le")
1318         TEST_UNSUPPORTED("setend        be")
1319 #endif
1320
1321 #if __LINUX_ARM_ARCH__ >= 7
1322         TEST_P("pli     [r",0,0b,", #16]")
1323         TEST(  "pli     [pc, #0]")
1324         TEST_RR("pli    [r",12,0b,", r",0, 16,"]")
1325         TEST_RR("pli    [r",0, 0b,", -r",12,16,", lsl #4]")
1326 #endif
1327
1328 #if __LINUX_ARM_ARCH__ >= 5
1329         TEST_P("pld     [r",0,32,", #-16]")
1330         TEST(  "pld     [pc, #0]")
1331         TEST_PR("pld    [r",7, 24, ", r",0, 16,"]")
1332         TEST_PR("pld    [r",8, 24, ", -r",12,16,", lsl #4]")
1333 #endif
1334
1335 #if __LINUX_ARM_ARCH__ >= 7
1336         TEST_SUPPORTED(  __inst_arm(0xf590f000) "       @ pldw [r0, #0]")
1337         TEST_SUPPORTED(  __inst_arm(0xf797f000) "       @ pldw  [r7, r0]")
1338         TEST_SUPPORTED(  __inst_arm(0xf798f18c) "       @ pldw  [r8, r12, lsl #3]");
1339 #endif
1340
1341 #if __LINUX_ARM_ARCH__ >= 7
1342         TEST_UNSUPPORTED("clrex")
1343         TEST_UNSUPPORTED("dsb")
1344         TEST_UNSUPPORTED("dmb")
1345         TEST_UNSUPPORTED("isb")
1346 #endif
1347
1348         verbose("\n");
1349 }
1350