dts: arm64: rockchip: add rk3366-tb dts file
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_8846.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
8 #include "../../../arm/boot/dts/lcd-F402.dtsi"
9 #include "rk3368-cif-sensor.dtsi"
10 #include <dt-bindings/suspend/rockchip-rk3368.h>
11
12 / {
13         chosen {
14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
15         };
16
17         fiq-debugger {
18                 status = "okay";
19         };
20
21         wireless-wlan {
22                 compatible = "wlan-platdata";
23                 rockchip,grf = <&grf>;
24
25                 /* wifi_chip_type - wifi chip define
26                  * ap6210, ap6330, ap6335
27                  * rtl8188eu, rtl8723bs, rtl8723bu
28                  * esp8089
29                 */
30                 wifi_chip_type = "ap6335";
31
32                 sdio_vref = <1800>; //1800mv or 3300mv
33
34                 //keep_wifi_power_on;
35
36                 //power_ctrl_by_pmu;
37                 power_pmu_regulator = "act_ldo3";
38                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
39
40                 //vref_ctrl_enable;
41                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
42                 vref_pmu_regulator = "act_ldo3";
43                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
44
45                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
46                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
47                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
48
49                 status = "okay";
50         };
51
52         wireless-bluetooth {
53                 compatible = "bluetooth-platdata";
54
55                 //wifi-bt-power-toggle;
56
57                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
58                 pinctrl-names = "default","rts_gpio";
59                 pinctrl-0 = <&uart0_rts>;
60                 pinctrl-1 = <&uart0_rts_gpio>;
61
62                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
63                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
64                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
65                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
66
67                 status = "okay";
68         };
69
70         hallsensor {
71                compatible = "hall_och165t";
72                type = <SENSOR_TYPE_HALL>;
73                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
74         };
75
76         backlight: backlight {
77                 compatible = "pwm-backlight";
78                 pwms = <&pwm0 0 25000>;
79                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
80                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
81                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
82                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
83                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
84                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
85                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
86                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
87                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
88                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
89                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
90                      9 8 7 6 5 4 3 2 1 0>;
91                 default-brightness-level = <200>;
92                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
93         };
94
95         pwm_regulator {
96                 compatible = "rockchip_pwm_regulator";
97                 pwms = <&pwm1 0 2000>;
98                 rockchip,pwm_id= <1>;
99                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
100                 rockchip,pwm_voltage= <1000000>;
101                 rockchip,pwm_min_voltage= <925000>;
102                 rockchip,pwm_max_voltage= <1400000>;
103                 rockchip,pwm_suspend_voltage= <950000>;
104                 rockchip,pwm_coefficient= <475>;
105                 regulators {
106                         #address-cells = <1>;
107                         #size-cells = <0>;
108                         pwm_reg0: regulator@0 {
109                                 regulator-compatible = "pwm_dcdc1";
110                                 regulator-name= "vdd_logic";
111                                 regulator-min-microvolt = <925000>;
112                                 regulator-max-microvolt = <1400000>;
113                                 regulator-always-on;
114                                 regulator-boot-on;
115                         };
116                 };
117         };
118
119         codec_hdmi_i2s: codec-hdmi-i2s {
120                 compatible = "hdmi-i2s";
121         };
122
123         codec_hdmi_spdif: codec-hdmi-spdif {
124                 compatible = "hdmi-spdif";
125         };
126
127         rockchip-hdmi-i2s {
128                 compatible = "rockchip-hdmi-i2s";
129                 dais {
130                         dai0 {
131                                 audio-codec = <&codec_hdmi_i2s>;
132                                 audio-controller = <&i2s0>;
133                                 format = "i2s";
134                                 //continuous-clock;
135                                 //bitclock-inversion;
136                                 //frame-inversion;
137                                 //bitclock-master;
138                                 //frame-master;
139                         };
140                 };
141         };
142
143         rockchip-hdmi-spdif {
144                 compatible = "rockchip-hdmi-spdif";
145                 dais {
146                         dai0 {
147                                 audio-codec = <&codec_hdmi_spdif>;
148                                 audio-controller = <&spdif>;
149                         };
150                 };
151         };
152
153         rockchip-rt5631 {
154                 compatible = "rockchip-rt5631";
155                 dais {
156                         dai0 {
157                                 audio-codec = <&rt5631>;
158                                 audio-controller = <&i2s0>;
159                                 format = "i2s";
160                                 //continuous-clock;
161                                 //bitclock-inversion;
162                                 //frame-inversion;
163                                 //bitclock-master;
164                                 //frame-master;
165                         };
166                 };
167         };
168
169         rockchip-rt3224 {
170                 compatible = "rockchip-rt3261";
171                 dais {
172                         dai0 {
173                                 audio-codec = <&rt3261>;
174                                 audio-controller = <&i2s0>;
175                                 format = "i2s";
176                                 //continuous-clock;
177                                 //bitclock-inversion;
178                                 //frame-inversion;
179                                 //bitclock-master;
180                                 //frame-master;
181                         };
182                         dai1 {
183                                 audio-codec = <&rt3261>;
184                                 audio-controller = <&i2s0>;
185                                 format = "dsp_a";
186                                 //continuous-clock;
187                                 bitclock-inversion;
188                                 //frame-inversion;
189                                 //bitclock-master;
190                                 //frame-master;
191                         };
192                 };
193         };
194
195         io-domains {
196                 compatible = "rockchip,rk3368-io-voltage-domain";
197                 rockchip,grf = <&grf>;
198                 rockchip,pmugrf = <&pmugrf>;
199
200                 /*GRF_IO_VSEL*/
201                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
202                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
203                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
204                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
205                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
206                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
207                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
208
209                 /*PMU_GRF_IO_VSEL*/
210                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
211                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
212         };
213         test-power{
214                 status = "okay";
215         };
216 };
217
218
219 &gmac_clkin {
220         clock-frequency = <125000000>;
221 };
222
223 &gmac {
224 //      pmu_regulator = "act_ldo5";
225 //      power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
226         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
227 //      phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
228         phy-mode = "rgmii";
229         pinctrl-names = "default";
230         pinctrl-0 = <&rgmii_pins>;
231         clock_in_out = "input";
232         tx_delay = <0x30>;
233         rx_delay = <0x10>;
234         status = "disabled"; //if want to use gmac, please set "okay"
235 };
236
237 &pinctrl {
238         //used for init some gpio
239         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
240
241         gpio0_gpio {
242                         gpio0_c7: gpio0-c7 {
243                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
244                         };
245                         gpio0_a3: gpio0-a3 {
246                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
247                         };
248                         gpio0_c2: gpio0-c2 {
249                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
250                         };
251                         gpio0_c1: gpio0-c1 {
252                                 rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>;
253                         };
254                         //to add
255                 };
256
257 };
258
259 &nandc0 {
260 /*set "okay" both nand and emmc*/
261 /*if using nand,emmc need disabled*/
262         status = "okay";
263 };
264
265 &nandc0reg {
266         status = "disabled"; /* unused now,set "disabled"*/
267 };
268
269 &emmc {
270         clock-frequency = <100000000>;
271         clock-freq-min-max = <400000 100000000>;
272
273     supports-highspeed;
274         supports-emmc;
275     bootpart-no-access;
276
277         //supports-sd;
278         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
279         //caps2-mmc-hs200;
280
281     ignore-pm-notify;
282         keep-power-in-suspend;
283
284         //poll-hw-reset
285         status = "okay";
286 };
287
288 &sdmmc {
289                 clock-frequency = <37500000>;
290                 clock-freq-min-max = <400000 37500000>;
291                 supports-highspeed;
292                 supports-sd;
293                 broken-cd;
294                 card-detect-delay = <200>;
295
296                 ignore-pm-notify;
297                 keep-power-in-suspend;
298
299         vmmc-supply = <&ldo1_reg>;
300                 status = "okay";
301 };
302
303 &sdio {
304                 clock-frequency = <50000000>;
305                 clock-freq-min-max = <200000 50000000>;
306                 supports-highspeed;
307                 supports-sdio;
308                 ignore-pm-notify;
309                 keep-power-in-suspend;
310                 //cap-sdio-irq;
311                 status = "okay";
312 };
313
314 &spi0 {
315         status = "disabled";
316         max-freq = <48000000>;
317         /*
318         spi_test@00 {
319                 compatible = "rockchip,spi_test_bus0_cs0";
320                 reg = <0>;
321                 spi-max-frequency = <24000000>;
322                 //spi-cpha;
323                 //spi-cpol;
324                 poll_mode = <0>;
325                 type = <0>;
326                 enable_dma = <0>;
327
328         };
329
330         spi_test@01 {
331                 compatible = "rockchip,spi_test_bus0_cs1";
332                 reg = <1>;
333                 spi-max-frequency = <24000000>;
334                 spi-cpha;
335                 spi-cpol;
336                 poll_mode = <0>;
337                 type = <0>;
338                 enable_dma = <0>;
339         };
340         */
341 };
342
343 &spi1 {
344         status = "disabled";
345         max-freq = <48000000>;
346         /*
347         spi_test@10 {
348                 compatible = "rockchip,spi_test_bus1_cs0";
349                 reg = <0>;
350                 spi-max-frequency = <24000000>;
351                 //spi-cpha;
352                 //spi-cpol;
353                 poll_mode = <0>;
354                 type = <0>;
355                 enable_dma = <0>;
356         };
357         spi_test@11 {
358                 compatible = "rockchip,spi_test_bus1_cs1";
359                 reg = <1>;
360                 spi-max-frequency = <24000000>;
361                 //spi-cpha;
362                 //spi-cpol;
363                 poll_mode = <0>;
364                 type = <0>;
365                 enable_dma = <1>;
366         };
367         */
368 };
369
370 &spi2 {
371         status = "disabled";
372         max-freq = <48000000>;
373         /*
374         spi_test@20 {
375                 compatible = "rockchip,spi_test_bus2_cs0";
376                 reg = <0>;
377                 spi-max-frequency = <24000000>;
378                 //spi-cpha;
379                 //spi-cpol;
380                 poll_mode = <0>;
381                 type = <0>;
382                 enable_dma = <0>;
383         };
384         */
385 };
386
387 &uart_bt {
388         status = "okay";
389         dma-names = "!tx", "!rx";
390         pinctrl-0 = <&uart0_xfer &uart0_cts>;
391 };
392
393 &tsadc {
394        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
395        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
396        status = "okay";
397 };
398
399 &i2c0 {
400         status = "okay";
401         syr827: syr827@40 {
402                 compatible = "silergy,syr82x";
403                 reg = <0x40>;
404                 status = "okay";
405                 regulators {
406                         #address-cells = <1>;
407                         #size-cells = <0>;
408                         syr827_dc1: regulator@0 {
409                         reg = <0>;
410                         regulator-compatible = "syr82x_dcdc1";
411                         regulator-name = "vdd_arm";
412                         regulator-min-microvolt = <712500>;
413                         regulator-max-microvolt = <1500000>;
414                         regulator-always-on;
415                         regulator-boot-on;
416                         regulator-initial-mode = <0x2>;
417                         regulator-initial-state = <3>;
418                         regulator-state-mem {
419                                 regulator-state-mode = <0x2>;
420                                 regulator-state-disabled;
421                                 regulator-state-uv = <900000>;
422                         };
423                 };
424            };
425         };
426         syr828: syr828@41 {
427                 compatible = "silergy,syr82x";
428                 reg = <0x41>;
429                 status = "disabled";
430                 regulators {
431                         #address-cells = <1>;
432                         #size-cells = <0>;
433                         syr828_dc1: regulator@0 {
434                         reg = <0>;
435                         regulator-compatible = "syr82x_dcdc1";
436                         regulator-name = "vdd_gpu";
437                         regulator-min-microvolt = <712500>;
438                         regulator-max-microvolt = <1500000>;
439                         regulator-always-on;
440                         regulator-boot-on;
441                         regulator-initial-mode = <0x2>;
442                         regulator-initial-state = <3>;
443                         regulator-state-mem {
444                                 regulator-state-mode = <0x2>;
445                                 regulator-state-enabled;
446                                 regulator-state-uv = <900000>;
447                         };
448                 };
449            };
450         };
451         act8846: act8846@5a {
452                 reg = <0x5a>;
453                 status = "okay";
454         };
455
456         rk818: rk818@1c {
457                 reg = <0x1c>;
458                 status = "okay";
459         };
460
461         CW2015@62 {
462                 compatible = "cw201x";
463                 reg = <0x62>;
464                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
465                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
466                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
467                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
468                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
469                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
470                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
471                 is_dc_charge = <1>;
472                 is_usb_charge = <0>;
473         };
474
475         rtc@51 {
476                 compatible = "rtc,hym8563";
477                 reg = <0x51>;
478                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
479         };
480
481 };
482
483 &i2c1 {
484         status = "okay";
485
486         mpu6050:mpu@68{
487                 compatible = "mpu6050";
488                 reg = <0x68>;
489                 mpu-int_config = <0x10>;
490                 mpu-level_shifter = <0>;
491                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
492                 orientation-x= <0>;
493                 orientation-y= <1>;
494                 orientation-z= <1>;
495                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
496                 mpu-debug = <0>;
497         };
498
499
500         ak8963:compass@0d{
501                 compatible = "mpu_ak8963";
502                 reg = <0x0d>;
503                 compass-bus = <0>;
504                 compass-adapt_num = <0>;
505                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
506                 orientation-x= <0>;
507                 orientation-y= <0>;
508                 orientation-z= <1>;
509                 compass-debug = <1>;
510                 status = "okay";
511         };
512
513         rt3261: rt3261@1c {
514                 compatible = "rt3261";
515                 reg = <0x1c>;
516                 spk-num= <2>;
517                 modem-input-mode = <1>;
518                 lout-to-modem_mode = <1>;
519                 spk-amplify = <2>;
520         };
521 };
522
523 &i2c2 {
524         status = "okay";
525
526         rt5631: rt5631@1a {
527                 compatible = "rt5631";
528                 reg = <0x1a>;
529         };
530
531         ts@01 {
532                 compatible = "ct,vtl_ts";
533                 reg = <0x01>;
534                 screen_max_x = <1536>;
535                 screen_max_y = <2048>;
536                 xy_swap = <1>;
537                 x_reverse = <0>;
538                 y_reverse = <0>;
539                 x_mul = <2>;
540                 y_mul = <2>;
541                 bin_ver = <0>;
542                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
543                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
544         };
545 };
546
547 &i2c3 {
548         status = "okay";
549 };
550
551 &i2c4 {
552         status = "okay";
553
554
555 };
556
557 &i2c5 {
558         status = "disable";
559 };
560
561 &fb {
562         rockchip,disp-mode = <NO_DUAL>;
563         rockchip,uboot-logo-on = <0>;
564 };
565
566 &rk_screen {
567          display-timings = <&disp_timings>;
568 };
569
570 /*&lvds {
571         status = "okay";
572         pinctrl-names = "lcdc", "sleep";
573         pinctrl-0 = <&lcdc_lcdc>;
574         pinctrl-1 = <&lcdc_gpio>;
575 };*/
576
577 &lcdc {
578         status = "okay";
579         backlight = <&backlight>;
580         rockchip,mirror = <NO_MIRROR>;
581         rockchip,cabc_mode = <0>;
582         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
583         power_ctr: power_ctr {
584                 rockchip,debug = <0>;
585                 lcd_en:lcd_en {
586                         rockchip,power_type = <GPIO>;
587                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
588                         rockchip,delay = <10>;
589                 };
590
591                 lcd_cs:lcd_cs {
592                         rockchip,power_type = <GPIO>;
593                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
594                         rockchip,delay = <10>;
595                 };
596
597                 /*lcd_rst:lcd_rst {
598                         rockchip,power_type = <GPIO>;
599                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
600                         rockchip,delay = <5>;
601                 };*/
602         };
603 };
604
605
606 &hdmi {
607         status = "okay";
608 };
609
610 &adc {
611         status = "okay";
612
613         rockchip_headset {
614                 compatible = "rockchip_headset";
615                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
616                 pinctrl-names = "default";
617                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
618                 io-channels = <&adc 2>;
619        /*
620                hook_gpio = ;
621                hook_down_type = ; //interrupt hook key down status
622                 */
623        };
624
625         key {
626                 compatible = "rockchip,key";
627                 io-channels = <&adc 1>;
628
629                 vol-up-key {
630                         linux,code = <115>;
631                         label = "volume up";
632                         rockchip,adc_value = <1>;
633                 };
634
635                 vol-down-key {
636                         linux,code = <114>;
637                         label = "volume down";
638                         rockchip,adc_value = <170>;
639                 };
640
641                 power-key {
642                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
643                         linux,code = <116>;
644                         label = "power";
645                         gpio-key,wakeup;
646                 };
647
648                 menu-key {
649                         linux,code = <59>;
650                         label = "menu";
651                         rockchip,adc_value = <355>;
652                 };
653
654                 home-key {
655                         linux,code = <102>;
656                         label = "home";
657                         rockchip,adc_value = <746>;
658                 };
659
660                 back-key {
661                         linux,code = <158>;
662                         label = "back";
663                         rockchip,adc_value = <560>;
664                 };
665
666                 camera-key {
667                         linux,code = <212>;
668                         label = "camera";
669                         rockchip,adc_value = <450>;
670                 };
671         };
672 };
673
674 &pwm0 {
675         status = "okay";
676 };
677
678 &clk_core_b_dvfs_table {
679         operating-points = <
680                 /* KHz    uV */
681                 216000 950000
682                 312000 950000
683                 408000 950000
684                 600000 950000
685                 696000 950000
686                 816000 975000
687                 1008000 1050000
688                 1200000 1150000
689                 1296000 1225000
690                 1416000 1300000
691                 1512000 1350000
692                 >;
693         status = "okay";
694 };
695
696 &clk_core_l_dvfs_table {
697         operating-points = <
698                 /* KHz    uV */
699                 216000 950000
700                 312000 950000
701                 408000 950000
702                 600000 950000
703                 696000 975000
704                 816000 1025000
705                 1008000 1125000
706                 1200000 1225000
707                 >;
708         status = "okay";
709 };
710
711 &clk_gpu_dvfs_table {
712         operating-points = <
713                 /* KHz    uV */
714                 200000 950000
715                 288000 1025000
716                 400000 1050000
717                 576000 1200000
718                 >;
719 };
720
721 &clk_ddr_dvfs_table {
722         operating-points = <
723                 /* KHz    uV */
724                 96000  950000
725                 192000 950000
726                 300000 950000
727                 324000 975000
728                 396000 1000000
729                 528000 1050000
730                 600000 1075000
731                 696000 1100000
732                 792000 1125000
733                 >;
734
735         freq-table = <
736                 /*status                freq(KHz)*/
737                 SYS_STATUS_NORMAL       600000
738                 SYS_STATUS_SUSPEND      192000
739                 SYS_STATUS_VIDEO_1080P  324000
740                 SYS_STATUS_VIDEO_4K     600000
741                 SYS_STATUS_PERFORMANCE  600000
742                 SYS_STATUS_DUALVIEW     600000
743                 SYS_STATUS_BOOST        396000
744                 SYS_STATUS_ISP          528000
745                 >;
746         auto-freq-table = <
747                 240000
748                 324000
749                 396000
750                 528000
751                 >;
752         auto-freq=<0>;
753         status="okay";
754 };
755
756 &dwc_control_usb {
757                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
758                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
759
760                 rockchip,remote_wakeup;
761                 rockchip,usb_irq_wakeup;
762         };
763
764 /include/ "../../../arm/boot/dts/act8846.dtsi"
765 &act8846 {
766         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
767         act8846,system-power-controller;
768
769         regulators {
770
771                 dcdc1_reg: regulator@0{
772                         regulator-name= "act_dcdc1";
773                         regulator-min-microvolt = <1200000>;
774                         regulator-max-microvolt = <1200000>;
775                         regulator-always-on;
776                         regulator-boot-on;
777                 };
778
779                 dcdc2_reg: regulator@1 {
780                         regulator-name= "vccio";
781                         regulator-min-microvolt = <3300000>;
782                         regulator-max-microvolt = <3300000>;
783                         regulator-initial-state = <3>;
784                         regulator-state-mem {
785                                 regulator-state-enabled;
786                                 regulator-state-uv = <3300000>;
787                         };
788                 };
789
790                 dcdc3_reg: regulator@2 {
791                         regulator-name= "vdd_logic";
792                         regulator-min-microvolt = <700000>;
793                         regulator-max-microvolt = <1500000>;
794                         regulator-initial-state = <3>;
795                         regulator-state-mem {
796                                 regulator-state-enabled;
797                                 regulator-state-uv = <1000000>;
798                         };
799
800                 };
801
802                 dcdc4_reg: regulator@3 {
803                         regulator-name= "act_dcdc4";
804                         regulator-min-microvolt = <2000000>;
805                         regulator-max-microvolt = <2000000>;
806                                 regulator-initial-state = <3>;
807                         regulator-state-mem {
808                                 regulator-state-enabled;
809                                 regulator-state-uv = <2000000>;
810                         };
811                 };
812
813                 ldo1_reg: regulator@4 {
814                         regulator-name= "vccio_sd";
815                         regulator-min-microvolt = <1800000>;
816                         regulator-max-microvolt = <3300000>;
817
818                 };
819
820                 ldo2_reg: regulator@5 {
821                         regulator-name= "act_ldo2";
822                         regulator-min-microvolt = <1000000>;
823                         regulator-max-microvolt = <1000000>;
824
825                 };
826
827                 ldo3_reg: regulator@6 {
828                         regulator-name= "act_ldo3";
829                         regulator-min-microvolt = <3300000>;
830                         regulator-max-microvolt = <3300000>;
831
832                 };
833
834                 ldo4_reg:regulator@7 {
835                         regulator-name= "act_ldo4";
836                         regulator-min-microvolt = <3300000>;
837                         regulator-max-microvolt = <3300000>;
838
839                 };
840
841                 ldo5_reg: regulator@8 {
842                         regulator-name= "act_ldo5";
843                         regulator-min-microvolt = <3300000>;
844                         regulator-max-microvolt = <3300000>;
845
846                 };
847
848                 ldo6_reg: regulator@9 {
849                         regulator-name= "act_ldo6";
850                         regulator-min-microvolt = <1000000>;
851                         regulator-max-microvolt = <1000000>;
852                         regulator-initial-state = <3>;
853                         regulator-state-mem {
854                                 regulator-state-enabled;
855                         };
856
857                 };
858
859                 ldo7_reg: regulator@10 {
860                         regulator-name= "vcc_18";
861                         regulator-min-microvolt = <1800000>;
862                         regulator-max-microvolt = <1800000>;
863                         regulator-initial-state = <3>;
864                         regulator-state-mem {
865                                 regulator-state-enabled;
866                         };
867
868                 };
869
870                 ldo8_reg: regulator@11 {
871                         regulator-name= "act_ldo8";
872                         regulator-min-microvolt = <1800000>;
873                         regulator-max-microvolt = <1800000>;
874
875                 };
876         };
877 };
878
879 /include/ "../../../arm/boot/dts/rk818.dtsi"
880 &rk818 {
881         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
882         rk818,system-power-controller;
883         pinctrl-names = "default";
884         pinctrl-0 = <&gpio0_c1>;
885 rk818,support_dc_chg = <1>;/*1:dc chg; 0:usb chg*/
886         regulators {
887
888                 rk818_dcdc1_reg: regulator@0{
889                         regulator-name= "vdd_logic";/*vcc arm*/
890                         regulator-min-microvolt = <700000>;/*<725000>;*/
891                         regulator-max-microvolt = <1500000>;
892                         regulator-initial-mode = <0x2>;
893                         regulator-initial-state = <3>;
894                         regulator-state-mem {
895                                 regulator-state-mode = <0x2>;
896                                 regulator-state-enabled;
897                                 regulator-state-uv =<1100000>;
898                         };
899                 };
900
901                 rk818_dcdc2_reg: regulator@1 {
902                         regulator-name= "rk818_dcdc2";/*vcc gpu*/
903                         regulator-min-microvolt = <700000>;
904                         regulator-max-microvolt = <1200000>;
905                         regulator-initial-mode = <0x2>;
906                         regulator-initial-state = <3>;
907                         regulator-state-mem {
908                                 regulator-state-mode = <0x2>;
909                                 regulator-state-enabled;
910                                 regulator-state-uv = <1200000>;
911                         };
912                 };
913
914                 rk818_dcdc3_reg: regulator@2 {
915                         regulator-name= "rk818_dcdc3";
916                         regulator-min-microvolt = <1200000>;
917                         regulator-max-microvolt = <1200000>;
918                         regulator-initial-mode = <0x2>;
919                         regulator-initial-state = <3>;
920                         regulator-state-mem {
921                                 regulator-state-mode = <0x2>;
922                                 regulator-state-enabled;
923                                 regulator-state-uv = <1200000>;
924                         };
925                 };
926
927                 rk818_dcdc4_reg: regulator@3 {
928                         regulator-name= "vccio";
929                         regulator-min-microvolt = <3000000>;
930                         regulator-max-microvolt = <3000000>;
931                         regulator-initial-mode = <0x2>;
932                         regulator-initial-state = <3>;
933                         regulator-state-mem {
934                                 regulator-state-mode = <0x2>;
935                                 regulator-state-enabled;
936                                 regulator-state-uv = <3000000>;
937                         };
938                 };
939
940                 rk818_ldo1_reg: regulator@4 {
941                         regulator-name= "rk818_ldo1";
942                         regulator-min-microvolt = <3300000>;
943                         regulator-max-microvolt = <3300000>;
944                         regulator-initial-state = <3>;
945                         regulator-state-mem {
946                                 regulator-state-enabled;
947                                 regulator-state-uv = <3300000>;
948                         };
949                 };
950
951                 rk818_ldo2_reg: regulator@5 {
952                         regulator-name= "rk818_ldo2";
953                         regulator-min-microvolt = <3000000>;
954                         regulator-max-microvolt = <3000000>;
955                         regulator-initial-state = <3>;
956                         regulator-state-mem {
957                                 regulator-state-enabled;
958                                 regulator-state-uv = <3000000>;
959                         };
960                 };
961
962                 rk818_ldo3_reg: regulator@6 {
963                         regulator-name= "rk818_ldo3";
964                         regulator-min-microvolt = <1000000>;
965                         regulator-max-microvolt = <1000000>;
966                         regulator-initial-state = <3>;
967                         regulator-state-mem {
968                                 regulator-state-enabled;
969                                 regulator-state-uv = <1000000>;
970                         };
971                 };
972
973                 rk818_ldo4_reg:regulator@7 {
974                         regulator-name= "rk818_ldo4";
975                         regulator-min-microvolt = <1800000>;
976                         regulator-max-microvolt = <1800000>;
977                         regulator-initial-state = <3>;
978                         regulator-state-mem {
979                                 regulator-state-disabled;
980                                 regulator-state-uv = <1800000>;
981                         };
982                 };
983
984                 rk818_ldo5_reg: regulator@8 {
985                         regulator-name= "rk818_ldo5";
986                         regulator-min-microvolt = <1800000>;
987                         regulator-max-microvolt = <1800000>;
988                         regulator-initial-state = <3>;
989                         regulator-state-mem {
990                                 regulator-state-enabled;
991                                 regulator-state-uv = <1800000>;
992                         };
993                 };
994
995                 rk818_ldo6_reg: regulator@9 {
996                         regulator-name= "rk818_ldo6";
997                         regulator-min-microvolt = <1000000>;
998                         regulator-max-microvolt = <1000000>;
999                         regulator-initial-state = <3>;
1000                         regulator-state-mem {
1001                                 regulator-state-disabled;
1002                                 regulator-state-uv = <1000000>;
1003                         };
1004                 };
1005
1006                 rk818_ldo7_reg: regulator@10 {
1007                         regulator-name= "rk818_ldo7";
1008                         regulator-min-microvolt = <1800000>;
1009                         regulator-max-microvolt = <1800000>;
1010                         regulator-initial-state = <3>;
1011                         regulator-state-mem {
1012                                 regulator-state-enabled;
1013                                 regulator-state-uv = <1800000>;
1014                         };
1015                 };
1016
1017                 rk818_ldo8_reg: regulator@11 {
1018                         regulator-name= "rk818_ldo8";
1019                         regulator-min-microvolt = <1800000>;
1020                         regulator-max-microvolt = <1800000>;
1021                         regulator-initial-state = <3>;
1022                         regulator-state-mem {
1023                                 regulator-state-enabled;
1024                                 regulator-state-uv = <1800000>;
1025                         };
1026                 };
1027
1028                 rk818_ldo9_reg: regulator@12 {
1029                         regulator-name= "vccio_sd";
1030                         regulator-min-microvolt = <1800000>;
1031                         regulator-max-microvolt = <3300000>;
1032                         regulator-initial-state = <3>;
1033                         regulator-state-mem {
1034                                 regulator-state-enabled;
1035                                 regulator-state-uv = <3300000>;
1036                         };
1037                 };
1038
1039                 rk818_ldo10_reg: regulator@13 {
1040                         regulator-name= "rk818_ldo10";
1041                         regulator-state-mem {
1042                                 regulator-state-disabled;
1043                         };
1044                 };
1045         };
1046
1047        battery {
1048                 ocv_table = <3350 3677 3693 3719 3752
1049                              3770 3775 3778 3785 3796
1050                              3812 3839 3881 3907 3933
1051                              3958 3978 4033 4087 4123
1052                              4174 >;
1053                 design_capacity = <8650>;
1054                 design_qmax = <8800>;
1055                 max_overcharge = <100>;
1056                 max_input_currentmA  = <3000>;
1057                 max_chrg_currentmA = <1800>;
1058                 max_charge_voltagemV = <4200>;
1059                 sleep_enter_current = <600>;
1060                 sleep_exit_current = <600>;
1061                 power_off_thresd = <3400>;
1062                 chrg_diff_voltagemV = <0>;
1063                 virtual_power = <1>;
1064                 support_usb_adp = <0>;
1065                 support_dc_adp = <1>;
1066                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
1067         };
1068 };
1069
1070
1071 &ion_cma {
1072        reg = <0x00000000 0x00000000>; /* 0MB */
1073 };
1074
1075 &rk3368_cif_sensor{
1076         status = "okay";
1077 };
1078
1079 &rockchip_suspend {
1080                 rockchip,ctrbits = <
1081                         (0
1082                         | RKPM_SLP_ARMOFF
1083                         | RKPM_SLP_PMU_PLLS_PWRDN
1084                         | RKPM_SLP_PMU_PMUALIVE_32K
1085                         | RKPM_SLP_SFT_PLLS_DEEP
1086                         | RKPM_SLP_PMU_DIS_OSC
1087                         | RKPM_SLP_SFT_PD_NBSCUS
1088                         )
1089                         >;
1090         };
1091
1092 /*
1093 &dwc_control_usb {
1094         usb_uart {
1095                 status = "disabled";
1096         };
1097 };
1098 */