a7ac24c2a2386d15d82899815334606a8cbfcc24
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_8846.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
8 #include "../../../arm/boot/dts/lcd-F402.dtsi"
9
10 / {
11         chosen {
12                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
13         };
14
15         wireless-wlan {
16                 compatible = "wlan-platdata";
17
18                 /* wifi_chip_type - wifi chip define
19                  * bcmwifi ==> like ap6xxx, rk90x;
20                  * rtkwifi ==> like rtl8188xx, rtl8723xx;
21                  * esp8089 ==> esp8089;
22                  * other   ==> for other wifi;
23                  */
24                 wifi_chip_type = "bcmwifi";
25
26                 sdio_vref = <1800>; //1800mv or 3300mv
27
28                 //keep_wifi_power_on;
29
30                 //power_ctrl_by_pmu;
31                 power_pmu_regulator = "act_ldo3";
32                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
33
34                 //vref_ctrl_enable;
35                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
36                 vref_pmu_regulator = "act_ldo3";
37                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
38
39                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
40                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
41                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
42
43                 status = "disabled";
44         };
45
46         wireless-bluetooth {
47                 compatible = "bluetooth-platdata";
48
49                 //wifi-bt-power-toggle;
50
51                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
52                 pinctrl-names = "default","rts_gpio";
53                 pinctrl-0 = <&uart0_rts>;
54                 pinctrl-1 = <&uart0_rts_gpio>;
55
56                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
57                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
58                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
59                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
60
61                 status = "okay";
62         };
63
64         hallsensor {
65                compatible = "hall_och165t";
66                type = <SENSOR_TYPE_HALL>;
67                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
68         };
69
70         backlight {
71                 compatible = "pwm-backlight";
72                 pwms = <&pwm0 0 25000>;
73                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
74                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
75                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
76                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
77                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
78                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
79                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
80                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
81                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
82                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
83                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
84                      9 8 7 6 5 4 3 2 1 0>;
85                 default-brightness-level = <200>;
86                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
87         };
88
89         pwm_regulator {
90                 compatible = "rockchip_pwm_regulator";
91                 pwms = <&pwm1 0 2000>;
92                 rockchip,pwm_id= <1>;
93                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
94                 rockchip,pwm_voltage= <1000000>;
95                 rockchip,pwm_min_voltage= <925000>;
96                 rockchip,pwm_max_voltage= <1400000>;
97                 rockchip,pwm_suspend_voltage= <950000>;
98                 rockchip,pwm_coefficient= <475>;
99                 regulators {
100                         #address-cells = <1>;
101                         #size-cells = <0>;
102                         pwm_reg0: regulator@0 {
103                                 regulator-compatible = "pwm_dcdc1";
104                                 regulator-name= "vdd_logic";
105                                 regulator-min-microvolt = <925000>;
106                                 regulator-max-microvolt = <1400000>;
107                                 regulator-always-on;
108                                 regulator-boot-on;
109                         };
110                 };
111         };
112
113         codec_hdmi_i2s: codec-hdmi-i2s {
114                 compatible = "hdmi-i2s";
115         };
116
117         codec_hdmi_spdif: codec-hdmi-spdif {
118                 compatible = "hdmi-spdif";
119         };
120
121         rockchip-hdmi-i2s {
122                 compatible = "rockchip-hdmi-i2s";
123                 dais {
124                         dai0 {
125                                 audio-codec = <&codec_hdmi_i2s>;
126                                 i2s-controller = <&i2s0>;
127                                 format = "i2s";
128                                 //continuous-clock;
129                                 //bitclock-inversion;
130                                 //frame-inversion;
131                                 //bitclock-master;
132                                 //frame-master;
133                         };
134                 };
135         };
136
137         rockchip-hdmi-spdif {
138                 compatible = "rockchip-hdmi-spdif";
139                 dais {
140                         dai0 {
141                                 audio-codec = <&codec_hdmi_spdif>;
142                                 i2s-controller = <&spdif>;
143                         };
144                 };
145         };
146
147         rockchip-rt5631 {
148                 compatible = "rockchip-rt5631";
149                 dais {
150                         dai0 {
151                                 audio-codec = <&rt5631>;
152                                 i2s-controller = <&i2s0>;
153                                 format = "i2s";
154                                 //continuous-clock;
155                                 //bitclock-inversion;
156                                 //frame-inversion;
157                                 //bitclock-master;
158                                 //frame-master;
159                         };
160                 };
161         };
162
163         rockchip-rt3224 {
164                 compatible = "rockchip-rt3261";
165                 dais {
166                         dai0 {
167                                 audio-codec = <&rt3261>;
168                                 i2s-controller = <&i2s0>;
169                                 format = "i2s";
170                                 //continuous-clock;
171                                 //bitclock-inversion;
172                                 //frame-inversion;
173                                 //bitclock-master;
174                                 //frame-master;
175                         };
176                         dai1 {
177                                 audio-codec = <&rt3261>;
178                                 i2s-controller = <&i2s0>;
179                                 format = "dsp_a";
180                                 //continuous-clock;
181                                 bitclock-inversion;
182                                 //frame-inversion;
183                                 //bitclock-master;
184                                 //frame-master;
185                         };
186                 };
187         };
188
189         usb_control {
190                 compatible = "rockchip,rk3288-usb-control";
191
192                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
193                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
194
195                 rockchip,remote_wakeup;
196                 rockchip,usb_irq_wakeup;
197         };
198
199         io-domains {
200                 compatible = "rockchip,rk3368-io-voltage-domain";
201                 rockchip,grf = <&grf>;
202                 rockchip,pmu = <&pmu_grf>;
203
204                 grf {
205                         dvp-supply = "vccio";
206                         flash0-supply = "vccio";
207                         wifi-supply = "act_ldo6";
208                         audio-supply = "vccio";
209                         sdcard-supply = "vccio_sd";
210                         gpio30-supply = "vccio";
211                         gpio1830-supply = "vccio";
212                 };
213
214                 pmu_grf {
215                         pmu-supply = "act_ldo4";
216                         vop-supply = "act_ldo4";
217                 };
218         };
219 };
220
221 &gmac {
222 //      power_ctl_by = "gpio";  //"gpio" "pmu"
223         power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
224 //      power-pmu = "act_ldo"
225 //      reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
226     phy-mode = "rgmii";
227     clock_in_out = "input";
228     tx_delay = <0x28>;
229     rx_delay = <0x10>;
230         status = "disabled"; //if want to use gmac, please set "okay"
231 };
232
233 &pinctrl {
234         //used for init some gpio
235         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
236
237         gpio0_gpio {
238                         gpio0_c7: gpio0-c7 {
239                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
240                         };
241                         gpio0_a3: gpio0-a3 {
242                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
243                         };
244                         gpio0_c2: gpio0-c2 {
245                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
246                         };
247
248                         //to add
249                 };
250
251 };
252
253 &nandc0 {
254         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
255 };
256
257 &nandc0reg {
258         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
259 };
260
261 &emmc {
262         clock-frequency = <100000000>;
263         clock-freq-min-max = <400000 100000000>;
264
265     supports-highspeed;
266         supports-emmc;
267     bootpart-no-access;
268
269         //supports-tSD;
270         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
271         //caps2-mmc-hs200;
272
273     ignore-pm-notify;
274         keep-power-in-suspend;
275
276         //poll-hw-reset
277         status = "okay";
278 };
279
280 &sdmmc {
281                 clock-frequency = <50000000>;
282                 clock-freq-min-max = <400000 50000000>;
283                 supports-highspeed;
284                 supports-sd;
285                 broken-cd;
286                 card-detect-delay = <200>;
287
288                 ignore-pm-notify;
289                 keep-power-in-suspend;
290
291         vmmc-supply = <&ldo1_reg>;
292                 status = "okay";
293 };
294
295 &sdio {
296                 clock-frequency = <50000000>;
297                 clock-freq-min-max = <200000 50000000>;
298                 supports-highspeed;
299                 supports-sdio;
300                 ignore-pm-notify;
301                 keep-power-in-suspend;
302                 //cap-sdio-irq;
303                 status = "okay";
304 };
305
306 &spi0 {
307         status = "disabled";
308         max-freq = <48000000>;
309         /*
310         spi_test@00 {
311                 compatible = "rockchip,spi_test_bus0_cs0";
312                 reg = <0>;
313                 spi-max-frequency = <24000000>;
314                 //spi-cpha;
315                 //spi-cpol;
316                 poll_mode = <0>;
317                 type = <0>;
318                 enable_dma = <0>;
319
320         };
321
322         spi_test@01 {
323                 compatible = "rockchip,spi_test_bus0_cs1";
324                 reg = <1>;
325                 spi-max-frequency = <24000000>;
326                 spi-cpha;
327                 spi-cpol;
328                 poll_mode = <0>;
329                 type = <0>;
330                 enable_dma = <0>;
331         };
332         */
333 };
334
335 &spi1 {
336         status = "disabled";
337         max-freq = <48000000>;
338         /*
339         spi_test@10 {
340                 compatible = "rockchip,spi_test_bus1_cs0";
341                 reg = <0>;
342                 spi-max-frequency = <24000000>;
343                 //spi-cpha;
344                 //spi-cpol;
345                 poll_mode = <0>;
346                 type = <0>;
347                 enable_dma = <0>;
348         };
349
350         */
351 };
352
353 &spi2 {
354         status = "disabled";
355         max-freq = <48000000>;
356         /*
357         spi_test@20 {
358                 compatible = "rockchip,spi_test_bus2_cs0";
359                 reg = <0>;
360                 spi-max-frequency = <24000000>;
361                 //spi-cpha;
362                 //spi-cpol;
363                 poll_mode = <0>;
364                 type = <0>;
365                 enable_dma = <0>;
366         };
367
368         spi_test@21 {
369                 compatible = "rockchip,spi_test_bus2_cs1";
370                 reg = <1>;
371                 spi-max-frequency = <24000000>;
372                 //spi-cpha;
373                 //spi-cpol;
374                 poll_mode = <0>;
375                 type = <0>;
376                 enable_dma = <0>;
377         };
378         */
379 };
380
381 &uart_dbg {
382         status = "okay";
383 };
384
385 &uart_bt {
386         status = "okay";
387         dma-names = "!tx", "!rx";
388         pinctrl-0 = <&uart0_xfer &uart0_cts>;
389 };
390
391 &i2c0 {
392         status = "okay";
393         syr827: syr827@40 {
394                 compatible = "silergy,syr82x";
395                 reg = <0x40>;
396                 status = "okay";
397                 regulators {
398                         #address-cells = <1>;
399                         #size-cells = <0>;
400                         syr827_dc1: regulator@0 {
401                         reg = <0>;
402                         regulator-compatible = "syr82x_dcdc1";
403                         regulator-name = "vdd_arm";
404                         regulator-min-microvolt = <712500>;
405                         regulator-max-microvolt = <1500000>;
406                         regulator-always-on;
407                         regulator-boot-on;
408                         regulator-initial-mode = <0x2>;
409                         regulator-initial-state = <3>;
410                         regulator-state-mem {
411                                 regulator-state-mode = <0x2>;
412                                 regulator-state-disabled;
413                                 regulator-state-uv = <900000>;
414                         };
415                 };
416            };
417         };
418         syr828: syr828@41 {
419                 compatible = "silergy,syr82x";
420                 reg = <0x41>;
421                 status = "okay";
422                 regulators {
423                         #address-cells = <1>;
424                         #size-cells = <0>;
425                         syr828_dc1: regulator@0 {
426                         reg = <0>;
427                         regulator-compatible = "syr82x_dcdc1";
428                         regulator-name = "vdd_gpu";
429                         regulator-min-microvolt = <712500>;
430                         regulator-max-microvolt = <1500000>;
431                         regulator-always-on;
432                         regulator-boot-on;
433                         regulator-initial-mode = <0x2>;
434                         regulator-initial-state = <3>;
435                         regulator-state-mem {
436                                 regulator-state-mode = <0x2>;
437                                 regulator-state-enabled;
438                                 regulator-state-uv = <900000>;
439                         };
440                 };
441            };
442         };
443         act8846: act8846@5a {
444                 reg = <0x5a>;
445                 status = "okay";
446         };
447
448         CW2015@62 {
449                 compatible = "cw201x";
450                 reg = <0x62>;
451                 //dc_det_gpio = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>;
452                 //bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
453                 chg_ok_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_HIGH>;
454                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
455                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
456                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
457                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
458                 is_dc_charge = <1>;
459                 is_usb_charge = <0>;
460         };
461
462         rtc@51 {
463                 compatible = "rtc,hym8563";
464                 reg = <0x51>;
465                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
466         };
467
468 };
469
470 &i2c1 {
471         status = "okay";
472
473         mpu6050:mpu@68{
474                 compatible = "mpu6050";
475                 reg = <0x68>;
476                 mpu-int_config = <0x10>;
477                 mpu-level_shifter = <0>;
478                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
479                 orientation-x= <0>;
480                 orientation-y= <1>;
481                 orientation-z= <1>;
482                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
483                 mpu-debug = <0>;
484         };
485
486
487         ak8963:compass@0d{
488                 compatible = "mpu_ak8963";
489                 reg = <0x0d>;
490                 compass-bus = <0>;
491                 compass-adapt_num = <0>;
492                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
493                 orientation-x= <0>;
494                 orientation-y= <0>;
495                 orientation-z= <1>;
496                 compass-debug = <1>;
497                 status = "okay";
498         };
499
500 };
501
502 &i2c2 {
503         status = "okay";
504
505         rt5631: rt5631@1a {
506                 compatible = "rt5631";
507                 reg = <0x1a>;
508         };
509
510         ts@01 {
511                 compatible = "ct,vtl_ts";
512                 reg = <0x01>;
513                 screen_max_x = <1536>;
514                 screen_max_y = <2048>;
515                 xy_swap = <1>;
516                 x_reverse = <0>;
517                 y_reverse = <0>;
518                 x_mul = <2>;
519                 y_mul = <2>;
520                 bin_ver = <0>;
521                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
522                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
523         };
524
525         rt3261: rt3261@1c {
526                 compatible = "rt3261";
527                 reg = <0x1c>;
528         //      codec-en-gpio = <0>;//sdk default high level
529                 spk-num= <2>;
530                 modem-input-mode = <1>;
531                 lout-to-modem_mode = <1>;
532                 spk-amplify = <2>;
533                 playback-if1-data_control = <0>;
534                 playback-if2-data_control = <0>;
535         };
536 };
537
538 &i2c3 {
539         status = "okay";
540 };
541
542 &i2c4 {
543         status = "okay";
544
545
546 };
547
548 &i2c5 {
549         status = "disable";
550 };
551
552 &fb {
553         rockchip,disp-mode = <NO_DUAL>;
554         rockchip,uboot-logo-on = <0>;
555 };
556
557 &rk_screen {
558          display-timings = <&disp_timings>;
559 };
560
561 /*&lvds {
562         status = "okay";
563         pinctrl-names = "lcdc", "sleep";
564         pinctrl-0 = <&lcdc_lcdc>;
565         pinctrl-1 = <&lcdc_gpio>;
566 };*/
567
568 &lcdc {
569         status = "okay";
570         rockchip,mirror = <NO_MIRROR>;
571         rockchip,cabc_mode = <0>;
572         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
573         power_ctr: power_ctr {
574                 rockchip,debug = <0>;
575                 lcd_en:lcd_en {
576                         rockchip,power_type = <GPIO>;
577                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
578                         rockchip,delay = <10>;
579                 };
580
581                 lcd_cs:lcd_cs {
582                         rockchip,power_type = <GPIO>;
583                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
584                         rockchip,delay = <10>;
585                 };
586
587                 /*lcd_rst:lcd_rst {
588                         rockchip,power_type = <GPIO>;
589                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
590                         rockchip,delay = <5>;
591                 };*/
592         };
593 };
594
595
596 &hdmi {
597         status = "okay";
598         rockchips,hdmi_audio_source = <0>;
599 };
600
601 &adc {
602         status = "okay";
603
604         rockchip_headset {
605                 compatible = "rockchip_headset";
606                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
607                 pinctrl-names = "default";
608                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
609                 io-channels = <&adc 2>;
610        /*
611                hook_gpio = ;
612                hook_down_type = ; //interrupt hook key down status
613                 */
614        };
615
616         key {
617                 compatible = "rockchip,key";
618                 io-channels = <&adc 1>;
619
620                 vol-up-key {
621                         linux,code = <115>;
622                         label = "volume up";
623                         rockchip,adc_value = <1>;
624                 };
625
626                 vol-down-key {
627                         linux,code = <114>;
628                         label = "volume down";
629                         rockchip,adc_value = <170>;
630                 };
631
632                 power-key {
633                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
634                         linux,code = <116>;
635                         label = "power";
636                         gpio-key,wakeup;
637                 };
638
639                 menu-key {
640                         linux,code = <59>;
641                         label = "menu";
642                         rockchip,adc_value = <355>;
643                 };
644
645                 home-key {
646                         linux,code = <102>;
647                         label = "home";
648                         rockchip,adc_value = <746>;
649                 };
650
651                 back-key {
652                         linux,code = <158>;
653                         label = "back";
654                         rockchip,adc_value = <560>;
655                 };
656
657                 camera-key {
658                         linux,code = <212>;
659                         label = "camera";
660                         rockchip,adc_value = <450>;
661                 };
662         };
663 };
664
665 &pwm0 {
666         status = "okay";
667 };
668
669 &pwm1 {
670         status = "okay";
671 };
672
673
674 &clk_core_dvfs_table {
675         operating-points = <
676                 /* KHz    uV */
677                 126000 900000
678                 216000 900000
679                 312000 900000
680                 408000 900000
681                 600000 900000
682                 696000 950000
683                 816000 1000000
684                 1008000 1050000
685                 1200000 1100000
686                 1416000 1200000
687                 1512000 1300000
688                 1608000 1350000
689         //      1704000 1350000
690         //      1800000 1400000
691                 >;
692         support-pvtm = <1>;
693         pvtm-operating-points = <
694                 /* KHz    uV    margin(uV)*/
695                 126000 900000   25000
696                 216000 900000   25000
697                 312000 900000   25000
698                 408000 900000   25000
699                 600000 900000   25000
700                 696000 950000   25000
701                 816000 1000000  25000
702                 1008000 1050000 25000
703                 1200000 1100000 25000
704                 1416000 1200000 25000
705                 1512000 1300000 25000
706                 1608000 1350000 25000
707                 >;
708         status="okay";
709 };
710
711 &clk_gpu_dvfs_table {
712         operating-points = <
713                 /* KHz    uV */
714                 100000 900000
715                 200000 900000
716                 300000 950000
717                 420000 1050000
718                 500000 1150000
719                 >;
720         status="okay";
721 };
722
723 &clk_ddr_dvfs_table {
724         operating-points = <
725                 /* KHz    uV */
726                 200000 1050000
727                 300000 1050000
728                 400000 1100000
729                 533000 1150000
730                 >;
731
732         freq-table = <
733                 /*status                freq(KHz)*/
734                 SYS_STATUS_NORMAL       400000
735                 SYS_STATUS_SUSPEND      200000
736                 SYS_STATUS_VIDEO_1080P  240000
737                 SYS_STATUS_VIDEO_4K     400000
738                 SYS_STATUS_PERFORMANCE  528000
739                 SYS_STATUS_DUALVIEW     400000
740                 SYS_STATUS_BOOST        324000
741                 SYS_STATUS_ISP          400000
742                 >;
743         auto-freq-table = <
744                 240000
745                 324000
746                 396000
747                 528000
748                 >;
749         auto-freq=<0>;
750         status="disabled";
751 };
752
753 /include/ "../../../arm/boot/dts/act8846.dtsi"
754 &act8846 {
755         gpios =<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
756         act8846,system-power-controller;
757
758         regulators {
759
760                 dcdc1_reg: regulator@0{
761                         regulator-name= "act_dcdc1";
762                         regulator-min-microvolt = <1200000>;
763                         regulator-max-microvolt = <1200000>;
764                         regulator-always-on;
765                         regulator-boot-on;
766                 };
767
768                 dcdc2_reg: regulator@1 {
769                         regulator-name= "vccio";
770                         regulator-min-microvolt = <3300000>;
771                         regulator-max-microvolt = <3300000>;
772                         regulator-initial-state = <3>;
773                         regulator-state-mem {
774                                 regulator-state-enabled;
775                                 regulator-state-uv = <3300000>;
776                         };
777                 };
778
779                 dcdc3_reg: regulator@2 {
780                         regulator-name= "vdd_logic";
781                         regulator-min-microvolt = <700000>;
782                         regulator-max-microvolt = <1500000>;
783                         regulator-initial-state = <3>;
784                         regulator-state-mem {
785                                 regulator-state-enabled;
786                                 regulator-state-uv = <1000000>;
787                         };
788
789                 };
790
791                 dcdc4_reg: regulator@3 {
792                         regulator-name= "act_dcdc4";
793                         regulator-min-microvolt = <2000000>;
794                         regulator-max-microvolt = <2000000>;
795                                 regulator-initial-state = <3>;
796                         regulator-state-mem {
797                                 regulator-state-enabled;
798                                 regulator-state-uv = <2000000>;
799                         };
800                 };
801
802                 ldo1_reg: regulator@4 {
803                         regulator-name= "vccio_sd";
804                         regulator-min-microvolt = <1800000>;
805                         regulator-max-microvolt = <3300000>;
806
807                 };
808
809                 ldo2_reg: regulator@5 {
810                         regulator-name= "act_ldo2";
811                         regulator-min-microvolt = <1000000>;
812                         regulator-max-microvolt = <1000000>;
813
814                 };
815
816                 ldo3_reg: regulator@6 {
817                         regulator-name= "act_ldo3";
818                         regulator-min-microvolt = <3300000>;
819                         regulator-max-microvolt = <3300000>;
820
821                 };
822
823                 ldo4_reg:regulator@7 {
824                         regulator-name= "act_ldo4";
825                         regulator-min-microvolt = <3300000>;
826                         regulator-max-microvolt = <3300000>;
827
828                 };
829
830                 ldo5_reg: regulator@8 {
831                         regulator-name= "act_ldo5";
832                         regulator-min-microvolt = <3300000>;
833                         regulator-max-microvolt = <3300000>;
834
835                 };
836
837                 ldo6_reg: regulator@9 {
838                         regulator-name= "act_ldo6";
839                         regulator-min-microvolt = <1000000>;
840                         regulator-max-microvolt = <1000000>;
841                         regulator-initial-state = <3>;
842                         regulator-state-mem {
843                                 regulator-state-enabled;
844                         };
845
846                 };
847
848                 ldo7_reg: regulator@10 {
849                         regulator-name= "vcc_18";
850                         regulator-min-microvolt = <1800000>;
851                         regulator-max-microvolt = <1800000>;
852                         regulator-initial-state = <3>;
853                         regulator-state-mem {
854                                 regulator-state-enabled;
855                         };
856
857                 };
858
859                 ldo8_reg: regulator@11 {
860                         regulator-name= "act_ldo8";
861                         regulator-min-microvolt = <1800000>;
862                         regulator-max-microvolt = <1800000>;
863
864                 };
865         };
866 };
867
868 &ion_cma {
869        reg = <0x00000000 0x28000000>; /* 640MB */
870 };
871 /*
872 &dwc_control_usb {
873         usb_uart {
874                 status = "disabled";
875         };
876 };
877
878 &rk3288_cif_sensor{
879         status = "okay";
880 };
881 */