Merge branch 'torvalds/master'
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_mipi.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
8 #include "../../../arm/boot/dts/lcd-tv080wum-mipi.dtsi"
9 #include "rk3368-cif-sensor.dtsi"
10 #include <dt-bindings/suspend/rockchip-rk3368.h>
11
12 / {
13         chosen {
14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
15         };
16
17         wireless-wlan {
18                 compatible = "wlan-platdata";
19                 rockchip,grf = <&grf>;
20
21                 /* wifi_chip_type - wifi chip define
22                  * ap6210, ap6330, ap6335
23                  * rtl8188eu, rtl8723bs, rtl8723bu
24                  * esp8089
25                 */
26                 wifi_chip_type = "ap6335";
27
28                 sdio_vref = <1800>; //1800mv or 3300mv
29
30                 //keep_wifi_power_on;
31
32                 //power_ctrl_by_pmu;
33                 power_pmu_regulator = "act_ldo3";
34                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
35
36                 //vref_ctrl_enable;
37                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
38                 vref_pmu_regulator = "act_ldo3";
39                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
40
41                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
42                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
43                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
44
45                 status = "okay";
46         };
47
48         wireless-bluetooth {
49                 compatible = "bluetooth-platdata";
50
51                 //wifi-bt-power-toggle;
52
53                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
54                 pinctrl-names = "default","rts_gpio";
55                 pinctrl-0 = <&uart0_rts>;
56                 pinctrl-1 = <&uart0_rts_gpio>;
57
58                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
59                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
60                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
61                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
62
63                 status = "okay";
64         };
65
66         hallsensor {
67                compatible = "hall_och165t";
68                type = <SENSOR_TYPE_HALL>;
69                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
70         };
71
72         backlight: backlight {
73                 compatible = "pwm-backlight";
74                 pwms = <&pwm0 0 25000>;
75                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
76                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
77                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
78                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
79                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
80                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
81                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
82                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
83                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
84                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
85                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
86                      9 8 7 6 5 4 3 2 1 0>;
87                 default-brightness-level = <200>;
88                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
89         };
90
91         pwm_regulator {
92                 compatible = "rockchip_pwm_regulator";
93                 pwms = <&pwm1 0 2000>;
94                 rockchip,pwm_id= <1>;
95                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
96                 rockchip,pwm_voltage= <1000000>;
97                 rockchip,pwm_min_voltage= <925000>;
98                 rockchip,pwm_max_voltage= <1400000>;
99                 rockchip,pwm_suspend_voltage= <950000>;
100                 rockchip,pwm_coefficient= <475>;
101                 regulators {
102                         #address-cells = <1>;
103                         #size-cells = <0>;
104                         pwm_reg0: regulator@0 {
105                                 regulator-compatible = "pwm_dcdc1";
106                                 regulator-name= "vdd_logic";
107                                 regulator-min-microvolt = <925000>;
108                                 regulator-max-microvolt = <1400000>;
109                                 regulator-always-on;
110                                 regulator-boot-on;
111                         };
112                 };
113         };
114
115         codec_hdmi_i2s: codec-hdmi-i2s {
116                 compatible = "hdmi-i2s";
117         };
118
119         codec_hdmi_spdif: codec-hdmi-spdif {
120                 compatible = "hdmi-spdif";
121         };
122
123         rockchip-hdmi-i2s {
124                 compatible = "rockchip-hdmi-i2s";
125                 dais {
126                         dai0 {
127                                 audio-codec = <&codec_hdmi_i2s>;
128                                 audio-controller = <&i2s0>;
129                                 format = "i2s";
130                                 //continuous-clock;
131                                 //bitclock-inversion;
132                                 //frame-inversion;
133                                 //bitclock-master;
134                                 //frame-master;
135                         };
136                 };
137         };
138
139         rockchip-hdmi-spdif {
140                 compatible = "rockchip-hdmi-spdif";
141                 dais {
142                         dai0 {
143                                 audio-codec = <&codec_hdmi_spdif>;
144                                 audio-controller = <&spdif>;
145                         };
146                 };
147         };
148
149         rockchip-rt5631 {
150                 compatible = "rockchip-rt5631";
151                 dais {
152                         dai0 {
153                                 audio-codec = <&rt5631>;
154                                 audio-controller = <&i2s0>;
155                                 format = "i2s";
156                                 //continuous-clock;
157                                 //bitclock-inversion;
158                                 //frame-inversion;
159                                 //bitclock-master;
160                                 //frame-master;
161                         };
162                 };
163         };
164
165         rockchip-rt3224 {
166                 compatible = "rockchip-rt3261";
167                 dais {
168                         dai0 {
169                                 audio-codec = <&rt3261>;
170                                 audio-controller = <&i2s0>;
171                                 format = "i2s";
172                                 //continuous-clock;
173                                 //bitclock-inversion;
174                                 //frame-inversion;
175                                 //bitclock-master;
176                                 //frame-master;
177                         };
178                         dai1 {
179                                 audio-codec = <&rt3261>;
180                                 audio-controller = <&i2s0>;
181                                 format = "dsp_a";
182                                 //continuous-clock;
183                                 bitclock-inversion;
184                                 //frame-inversion;
185                                 //bitclock-master;
186                                 //frame-master;
187                         };
188                 };
189         };
190
191         io-domains {
192                 compatible = "rockchip,rk3368-io-voltage-domain";
193                 rockchip,grf = <&grf>;
194                 rockchip,pmugrf = <&pmugrf>;
195
196                 /*GRF_IO_VSEL*/
197                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
198                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
199                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
200                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
201                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
202                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
203                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
204
205                 /*PMU_GRF_IO_VSEL*/
206                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
207                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
208         };
209         test-power{
210                 status = "okay";
211         };
212 };
213
214
215 &gmac_clkin {
216         clock-frequency = <125000000>;
217 };
218
219 &gmac {
220 //      pmu_regulator = "act_ldo5";
221 //      power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
222         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
223 //      phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
224         phy-mode = "rgmii";
225         pinctrl-names = "default";
226         pinctrl-0 = <&rgmii_pins>;
227         clock_in_out = "input";
228         tx_delay = <0x30>;
229         rx_delay = <0x10>;
230         status = "disabled"; //if want to use gmac, please set "okay"
231 };
232
233 &pinctrl {
234         //used for init some gpio
235         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
236
237         gpio0_gpio {
238                         gpio0_c7: gpio0-c7 {
239                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
240                         };
241                         gpio0_a3: gpio0-a3 {
242                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
243                         };
244                         gpio0_c2: gpio0-c2 {
245                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
246                         };
247                         gpio0_c1: gpio0-c1 {
248                                 rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>;
249                         };
250                         //to add
251                 };
252
253 };
254
255 &nandc0 {
256 /*set "okay" both nand and emmc*/
257 /*if using nand,emmc need disabled*/
258         status = "okay";
259 };
260
261 &nandc0reg {
262         status = "disabled"; /* unused now,set "disabled"*/
263 };
264
265 &emmc {
266         clock-frequency = <100000000>;
267         clock-freq-min-max = <400000 100000000>;
268
269     supports-highspeed;
270         supports-emmc;
271     bootpart-no-access;
272
273         //supports-sd;
274         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
275         //caps2-mmc-hs200;
276
277     ignore-pm-notify;
278         keep-power-in-suspend;
279
280         //poll-hw-reset
281         status = "okay";
282 };
283
284 &sdmmc {
285                 clock-frequency = <37500000>;
286                 clock-freq-min-max = <400000 37500000>;
287                 supports-highspeed;
288                 supports-sd;
289                 broken-cd;
290                 card-detect-delay = <200>;
291
292                 ignore-pm-notify;
293                 keep-power-in-suspend;
294
295         vmmc-supply = <&ldo1_reg>;
296                 status = "okay";
297 };
298
299 &sdio {
300                 clock-frequency = <50000000>;
301                 clock-freq-min-max = <200000 50000000>;
302                 supports-highspeed;
303                 supports-sdio;
304                 ignore-pm-notify;
305                 keep-power-in-suspend;
306                 //cap-sdio-irq;
307                 status = "okay";
308 };
309
310 &spi0 {
311         status = "disabled";
312         max-freq = <48000000>;
313         /*
314         spi_test@00 {
315                 compatible = "rockchip,spi_test_bus0_cs0";
316                 reg = <0>;
317                 spi-max-frequency = <24000000>;
318                 //spi-cpha;
319                 //spi-cpol;
320                 poll_mode = <0>;
321                 type = <0>;
322                 enable_dma = <0>;
323
324         };
325
326         spi_test@01 {
327                 compatible = "rockchip,spi_test_bus0_cs1";
328                 reg = <1>;
329                 spi-max-frequency = <24000000>;
330                 spi-cpha;
331                 spi-cpol;
332                 poll_mode = <0>;
333                 type = <0>;
334                 enable_dma = <0>;
335         };
336         */
337 };
338
339 &spi1 {
340         status = "disabled";
341         max-freq = <48000000>;
342         /*
343         spi_test@10 {
344                 compatible = "rockchip,spi_test_bus1_cs0";
345                 reg = <0>;
346                 spi-max-frequency = <24000000>;
347                 //spi-cpha;
348                 //spi-cpol;
349                 poll_mode = <0>;
350                 type = <0>;
351                 enable_dma = <0>;
352         };
353         spi_test@11 {
354                 compatible = "rockchip,spi_test_bus1_cs1";
355                 reg = <1>;
356                 spi-max-frequency = <24000000>;
357                 //spi-cpha;
358                 //spi-cpol;
359                 poll_mode = <0>;
360                 type = <0>;
361                 enable_dma = <1>;
362         };
363         */
364 };
365
366 &spi2 {
367         status = "disabled";
368         max-freq = <48000000>;
369         /*
370         spi_test@20 {
371                 compatible = "rockchip,spi_test_bus2_cs0";
372                 reg = <0>;
373                 spi-max-frequency = <24000000>;
374                 //spi-cpha;
375                 //spi-cpol;
376                 poll_mode = <0>;
377                 type = <0>;
378                 enable_dma = <0>;
379         };
380         */
381 };
382
383 &uart_dbg {
384         status = "okay";
385 };
386
387 &uart_bt {
388         status = "okay";
389         dma-names = "!tx", "!rx";
390         pinctrl-0 = <&uart0_xfer &uart0_cts>;
391 };
392
393 &tsadc {
394        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
395        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
396        status = "okay";
397 };
398
399 &i2c0 {
400         status = "okay";
401         syr827: syr827@40 {
402                 compatible = "silergy,syr82x";
403                 reg = <0x40>;
404                 status = "okay";
405                 regulators {
406                         #address-cells = <1>;
407                         #size-cells = <0>;
408                         syr827_dc1: regulator@0 {
409                         reg = <0>;
410                         regulator-compatible = "syr82x_dcdc1";
411                         regulator-name = "vdd_arm";
412                         regulator-min-microvolt = <712500>;
413                         regulator-max-microvolt = <1500000>;
414                         regulator-always-on;
415                         regulator-boot-on;
416                         regulator-initial-mode = <0x2>;
417                         regulator-initial-state = <3>;
418                         regulator-state-mem {
419                                 regulator-state-mode = <0x2>;
420                                 regulator-state-disabled;
421                                 regulator-state-uv = <900000>;
422                         };
423                 };
424            };
425         };
426         syr828: syr828@41 {
427                 compatible = "silergy,syr82x";
428                 reg = <0x41>;
429                 status = "disabled";
430                 regulators {
431                         #address-cells = <1>;
432                         #size-cells = <0>;
433                         syr828_dc1: regulator@0 {
434                         reg = <0>;
435                         regulator-compatible = "syr82x_dcdc1";
436                         regulator-name = "vdd_gpu";
437                         regulator-min-microvolt = <712500>;
438                         regulator-max-microvolt = <1500000>;
439                         regulator-always-on;
440                         regulator-boot-on;
441                         regulator-initial-mode = <0x2>;
442                         regulator-initial-state = <3>;
443                         regulator-state-mem {
444                                 regulator-state-mode = <0x2>;
445                                 regulator-state-enabled;
446                                 regulator-state-uv = <900000>;
447                         };
448                 };
449            };
450         };
451         act8846: act8846@5a {
452                 reg = <0x5a>;
453                 status = "okay";
454         };
455
456         rk818: rk818@1c {
457                 reg = <0x1c>;
458                 status = "okay";
459         };
460
461         CW2015@62 {
462                 compatible = "cw201x";
463                 reg = <0x62>;
464                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
465                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
466                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
467                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
468                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
469                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
470                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
471                 is_dc_charge = <1>;
472                 is_usb_charge = <0>;
473         };
474
475         rtc@51 {
476                 compatible = "rtc,hym8563";
477                 reg = <0x51>;
478                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
479         };
480
481 };
482
483 &i2c1 {
484         status = "okay";
485
486         mpu6050:mpu@68{
487                 compatible = "mpu6050";
488                 reg = <0x68>;
489                 mpu-int_config = <0x10>;
490                 mpu-level_shifter = <0>;
491                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
492                 orientation-x= <0>;
493                 orientation-y= <1>;
494                 orientation-z= <1>;
495                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
496                 mpu-debug = <0>;
497         };
498
499
500         ak8963:compass@0d{
501                 compatible = "mpu_ak8963";
502                 reg = <0x0d>;
503                 compass-bus = <0>;
504                 compass-adapt_num = <0>;
505                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
506                 orientation-x= <0>;
507                 orientation-y= <0>;
508                 orientation-z= <1>;
509                 compass-debug = <1>;
510                 status = "okay";
511         };
512
513         rt3261: rt3261@1c {
514                 compatible = "rt3261";
515                 reg = <0x1c>;
516                 spk-num= <2>;
517                 modem-input-mode = <1>;
518                 lout-to-modem_mode = <1>;
519                 spk-amplify = <2>;
520         };
521 };
522
523 &i2c2 {
524         status = "okay";
525
526         rt5631: rt5631@1a {
527                 compatible = "rt5631";
528                 reg = <0x1a>;
529         };
530
531         touchscreen@14 {
532                 compatible = "goodix,gt9xx";
533                 reg = <0x14>;
534                 touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
535                 reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
536                 max-x = <1200>;
537                 max-y = <1900>;
538                 tp-size = <911>;
539         };
540 };
541
542 &i2c3 {
543         status = "okay";
544 };
545
546 &i2c4 {
547         status = "okay";
548
549
550 };
551
552 &i2c5 {
553         status = "disable";
554 };
555
556 &fb {
557         rockchip,disp-mode = <NO_DUAL>;
558         rockchip,uboot-logo-on = <0>;
559 };
560
561 &rk_screen {
562          display-timings = <&disp_timings>;
563 };
564
565 /*&lvds {
566         status = "okay";
567         pinctrl-names = "lcdc", "sleep";
568         pinctrl-0 = <&lcdc_lcdc>;
569         pinctrl-1 = <&lcdc_gpio>;
570 };*/
571
572 &lcdc {
573         status = "okay";
574         backlight = <&backlight>;
575         rockchip,mirror = <NO_MIRROR>;
576         rockchip,cabc_mode = <0>;
577         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
578         power_ctr: power_ctr {
579                 rockchip,debug = <0>;
580                 lcd_en:lcd_en {
581                         rockchip,power_type = <GPIO>;
582                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
583                         rockchip,delay = <10>;
584                 };
585
586                 lcd_cs:lcd_cs {
587                         rockchip,power_type = <GPIO>;
588                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
589                         rockchip,delay = <10>;
590                 };
591
592                 /*lcd_rst:lcd_rst {
593                         rockchip,power_type = <GPIO>;
594                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
595                         rockchip,delay = <5>;
596                 };*/
597         };
598 };
599
600
601 &hdmi {
602         status = "okay";
603 };
604
605 &adc {
606         status = "okay";
607
608         rockchip_headset {
609                 compatible = "rockchip_headset";
610                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
611                 pinctrl-names = "default";
612                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
613                 rockchip,headset_wakeup = <0>;
614        /*
615                hook_gpio = ;
616                hook_down_type = ; //interrupt hook key down status
617                 */
618        };
619
620         key {
621                 compatible = "rockchip,key";
622                 io-channels = <&adc 1>;
623
624                 vol-up-key {
625                         linux,code = <115>;
626                         label = "volume up";
627                         rockchip,adc_value = <1>;
628                 };
629
630                 vol-down-key {
631                         linux,code = <114>;
632                         label = "volume down";
633                         rockchip,adc_value = <170>;
634                 };
635
636                 power-key {
637                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
638                         linux,code = <116>;
639                         label = "power";
640                         gpio-key,wakeup;
641                 };
642
643                 menu-key {
644                         linux,code = <59>;
645                         label = "menu";
646                         rockchip,adc_value = <355>;
647                 };
648
649                 home-key {
650                         linux,code = <102>;
651                         label = "home";
652                         rockchip,adc_value = <746>;
653                 };
654
655                 back-key {
656                         linux,code = <158>;
657                         label = "back";
658                         rockchip,adc_value = <560>;
659                 };
660
661                 camera-key {
662                         linux,code = <212>;
663                         label = "camera";
664                         rockchip,adc_value = <450>;
665                 };
666         };
667 };
668
669 &pwm0 {
670         status = "okay";
671 };
672
673 &clk_core_b_dvfs_table {
674         operating-points = <
675                 /* KHz    uV */
676                 216000 950000
677                 312000 950000
678                 408000 950000
679                 600000 950000
680                 696000 950000
681                 816000 975000
682                 1008000 1050000
683                 1200000 1150000
684                 1296000 1225000
685                 1416000 1300000
686                 1512000 1350000
687                 >;
688         support-pvtm = <1>;
689         pvtm-operating-points = <
690             /* KHz    uV    margin(uV)*/
691             216000 950000   25000
692             312000 950000   25000
693             408000 950000   25000
694             600000 950000   25000
695             696000 950000   25000
696             816000 975000   25000
697             1008000 1050000 25000
698             1200000 1150000 25000
699             1296000 1225000 25000
700             1416000 1300000 25000
701             1512000 1350000 25000
702             >;
703         status = "okay";
704 };
705
706 &clk_core_l_dvfs_table {
707         operating-points = <
708                 /* KHz    uV */
709                 216000 950000
710                 312000 950000
711                 408000 950000
712                 600000 950000
713                 696000 975000
714                 816000 1025000
715                 1008000 1125000
716                 1200000 1225000
717                 >;
718         support-pvtm = <1>;
719         pvtm-operating-points = <
720             /* KHz    uV    margin(uV)*/
721             216000 950000   25000
722             312000 950000   25000
723             408000 950000   25000
724             600000 950000   25000
725             696000 975000   25000
726             816000 1025000  25000
727             1008000 1125000 25000
728             1200000 1225000 25000
729             >;
730         status = "okay";
731 };
732
733 &clk_gpu_dvfs_table {
734         operating-points = <
735                 /* KHz    uV */
736                 200000 950000
737                 288000 1025000
738                 400000 1050000
739                 576000 1200000
740                 >;
741 };
742
743 &clk_ddr_dvfs_table {
744         operating-points = <
745                 /* KHz    uV */
746                 96000  950000
747                 192000 950000
748                 300000 950000
749                 324000 975000
750                 396000 1000000
751                 528000 1050000
752                 600000 1075000
753                 696000 1100000
754                 792000 1125000
755                 >;
756
757         freq-table = <
758                 /*status                freq(KHz)*/
759                 SYS_STATUS_NORMAL       600000
760                 SYS_STATUS_SUSPEND      192000
761                 SYS_STATUS_VIDEO_1080P  324000
762                 SYS_STATUS_VIDEO_4K     600000
763                 SYS_STATUS_PERFORMANCE  600000
764                 SYS_STATUS_DUALVIEW     600000
765                 SYS_STATUS_BOOST        396000
766                 SYS_STATUS_ISP          528000
767                 >;
768         auto-freq-table = <
769                 240000
770                 324000
771                 396000
772                 528000
773                 >;
774         auto-freq=<0>;
775         status="okay";
776 };
777
778 &dwc_control_usb {
779                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
780                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
781
782                 rockchip,remote_wakeup;
783                 rockchip,usb_irq_wakeup;
784         };
785
786 /include/ "../../../arm/boot/dts/act8846.dtsi"
787 &act8846 {
788         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
789         act8846,system-power-controller;
790
791         regulators {
792
793                 dcdc1_reg: regulator@0{
794                         regulator-name= "act_dcdc1";
795                         regulator-min-microvolt = <1200000>;
796                         regulator-max-microvolt = <1200000>;
797                         regulator-always-on;
798                         regulator-boot-on;
799                 };
800
801                 dcdc2_reg: regulator@1 {
802                         regulator-name= "vccio";
803                         regulator-min-microvolt = <3300000>;
804                         regulator-max-microvolt = <3300000>;
805                         regulator-initial-state = <3>;
806                         regulator-state-mem {
807                                 regulator-state-enabled;
808                                 regulator-state-uv = <3300000>;
809                         };
810                 };
811
812                 dcdc3_reg: regulator@2 {
813                         regulator-name= "vdd_logic";
814                         regulator-min-microvolt = <700000>;
815                         regulator-max-microvolt = <1500000>;
816                         regulator-initial-state = <3>;
817                         regulator-state-mem {
818                                 regulator-state-enabled;
819                                 regulator-state-uv = <1000000>;
820                         };
821
822                 };
823
824                 dcdc4_reg: regulator@3 {
825                         regulator-name= "act_dcdc4";
826                         regulator-min-microvolt = <2000000>;
827                         regulator-max-microvolt = <2000000>;
828                                 regulator-initial-state = <3>;
829                         regulator-state-mem {
830                                 regulator-state-enabled;
831                                 regulator-state-uv = <2000000>;
832                         };
833                 };
834
835                 ldo1_reg: regulator@4 {
836                         regulator-name= "vccio_sd";
837                         regulator-min-microvolt = <1800000>;
838                         regulator-max-microvolt = <3300000>;
839
840                 };
841
842                 ldo2_reg: regulator@5 {
843                         regulator-name= "act_ldo2";
844                         regulator-min-microvolt = <1000000>;
845                         regulator-max-microvolt = <1000000>;
846
847                 };
848
849                 ldo3_reg: regulator@6 {
850                         regulator-name= "act_ldo3";
851                         regulator-min-microvolt = <3300000>;
852                         regulator-max-microvolt = <3300000>;
853
854                 };
855
856                 ldo4_reg:regulator@7 {
857                         regulator-name= "act_ldo4";
858                         regulator-min-microvolt = <3300000>;
859                         regulator-max-microvolt = <3300000>;
860
861                 };
862
863                 ldo5_reg: regulator@8 {
864                         regulator-name= "act_ldo5";
865                         regulator-min-microvolt = <3300000>;
866                         regulator-max-microvolt = <3300000>;
867
868                 };
869
870                 ldo6_reg: regulator@9 {
871                         regulator-name= "act_ldo6";
872                         regulator-min-microvolt = <1000000>;
873                         regulator-max-microvolt = <1000000>;
874                         regulator-initial-state = <3>;
875                         regulator-state-mem {
876                                 regulator-state-enabled;
877                         };
878
879                 };
880
881                 ldo7_reg: regulator@10 {
882                         regulator-name= "vcc_18";
883                         regulator-min-microvolt = <1800000>;
884                         regulator-max-microvolt = <1800000>;
885                         regulator-initial-state = <3>;
886                         regulator-state-mem {
887                                 regulator-state-enabled;
888                         };
889
890                 };
891
892                 ldo8_reg: regulator@11 {
893                         regulator-name= "act_ldo8";
894                         regulator-min-microvolt = <1800000>;
895                         regulator-max-microvolt = <1800000>;
896
897                 };
898         };
899 };
900
901 /include/ "../../../arm/boot/dts/rk818.dtsi"
902 &rk818 {
903         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
904         rk818,system-power-controller;
905         pinctrl-names = "default";
906         pinctrl-0 = <&gpio0_c1>;
907 rk818,support_dc_chg = <1>;/*1:dc chg; 0:usb chg*/
908         regulators {
909
910                 rk818_dcdc1_reg: regulator@0{
911                         regulator-name= "vdd_logic";/*vcc arm*/
912                         regulator-min-microvolt = <700000>;/*<725000>;*/
913                         regulator-max-microvolt = <1500000>;
914                         regulator-initial-mode = <0x2>;
915                         regulator-initial-state = <3>;
916                         regulator-state-mem {
917                                 regulator-state-mode = <0x2>;
918                                 regulator-state-enabled;
919                                 regulator-state-uv =<1100000>;
920                         };
921                 };
922
923                 rk818_dcdc2_reg: regulator@1 {
924                         regulator-name= "rk818_dcdc2";/*vcc gpu*/
925                         regulator-min-microvolt = <700000>;
926                         regulator-max-microvolt = <1200000>;
927                         regulator-initial-mode = <0x2>;
928                         regulator-initial-state = <3>;
929                         regulator-state-mem {
930                                 regulator-state-mode = <0x2>;
931                                 regulator-state-enabled;
932                                 regulator-state-uv = <1200000>;
933                         };
934                 };
935
936                 rk818_dcdc3_reg: regulator@2 {
937                         regulator-name= "rk818_dcdc3";
938                         regulator-min-microvolt = <1200000>;
939                         regulator-max-microvolt = <1200000>;
940                         regulator-initial-mode = <0x2>;
941                         regulator-initial-state = <3>;
942                         regulator-state-mem {
943                                 regulator-state-mode = <0x2>;
944                                 regulator-state-enabled;
945                                 regulator-state-uv = <1200000>;
946                         };
947                 };
948
949                 rk818_dcdc4_reg: regulator@3 {
950                         regulator-name= "vccio";
951                         regulator-min-microvolt = <3000000>;
952                         regulator-max-microvolt = <3000000>;
953                         regulator-initial-mode = <0x2>;
954                         regulator-initial-state = <3>;
955                         regulator-state-mem {
956                                 regulator-state-mode = <0x2>;
957                                 regulator-state-enabled;
958                                 regulator-state-uv = <3000000>;
959                         };
960                 };
961
962                 rk818_ldo1_reg: regulator@4 {
963                         regulator-name= "rk818_ldo1";
964                         regulator-min-microvolt = <3300000>;
965                         regulator-max-microvolt = <3300000>;
966                         regulator-initial-state = <3>;
967                         regulator-state-mem {
968                                 regulator-state-enabled;
969                                 regulator-state-uv = <3300000>;
970                         };
971                 };
972
973                 rk818_ldo2_reg: regulator@5 {
974                         regulator-name= "vcc_tp";
975                         regulator-min-microvolt = <3000000>;
976                         regulator-max-microvolt = <3000000>;
977                         regulator-initial-state = <3>;
978                         regulator-state-mem {
979                                 regulator-state-enabled;
980                                 regulator-state-uv = <3000000>;
981                         };
982                 };
983
984                 rk818_ldo3_reg: regulator@6 {
985                         regulator-name= "rk818_ldo3";
986                         regulator-min-microvolt = <1000000>;
987                         regulator-max-microvolt = <1000000>;
988                         regulator-initial-state = <3>;
989                         regulator-state-mem {
990                                 regulator-state-enabled;
991                                 regulator-state-uv = <1000000>;
992                         };
993                 };
994
995                 rk818_ldo4_reg:regulator@7 {
996                         regulator-name= "rk818_ldo4";
997                         regulator-min-microvolt = <1800000>;
998                         regulator-max-microvolt = <1800000>;
999                         regulator-initial-state = <3>;
1000                         regulator-state-mem {
1001                                 regulator-state-disabled;
1002                                 regulator-state-uv = <1800000>;
1003                         };
1004                 };
1005
1006                 rk818_ldo5_reg: regulator@8 {
1007                         regulator-name= "rk818_ldo5";
1008                         regulator-min-microvolt = <1800000>;
1009                         regulator-max-microvolt = <1800000>;
1010                         regulator-initial-state = <3>;
1011                         regulator-state-mem {
1012                                 regulator-state-enabled;
1013                                 regulator-state-uv = <1800000>;
1014                         };
1015                 };
1016
1017                 rk818_ldo6_reg: regulator@9 {
1018                         regulator-name= "rk818_ldo6";
1019                         regulator-min-microvolt = <1000000>;
1020                         regulator-max-microvolt = <1000000>;
1021                         regulator-initial-state = <3>;
1022                         regulator-state-mem {
1023                                 regulator-state-disabled;
1024                                 regulator-state-uv = <1000000>;
1025                         };
1026                 };
1027
1028                 rk818_ldo7_reg: regulator@10 {
1029                         regulator-name= "rk818_ldo7";
1030                         regulator-min-microvolt = <1800000>;
1031                         regulator-max-microvolt = <1800000>;
1032                         regulator-initial-state = <3>;
1033                         regulator-state-mem {
1034                                 regulator-state-enabled;
1035                                 regulator-state-uv = <1800000>;
1036                         };
1037                 };
1038
1039                 rk818_ldo8_reg: regulator@11 {
1040                         regulator-name= "rk818_ldo8";
1041                         regulator-min-microvolt = <1800000>;
1042                         regulator-max-microvolt = <1800000>;
1043                         regulator-initial-state = <3>;
1044                         regulator-state-mem {
1045                                 regulator-state-enabled;
1046                                 regulator-state-uv = <1800000>;
1047                         };
1048                 };
1049
1050                 rk818_ldo9_reg: regulator@12 {
1051                         regulator-name= "vccio_sd";
1052                         regulator-min-microvolt = <1800000>;
1053                         regulator-max-microvolt = <3300000>;
1054                         regulator-initial-state = <3>;
1055                         regulator-state-mem {
1056                                 regulator-state-enabled;
1057                                 regulator-state-uv = <3300000>;
1058                         };
1059                 };
1060
1061                 rk818_ldo10_reg: regulator@13 {
1062                         regulator-name= "rk818_ldo10";
1063                         regulator-state-mem {
1064                                 regulator-state-disabled;
1065                         };
1066                 };
1067         };
1068
1069        battery {
1070                 ocv_table = <3350 3677 3693 3719 3752
1071                              3770 3775 3778 3785 3796
1072                              3812 3839 3881 3907 3933
1073                              3958 3978 4033 4087 4123
1074                              4174 >;
1075                 design_capacity = <8650>;
1076                 design_qmax = <8800>;
1077                 max_overcharge = <100>;
1078                 max_input_currentmA  = <3000>;
1079                 max_chrg_currentmA = <1800>;
1080                 max_charge_voltagemV = <4200>;
1081                 sleep_enter_current = <600>;
1082                 sleep_exit_current = <600>;
1083                 power_off_thresd = <3400>;
1084                 chrg_diff_voltagemV = <0>;
1085                 virtual_power = <1>;
1086                 support_usb_adp = <0>;
1087                 support_dc_adp = <1>;
1088                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
1089         };
1090 };
1091
1092
1093 &ion_cma {
1094        reg = <0x00000000 0x00000000>; /* 0MB */
1095 };
1096
1097 &rk3368_cif_sensor{
1098         status = "okay";
1099 };
1100
1101 &rockchip_suspend {
1102                 rockchip,ctrbits = <
1103                         (0
1104                         | RKPM_SLP_ARMOFF
1105                         | RKPM_SLP_PMU_PLLS_PWRDN
1106                         | RKPM_SLP_PMU_PMUALIVE_32K
1107                         | RKPM_SLP_SFT_PLLS_DEEP
1108                         | RKPM_SLP_PMU_DIS_OSC
1109                         | RKPM_SLP_SFT_PD_NBSCUS
1110                         )
1111                         >;
1112         };
1113
1114 &dsihost0{
1115         status = "okay";
1116 };
1117 /*
1118 &dwc_control_usb {
1119         usb_uart {
1120                 status = "disabled";
1121         };
1122 };
1123 */