arch/arm64/boot/dts/rk3368.dtsi

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/pinctrl/rockchip.h>
   6 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
   7
   8 #include "skeleton.dtsi"
   9
  10 / {
  11         compatible = "rockchip,rk3368";
  12
  13         interrupt-parent = <&gic>;
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         xin24m: xin24m {
  18                 compatible = "fixed-clock";
  19                 #clock-cells = <0>;
  20                 clock-frequency = <24000000>;
  21                 clock-output-names = "xin24m";
  22         };
  23
  24         aliases {
  25                 serial0 = &uart_bt;
  26                 serial1 = &uart_bb;
  27                 serial2 = &uart_dbg;
  28                 serial3 = &uart_gps;
  29                 serial4 = &uart_exp;
  30                 i2c0 = &i2c0;
  31                 i2c1 = &i2c1;
  32                 i2c2 = &i2c2;
  33                 i2c3 = &i2c3;
  34                 i2c4 = &i2c4;
  35                 i2c5 = &i2c5;
  36                 spi0 = &spi0;
  37                 spi1 = &spi1;
  38                 spi2 = &spi2;
  39         };
  40
  41         cpus {
  42                 #address-cells = <2>;
  43                 #size-cells = <0>;
  44
  45                 cpu@0 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a53","arm,armv8";
  48                         reg = <0x0 0x0>;
  49                 };
  50         };
  51
  52         chosen {
  53                 bootargs = "console=ttyS2 earlyprintk=uart8250-32bit,0xff690000";
  54         };
  55
  56         timer {
  57                 compatible = "arm,armv8-timer";
  58                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  59                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  60                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  61                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
  62                 clock-frequency = <24000000>;
  63         };
  64
  65         memory@00000000 {
  66                 device_type = "memory";
  67                 reg = <0x0 0x00000000 0x0 0x20000000>;
  68         };
  69
  70         gic: interrupt-controller@ffb70000 {
  71                 compatible = "arm,cortex-a15-gic";
  72                 #interrupt-cells = <3>;
  73                 #address-cells = <0>;
  74                 interrupt-controller;
  75                 reg = <0x0 0xffb71000 0 0x1000>,
  76                       <0x0 0xffb72000 0 0x1000>;
  77         };
  78
  79         pmu_grf: syscon@ff738000 {
  80                 compatible = "rockchip,rk3388-pmu-grf", "syscon";
  81                 reg = <0x0 0xff738000 0x0 0x100>;
  82         };
  83
  84         sgrf: syscon@ff740000 {
  85                 compatible = "rockchip,rk3388-sgrf", "syscon";
  86                 reg = <0x0 0xff740000 0x0 0x1000>;
  87
  88         };
  89
  90         grf: syscon@ff770000 {
  91                 compatible = "rockchip,rk3388-grf", "syscon";
  92                 reg = <0x0 0xff770000 0x0 0x1000>;
  93         };
  94
  95         i2c0: i2c@ff650000 {
  96                 compatible = "rockchip,rk30-i2c";
  97                 reg = <0x0 0xff650000 0x0 0x1000>;
  98                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
  99                 #address-cells = <1>;
 100                 #size-cells = <0>;
 101                 pinctrl-names = "default", "gpio";
 102                 pinctrl-0 = <&i2c0_xfer>;
 103                 pinctrl-1 = <&i2c0_gpio>;
 104                 gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
 105                 //clocks = <&clk_gates10 2>;
 106                 rockchip,check-idle = <1>;
 107                 status = "disabled";
 108         };
 109
 110         i2c1: i2c@ff140000 {
 111                 compatible = "rockchip,rk30-i2c";
 112                 reg = <0x0 0xff140000 0x0 0x1000>;
 113                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 114                 #address-cells = <1>;
 115                 #size-cells = <0>;
 116                 pinctrl-names = "default", "gpio";
 117                 pinctrl-0 = <&i2c1_xfer>;
 118                 pinctrl-1 = <&i2c1_gpio>;
 119                 gpios = <&gpio2 GPIO_C5 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C6 GPIO_ACTIVE_LOW>;
 120                 //clocks = <&clk_gates10 3>;
 121                 rockchip,check-idle = <1>;
 122                 status = "disabled";
 123         };
 124
 125         i2c2: i2c@ff660000 {
 126                 compatible = "rockchip,rk30-i2c";
 127                 reg = <0x0 0xff660000 0x0 0x1000>;
 128                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 pinctrl-names = "default", "gpio";
 132                 pinctrl-0 = <&i2c2_xfer>;
 133                 pinctrl-1 = <&i2c2_gpio>;
 134                 gpios = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
 135                 //clocks = <&clk_gates6 13>;
 136                 rockchip,check-idle = <1>;
 137                 status = "disabled";
 138         };
 139
 140         i2c3: i2c@ff150000 {
 141                 compatible = "rockchip,rk30-i2c";
 142                 reg = <0x0 0xff150000 0x0 0x1000>;
 143                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 144                 #address-cells = <1>;
 145                 #size-cells = <0>;
 146                 pinctrl-names = "default", "gpio";
 147                 pinctrl-0 = <&i2c3_xfer>;
 148                 pinctrl-1 = <&i2c3_gpio>;
 149                 gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio1 GPIO_C0 GPIO_ACTIVE_LOW>;
 150                 //clocks = <&clk_gates6 14>;
 151                 rockchip,check-idle = <1>;
 152                 status = "disabled";
 153         };
 154
 155         i2c4: i2c@ff160000 {
 156                 compatible = "rockchip,rk30-i2c";
 157                 reg = <0x0 0xff160000 0x0 0x1000>;
 158                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161                 pinctrl-names = "default", "gpio";
 162                 pinctrl-0 = <&i2c4_xfer>;
 163                 pinctrl-1 = <&i2c4_gpio>;
 164                 gpios = <&gpio3 GPIO_D0 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D1 GPIO_ACTIVE_LOW>;
 165                 //clocks = <&clk_gates6 15>;
 166                 rockchip,check-idle = <1>;
 167                 status = "disabled";
 168         };
 169
 170         i2c5: i2c@ff170000 {
 171                 compatible = "rockchip,rk30-i2c";
 172                 reg = <0x0 0xff170000 0x0 0x1000>;
 173                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 174                 #address-cells = <1>;
 175                 #size-cells = <0>;
 176                 pinctrl-names = "default", "gpio";
 177                 pinctrl-0 = <&i2c5_xfer>;
 178                 pinctrl-1 = <&i2c5_gpio>;
 179                 gpios = <&gpio3 GPIO_D2 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D3 GPIO_ACTIVE_LOW>;
 180                 //clocks = <&clk_gates7 0>;
 181                 rockchip,check-idle = <1>;
 182                 status = "disabled";
 183         };
 184
 185         uart_bt: serial@ff180000 {
 186                 compatible = "rockchip,serial";
 187                 reg = <0x0 0xff180000 0x0 0x100>;
 188                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 189                 clock-frequency = <24000000>;
 190                 clocks = <&xin24m>, <&xin24m>;
 191                 clock-names = "sclk_uart", "pclk_uart";
 192                 reg-shift = <2>;
 193                 reg-io-width = <4>;
 194                 //dmas = <&pdma1 1>, <&pdma1 2>;
 195                 //#dma-cells = <2>;
 196                 pinctrl-names = "default";
 197                 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 198                 status = "disabled";
 199         };
 200
 201         uart_bb: serial@ff190000 {
 202                 compatible = "rockchip,serial";
 203                 reg = <0x0 0xff190000 0x0 0x100>;
 204                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 205                 clock-frequency = <24000000>;
 206                 clocks = <&xin24m>, <&xin24m>;
 207                 clock-names = "sclk_uart", "pclk_uart";
 208                 reg-shift = <2>;
 209                 reg-io-width = <4>;
 210                 //dmas = <&pdma1 3>, <&pdma1 4>;
 211                 //#dma-cells = <2>;
 212                 pinctrl-names = "default";
 213                 pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 214                 status = "disabled";
 215         };
 216
 217         uart_dbg: serial@ff690000 {
 218                 compatible = "rockchip,serial";
 219                 reg = <0x0 0xff690000 0x0 0x100>;
 220                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 221                 clock-frequency = <24000000>;
 222                 clocks = <&xin24m>, <&xin24m>;
 223                 clock-names = "sclk_uart", "pclk_uart";
 224                 reg-shift = <2>;
 225                 reg-io-width = <4>;
 226                 //dmas = <&pdma0 4>, <&pdma0 5>;
 227                 //#dma-cells = <2>;
 228                 pinctrl-names = "default";
 229                 pinctrl-0 = <&uart2_xfer>;
 230                 //status = "disabled";
 231         };
 232
 233         uart_gps: serial@ff1b0000 {
 234                 compatible = "rockchip,serial";
 235                 reg = <0x0 0xff1b0000 0x0 0x100>;
 236                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 237                 clock-frequency = <24000000>;
 238                 clocks = <&xin24m>, <&xin24m>;
 239                 clock-names = "sclk_uart", "pclk_uart";
 240                 current-speed = <115200>;
 241                 reg-shift = <2>;
 242                 reg-io-width = <4>;
 243                 //dmas = <&pdma1 7>, <&pdma1 8>;
 244                 //#dma-cells = <2>;
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>;
 247                 status = "disabled";
 248         };
 249
 250         uart_exp: serial@ff1c0000 {
 251                 compatible = "rockchip,serial";
 252                 reg = <0x0 0xff1c0000 0x0 0x100>;
 253                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 254                 clock-frequency = <24000000>;
 255                 clocks = <&xin24m>, <&xin24m>;
 256                 clock-names = "sclk_uart", "pclk_uart";
 257                 reg-shift = <2>;
 258                 reg-io-width = <4>;
 259                 //dmas = <&pdma1 9>, <&pdma1 10>;
 260                 //#dma-cells = <2>;
 261                 pinctrl-names = "default";
 262                 pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
 263                 status = "disabled";
 264         };
 265
 266         spi0: spi@ff110000 {
 267                 compatible = "rockchip,rockchip-spi";
 268                 reg = <0x0 0xff110000 0x0 0x1000>;
 269                 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 270                 #address-cells = <1>;
 271                 #size-cells = <0>;
 272                 pinctrl-names = "default";
 273                 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;
 274                 rockchip,spi-src-clk = <0>;
 275                 num-cs = <2>;
 276                 //clocks =<&clk_spi0>, <&clk_gates6 4>;
 277                 //clock-names = "spi","pclk_spi0";
 278                 //dmas = <&pdma1 11>, <&pdma1 12>;
 279                 //#dma-cells = <2>;
 280                 //dma-names = "tx", "rx";
 281                 status = "disabled";
 282         };
 283
 284         spi1: spi@ff120000 {
 285                 compatible = "rockchip,rockchip-spi";
 286                 reg = <0x0 0xff120000 0x0 0x1000>;
 287                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 288                 #address-cells = <1>;
 289                 #size-cells = <0>;
 290                 pinctrl-names = "default";
 291                 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
 292                 rockchip,spi-src-clk = <1>;
 293                 num-cs = <1>;
 294                 //clocks = <&clk_spi1>, <&clk_gates6 5>;
 295                 //clock-names = "spi","pclk_spi1";
 296                 //dmas = <&pdma1 13>, <&pdma1 14>;
 297                 //#dma-cells = <2>;
 298                 //dma-names = "tx", "rx";
 299                 status = "disabled";
 300         };
 301
 302         spi2: spi@ff130000 {
 303                 compatible = "rockchip,rockchip-spi";
 304                 reg = <0x0 0xff130000 0x0 0x1000>;
 305                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 306                 #address-cells = <1>;
 307                 #size-cells = <0>;
 308                 pinctrl-names = "default";
 309                 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
 310                 rockchip,spi-src-clk = <2>;
 311                 num-cs = <2>;
 312                 //clocks = <&clk_spi2>, <&clk_gates6 6>;
 313                 //clock-names = "spi","pclk_spi2";
 314                 //dmas = <&pdma1 15>, <&pdma1 16>;
 315                 //#dma-cells = <2>;
 316                 //dma-names = "tx", "rx";
 317                 status = "disabled";
 318         };
 319
 320
 321         pinctrl: pinctrl {
 322                 compatible = "rockchip,rk3368-pinctrl";
 323                 rockchip,grf = <&grf>;
 324                 rockchip,pmu = <&pmu_grf>;
 325                 #address-cells = <2>;
 326                 #size-cells = <2>;
 327                 ranges;
 328
 329                 gpio0: gpio0@ff750000 {
 330                         compatible = "rockchip,gpio-bank";
 331                         reg =   <0x0 0xff750000 0x0 0x100>;
 332                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 333                         //clocks = <&clk_gates17 4>;
 334
 335                         gpio-controller;
 336                         #gpio-cells = <2>;
 337
 338                         interrupt-controller;
 339                         #interrupt-cells = <2>;
 340                 };
 341
 342                 gpio1: gpio1@ff780000 {
 343                         compatible = "rockchip,gpio-bank";
 344                         reg = <0x0 0xff780000 0x0 0x100>;
 345                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 346                         //clocks = <&clk_gates14 1>;
 347
 348                         gpio-controller;
 349                         #gpio-cells = <2>;
 350
 351                         interrupt-controller;
 352                         #interrupt-cells = <2>;
 353                 };
 354
 355                 gpio2: gpio2@ff790000 {
 356                         compatible = "rockchip,gpio-bank";
 357                         reg = <0x0 0xff790000 0x0 0x100>;
 358                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 359                         //clocks = <&clk_gates14 2>;
 360
 361                         gpio-controller;
 362                         #gpio-cells = <2>;
 363
 364                         interrupt-controller;
 365                         #interrupt-cells = <2>;
 366                 };
 367
 368                 gpio3: gpio3@ff7a0000 {
 369                         compatible = "rockchip,gpio-bank";
 370                         reg = <0x0 0xff7a0000 0x0 0x100>;
 371                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 372                         //clocks = <&clk_gates14 3>;
 373
 374                         gpio-controller;
 375                         #gpio-cells = <2>;
 376
 377                         interrupt-controller;
 378                         #interrupt-cells = <2>;
 379                 };
 380
 381                 pcfg_pull_up: pcfg-pull-up {
 382                         bias-pull-up;
 383                 };
 384
 385                 pcfg_pull_down: pcfg-pull-down {
 386                         bias-pull-down;
 387                 };
 388
 389                 pcfg_pull_none: pcfg-pull-none {
 390                         bias-disable;
 391                 };
 392
 393                 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
 394                         drive-strength = <8>;
 395                 };
 396
 397                 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
 398                         bias-pull-up;
 399                         drive-strength = <8>;
 400                 };
 401
 402                 pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
 403                         drive-strength = <4>;
 404                 };
 405
 406                 pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
 407                         bias-pull-up;
 408                         drive-strength = <4>;
 409                 };
 410
 411                 pcfg_output_high: pcfg-output-high {
 412                         output-high;
 413                 };
 414
 415                 pcfg_output_low: pcfg-output-low {
 416                         output-low;
 417                 };
 418
 419                 i2c0 {
 420                         i2c0_xfer: i2c0-xfer {
 421                                 rockchip,pins = <0 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,
 422                                                 <0 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>;
 423                         };
 424                         i2c0_gpio: i2c0-gpio {
 425                                 rockchip,pins = <0 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_none>,
 426                                                 <0 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_none>;
 427                         };
 428                 };
 429
 430                 i2c1 {
 431                         i2c1_xfer: i2c1-xfer {
 432                                 rockchip,pins = <2 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>,
 433                                                 <2 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>;
 434                         };
 435                         i2c1_gpio: i2c1-gpio {
 436                                 rockchip,pins = <2 GPIO_C5 RK_FUNC_GPIO &pcfg_pull_none>,
 437                                                 <2 GPIO_C6 RK_FUNC_GPIO &pcfg_pull_none>;
 438                         };
 439                 };
 440
 441                 i2c2 {
 442                         i2c2_xfer: i2c2-xfer {
 443                                 rockchip,pins = <3 GPIO_D7 RK_FUNC_2 &pcfg_pull_none>,
 444                                                 <0 GPIO_B1 RK_FUNC_2 &pcfg_pull_none>;
 445                         };
 446                         i2c2_gpio: i2c2-gpio {
 447                                 rockchip,pins = <3 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>,
 448                                                 <0 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_none>;
 449             };
 450                 };
 451
 452                 i2c3 {
 453                         i2c3_xfer: i2c3-xfer {
 454                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,
 455                                                 <1 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>;
 456                         };
 457                         i2c3_gpio: i2c3-gpio {
 458                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>,
 459                                                 <1 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>;
 460                         };
 461                 };
 462
 463                 i2c4 {
 464                         i2c4_xfer: i2c4-xfer {
 465                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_2 &pcfg_pull_none>,
 466                                                 <3 GPIO_D1 RK_FUNC_2 &pcfg_pull_none>;
 467                         };
 468                         i2c4_gpio: i2c4-gpio {
 469                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_GPIO &pcfg_pull_none>,
 470                                                 <3 GPIO_D1 RK_FUNC_GPIO &pcfg_pull_none>;
 471                         };
 472                 };
 473
 474                 i2c5 {
 475                         i2c5_xfer: i2c5-xfer {
 476                                 rockchip,pins = <3 GPIO_D2 RK_FUNC_2 &pcfg_pull_none>,
 477                                                 <3 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>;
 478                         };
 479                         i2c5_gpio: i2c5-gpio {
 480                                 rockchip,pins = <3 GPIO_D2 RK_FUNC_GPIO &pcfg_pull_none>,
 481                                                 <3 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>;
 482                         };
 483                 };
 484
 485                 uart0 {
 486                         uart0_xfer: uart0-xfer {
 487                                 rockchip,pins = <2 GPIO_D0 RK_FUNC_1 &pcfg_pull_up>,
 488                                                 <2 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>;
 489                         };
 490
 491                         uart0_cts: uart0-cts {
 492                                 rockchip,pins = <2 GPIO_D2 RK_FUNC_1 &pcfg_pull_none>;
 493                         };
 494
 495                         uart0_rts: uart0-rts {
 496                                 rockchip,pins = <2 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>;
 497                         };
 498
 499                         uart0_rts_gpio: uart0-rts-gpio {
 500                                 rockchip,pins = <2 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>;
 501                         };
 502                 };
 503
 504                 uart1 {
 505                         uart1_xfer: uart1-xfer {
 506                                 rockchip,pins = <0 GPIO_C4 RK_FUNC_3 &pcfg_pull_up>,
 507                                                 <0 GPIO_C5 RK_FUNC_3 &pcfg_pull_none>;
 508                         };
 509
 510                         uart1_cts: uart1-cts {
 511                                 rockchip,pins = <0 GPIO_C6 RK_FUNC_3 &pcfg_pull_none>;
 512                         };
 513
 514                         uart1_rts: uart1-rts {
 515                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_3 &pcfg_pull_none>;
 516                         };
 517                 };
 518
 519                 uart2 {
 520                         uart2_xfer: uart2-xfer {
 521                                 rockchip,pins = <2 GPIO_A6 RK_FUNC_2 &pcfg_pull_up>,
 522                                                 <2 GPIO_A5 RK_FUNC_2 &pcfg_pull_none>;
 523                         };
 524                 };
 525
 526                 uart3 {
 527                         uart3_xfer: uart3-xfer {
 528                                 rockchip,pins = <3 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>,
 529                                                 <3 GPIO_D6 RK_FUNC_2 &pcfg_pull_none>;
 530                         };
 531
 532                         uart3_cts: uart3-cts {
 533                                 rockchip,pins = <3 GPIO_C0 RK_FUNC_2 &pcfg_pull_none>;
 534                         };
 535
 536                         uart3_rts: uart3-rts {
 537                                 rockchip,pins = <3 GPIO_C1 RK_FUNC_2 &pcfg_pull_none>;
 538                         };
 539                 };
 540
 541                 uart4 {
 542                         uart4_xfer: uart4-xfer {
 543                                 rockchip,pins = <0 GPIO_D3 RK_FUNC_3 &pcfg_pull_up>,
 544                                                 <0 GPIO_D2 RK_FUNC_3 &pcfg_pull_none>;
 545                         };
 546
 547                         uart4_cts: uart4-cts {
 548                                 rockchip,pins = <0 GPIO_D0 RK_FUNC_3 &pcfg_pull_none>;
 549                         };
 550
 551                         uart4_rts: uart4-rts {
 552                                 rockchip,pins = <0 GPIO_D1 RK_FUNC_3 &pcfg_pull_none>;
 553                         };
 554                 };
 555
 556                 spi0 {
 557                         spi0_clk: spi0-clk {
 558                                 rockchip,pins = <1 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>;
 559                         };
 560                         spi0_cs0: spi0-cs0 {
 561                                 rockchip,pins = <1 GPIO_D0 RK_FUNC_3 &pcfg_pull_up>;
 562                         };
 563                         spi0_tx: spi0-tx {
 564                                 rockchip,pins = <1 GPIO_C7 RK_FUNC_3 &pcfg_pull_up>;
 565                         };
 566                         spi0_rx: spi0-rx {
 567                                 rockchip,pins = <1 GPIO_C6 RK_FUNC_3 &pcfg_pull_up>;
 568                         };
 569                         spi0_cs1: spi0-cs1 {
 570                                 rockchip,pins = <1 GPIO_D1 RK_FUNC_3 &pcfg_pull_up>;
 571                         };
 572                 };
 573
 574                 spi1 {
 575                         spi1_clk: spi1-clk {
 576                                 rockchip,pins = <1 GPIO_B6 RK_FUNC_2 &pcfg_pull_up>;
 577                         };
 578                         spi1_cs0: spi1-cs0 {
 579                                 rockchip,pins = <1 GPIO_B7 RK_FUNC_2 &pcfg_pull_up>;
 580                         };
 581                         spi1_rx: spi1-rx {
 582                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_2 &pcfg_pull_up>;
 583                         };
 584                         spi1_tx: spi1-tx {
 585                                 rockchip,pins = <1 GPIO_C1 RK_FUNC_2 &pcfg_pull_up>;
 586                         };
 587                 };
 588
 589                 spi2 {
 590                         spi2_clk: spi2-clk {
 591                                 rockchip,pins = <0 GPIO_B4 RK_FUNC_2 &pcfg_pull_up>;
 592                         };
 593                         spi2_cs0: spi2-cs0 {
 594                                 rockchip,pins = <0 GPIO_B5 RK_FUNC_2 &pcfg_pull_up>;
 595                         };
 596                         spi2_rx: spi2-rx {
 597                                 rockchip,pins = <0 GPIO_B2 RK_FUNC_2 &pcfg_pull_up>;
 598                         };
 599                         spi2_tx: spi2-tx {
 600                                 rockchip,pins = <0 GPIO_B3 RK_FUNC_2 &pcfg_pull_up>;
 601                         };
 602                 };
 603
 604                 i2s {
 605                         i2s_mclk: i2s-mclk {
 606                                 rockchip,pins = <2 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>;
 607                         };
 608
 609                         i2s_sclk:i2s-sclk {
 610                                 rockchip,pins = <2 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>;
 611                         };
 612
 613                         i2s_lrckrx:i2s-lrckrx {
 614                                 rockchip,pins = <2 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>;
 615                         };
 616
 617                         i2s_lrcktx:i2s-lrcktx {
 618                                 rockchip,pins = <2 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>;
 619                         };
 620
 621                         i2s_sdi:i2s-sdi {
 622                                 rockchip,pins = <2 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;
 623                         };
 624
 625                         i2s_sdo0:i2s-sdo0 {
 626                                 rockchip,pins = <2 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>;
 627                         };
 628
 629                         i2s_sdo1:i2s-sdo1 {
 630                                 rockchip,pins = <2 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>;
 631                         };
 632
 633                         i2s_sdo2:i2s-sdo2 {
 634                                 rockchip,pins = <2 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>;
 635                         };
 636
 637                         i2s_sdo3:i2s-sdo3 {
 638                                 rockchip,pins = <2 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>;
 639                         };
 640
 641                         i2s_gpio: i2s-gpio {
 642                                 rockchip,pins = <2 GPIO_C4  RK_FUNC_GPIO &pcfg_pull_none>,
 643                                                 <2 GPIO_B4 RK_FUNC_GPIO &pcfg_pull_none>,
 644                                                 <2 GPIO_B5 RK_FUNC_GPIO &pcfg_pull_none>,
 645                                                 <2 GPIO_B6 RK_FUNC_GPIO &pcfg_pull_none>,
 646                                                 <2 GPIO_B7 RK_FUNC_GPIO &pcfg_pull_none>,
 647                                                 <2 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>,
 648                                                 <2 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>,
 649                                                 <2 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_none>,
 650                                                 <2 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_none>;
 651                         };
 652                 };
 653
 654                 spdif {
 655                         spdif_tx: spdif-tx {
 656                                 rockchip,pins = <2 GPIO_C7 RK_FUNC_1 &pcfg_pull_none>;
 657                         };
 658                 };
 659
 660                 sdmmc {
 661                         sdmmc_clk: sdmmc-clk {
 662                                 rockchip,pins = <2 GPIO_B1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
 663                         };
 664
 665                         sdmmc_cmd: sdmmc-cmd {
 666                                 rockchip,pins = <2 GPIO_B2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 667                         };
 668
 669                         sdmmc_dectn: sdmmc-dectn {
 670                                 rockchip,pins = <2 GPIO_B3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 671                         };
 672
 673                         sdmmc_bus1: sdmmc-bus1 {
 674                                 rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 675                         };
 676
 677                         sdmmc_bus4: sdmmc-bus4 {
 678                                 rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 679                                                 <2 GPIO_A6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 680                                                 <2 GPIO_A7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 681                                                 <2 GPIO_B0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 682                         };
 683
 684                         sdmmc_gpio: sdmmc-gpio {
 685                                 rockchip,pins = <2 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK
 686                                                 <2 GPIO_B2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD
 687                                                 <2 GPIO_B3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET
 688                                                 <2 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO
 689                                                 <2 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1
 690                                                 <2 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2
 691                                                 <2 GPIO_B0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3
 692                         };
 693                 };
 694
 695                 sdio0 {
 696                         sdio0_bus1: sdio0-bus1 {
 697                                 rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 698                         };
 699
 700                         sdio0_bus4: sdio0-bus4 {
 701                                 rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 702                                                 <2 GPIO_D5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 703                                                 <2 GPIO_D6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 704                                                 <2 GPIO_D7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 705                         };
 706
 707                         sdio0_cmd: sdio0-cmd {
 708                                 rockchip,pins = <3 GPIO_A0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 709                         };
 710
 711                         sdio0_clk: sdio0-clk {
 712                                 rockchip,pins = <3 GPIO_A1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
 713                         };
 714
 715                         sdio0_dectn: sdio0-dectn {
 716                                 rockchip,pins = <3 GPIO_A2 RK_FUNC_1 &pcfg_pull_up>;
 717                         };
 718
 719                         sdio0_wrprt: sdio0-wrprt {
 720                                 rockchip,pins = <3 GPIO_A3 RK_FUNC_1 &pcfg_pull_up>;
 721                         };
 722
 723                         sdio0_pwren: sdio0-pwren {
 724                                 rockchip,pins = <3 GPIO_A4 RK_FUNC_1 &pcfg_pull_up>;
 725                         };
 726
 727                         sdio0_bkpwr: sdio0-bkpwr {
 728                                 rockchip,pins = <3 GPIO_A5 RK_FUNC_1 &pcfg_pull_up>;
 729                         };
 730
 731                         sdio0_int: sdio0-int {
 732                                 rockchip,pins = <3 GPIO_A6 RK_FUNC_1 &pcfg_pull_up>;
 733                         };
 734
 735                         sdio0_gpio: sdio0-gpio {
 736                                 rockchip,pins = <3 GPIO_A0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD
 737                                                 <3 GPIO_A1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK
 738                                                 <3 GPIO_A2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET
 739                                                 <3 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//wrprt
 740                                                 <3 GPIO_A4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//PWREN
 741                                                 <3 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//BKPWR
 742                                                 <3 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//INTN
 743                                                 <2 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO
 744                                                 <2 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1
 745                                                 <2 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2
 746                                                 <2 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3
 747                         };
 748                 };
 749
 750                 emmc {
 751                         emmc_clk: emmc-clk {
 752                                 rockchip,pins = <2 GPIO_A4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 753                         };
 754
 755                         emmc_cmd: emmc-cmd {
 756                                 rockchip,pins = <1 GPIO_D2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
 757                         };
 758
 759                         emmc_pwren: emmc-pwren {
 760                                 rockchip,pins = <1 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>;
 761                         };
 762
 763                         emmc_rstnout: emmc_rstnout {
 764                                 rockchip,pins = <2 GPIO_A3 RK_FUNC_2 &pcfg_pull_none>;
 765                         };
 766
 767                         emmc_bus1: emmc-bus1 {
 768                                 rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//DO
 769                         };
 770
 771                         emmc_bus4: emmc-bus4 {
 772                                 rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//DO
 773                                                 <1 GPIO_C3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D1
 774                                                 <1 GPIO_C4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D2
 775                                                 <1 GPIO_C5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//D3
 776                         };
 777                 };
 778
 779                 pwm0 {
 780                         pwm0_pin: pwm0-pin {
 781                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>;
 782                         };
 783
 784                         vop_pwm_pin:vop-pwm {
 785                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_3 &pcfg_pull_none>;
 786                         };
 787                 };
 788
 789                 pwm1 {
 790                         pwm1_pin: pwm1-pin {
 791                                 rockchip,pins = <0 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>;
 792                         };
 793                 };
 794
 795                 pwm3 {
 796                         pwm3_pin: pwm3-pin {
 797                                 rockchip,pins = <3 GPIO_D6 RK_FUNC_3 &pcfg_pull_none>;
 798                         };
 799                 };
 800
 801                 lcdc {
 802                         lcdc_lcdc: lcdc-lcdc {
 803                                 rockchip,pins = <0 GPIO_D7 RK_FUNC_1 &pcfg_pull_none>,//DCLK
 804                                                 <0 GPIO_D6 RK_FUNC_1 &pcfg_pull_none>,//DEN
 805                                                 <0 GPIO_D4 RK_FUNC_1 &pcfg_pull_none>,//HSYNC
 806                                                 <0 GPIO_D5 RK_FUNC_1 &pcfg_pull_none>;//VSYN
 807                         };
 808
 809                         lcdc_gpio: lcdc-gpio {
 810                                 rockchip,pins = <0 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>,//DCLK
 811                                                 <0 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_none>,//DEN
 812                                                 <0 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_none>,//HSYNC
 813                                                 <0 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_none>;//VSYN
 814                         };
 815                 };
 816
 817                 isp {
 818                         cif_clkout: cif-clkout {
 819                                 rockchip,pins = <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout
 820                         };
 821
 822                         isp_dvp_d2d9: isp-dvp-d2d9 {
 823                                 rockchip,pins = <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2
 824                                                 <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3
 825                                                 <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4
 826                                                 <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5
 827                                                 <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6
 828                                                 <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>,//cif_data7
 829                                                 <1 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,//cif_data8
 830                                                 <1 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>,//cif_data9
 831                                                 <1 GPIO_B0 RK_FUNC_1 &pcfg_pull_none>,//cif_sync
 832                                                 <1 GPIO_B1 RK_FUNC_1 &pcfg_pull_none>,//cif_href
 833                                                 <1 GPIO_B2 RK_FUNC_1 &pcfg_pull_none>,//cif_clkin
 834                                                 <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout
 835                         };
 836
 837                         isp_dvp_d0d1: isp-dvp-d0d1 {
 838                                 rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0
 839                                                 <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>;//cif_data1
 840                         };
 841
 842                         isp_dvp_d10d11:isp_d10d11       {
 843                                 rockchip,pins = <1 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//cif_data10
 844                                                 <1 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;//cif_data11
 845                         };
 846
 847                         isp_dvp_d0d7: isp-dvp-d0d7 {
 848                                 rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0
 849                                                 <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>,//cif_data1
 850                                                 <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2
 851                                                 <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3
 852                                                 <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4
 853                                                 <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5
 854                                                 <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6
 855                                                 <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>;//cif_data7
 856                         };
 857
 858                         isp_shutter: isp-shutter {
 859                                 rockchip,pins = <3 GPIO_C3 RK_FUNC_2 &pcfg_pull_none>, //SHUTTEREN
 860                                                 <3 GPIO_C6 RK_FUNC_2 &pcfg_pull_none>;//SHUTTERTRIG
 861                         };
 862
 863                         isp_flash_trigger: isp-flash-trigger {
 864                                 rockchip,pins = <3 GPIO_C4 RK_FUNC_2 &pcfg_pull_none>; //ISP_FLASHTRIGOU
 865                         };
 866
 867                         isp_prelight: isp-prelight {
 868                                 rockchip,pins = <3 GPIO_C5 RK_FUNC_2 &pcfg_pull_none>;//ISP_PRELIGHTTRIG
 869                         };
 870
 871                         isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio {
 872                                 rockchip,pins = <3 GPIO_C4 RK_FUNC_GPIO &pcfg_pull_none>;//ISP_FLASHTRIGOU
 873                         };
 874                 };
 875
 876                 gps {
 877                         gps_mag: gps-mag {
 878                                 rockchip,pins = <3 GPIO_B6 RK_FUNC_2 &pcfg_pull_none>;
 879                         };
 880
 881                         gps_sig: gps-sig {
 882                                 rockchip,pins = <3 GPIO_B7 RK_FUNC_2 &pcfg_pull_none>;
 883
 884                         };
 885
 886                         gps_rfclk: gps-rfclk {
 887                                 rockchip,pins = <3 GPIO_C0 RK_FUNC_3 &pcfg_pull_none>;
 888                         };
 889                 };
 890
 891                 gmac {
 892                         mac_clk: mac-clk {
 893                                 rockchip,pins = <3 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>;
 894                         };
 895
 896                         mac_txpins: mac-txpins {
 897                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_1 &pcfg_pull_none>,//TXD0
 898                                                 <3 GPIO_B1 RK_FUNC_1 &pcfg_pull_none>,//TXD1
 899                                                 <3 GPIO_B2 RK_FUNC_1 &pcfg_pull_none>,//TXD2
 900                                                 <3 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//TXD3
 901                                                 <3 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>,//TXEN
 902                                                 <3 GPIO_D4 RK_FUNC_1 &pcfg_pull_none>;//TXCLK
 903                         };
 904
 905                         mac_rxpins: mac-rxpins {
 906                                 rockchip,pins = <3 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>,//RXD0
 907                                                 <3 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,//RXD1
 908                                                 <3 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>,//RXD2
 909                                                 <3 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>,//RXD3
 910                                                 <3 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>,//RXDV
 911                                                 <3 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>,//RXER
 912                                                 <3 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>,//RXCLK
 913                                                 <3 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>;//COL
 914                         };
 915
 916                         mac_crs: mac-crs {
 917                                 rockchip,pins = <3 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>; //CRS
 918                         };
 919
 920                         mac_mdpins: mac-mdpins {
 921                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_1 &pcfg_pull_none>,//MDIO
 922                                                 <3 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>;//MDC
 923                         };
 924                 };
 925
 926                 tsadc_pin {
 927                         tsadc_int: tsadc-int {
 928                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>;
 929                         };
 930                         tsadc_gpio: tsadc-gpio {
 931                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_none>;
 932                         };
 933                 };
 934         };
 935 };