arch/arm64/boot/dts/rk3368.dtsi

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/pinctrl/rockchip.h>
   6 #include <dt-bindings/pinctrl/rockchip-rk3288.h>
   7
   8 #include "skeleton.dtsi"
   9 #include "rk3368-clocks.dtsi"
  10
  11 / {
  12         compatible = "rockchip,rk3368";
  13
  14         interrupt-parent = <&gic>;
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 serial0 = &uart_bt;
  20                 serial1 = &uart_bb;
  21                 serial2 = &uart_dbg;
  22                 serial3 = &uart_gps;
  23                 serial4 = &uart_exp;
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 i2c3 = &i2c3;
  28                 i2c4 = &i2c4;
  29                 i2c5 = &i2c5;
  30                 spi0 = &spi0;
  31                 spi1 = &spi1;
  32                 spi2 = &spi2;
  33         };
  34
  35         cpus {
  36                 #address-cells = <2>;
  37                 #size-cells = <0>;
  38
  39                 cpu@0 {
  40                         device_type = "cpu";
  41                         compatible = "arm,cortex-a53","arm,armv8";
  42                         reg = <0x0 0x0>;
  43                 };
  44         };
  45
  46         chosen {
  47                 bootargs = "console=ttyS2 earlyprintk=uart8250-32bit,0xff690000";
  48         };
  49
  50         timer {
  51                 compatible = "arm,armv8-timer";
  52                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  53                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  54                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>,
  55                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
  56                 clock-frequency = <24000000>;
  57         };
  58
  59         memory@00000000 {
  60                 device_type = "memory";
  61                 reg = <0x0 0x00000000 0x0 0x20000000>;
  62         };
  63
  64         gic: interrupt-controller@ffb70000 {
  65                 compatible = "arm,cortex-a15-gic";
  66                 #interrupt-cells = <3>;
  67                 #address-cells = <0>;
  68                 interrupt-controller;
  69                 reg = <0x0 0xffb71000 0 0x1000>,
  70                       <0x0 0xffb72000 0 0x1000>;
  71         };
  72
  73         pmu_grf: syscon@ff738000 {
  74                 compatible = "rockchip,rk3388-pmu-grf", "syscon";
  75                 reg = <0x0 0xff738000 0x0 0x100>;
  76         };
  77
  78         sgrf: syscon@ff740000 {
  79                 compatible = "rockchip,rk3388-sgrf", "syscon";
  80                 reg = <0x0 0xff740000 0x0 0x1000>;
  81
  82         };
  83
  84         grf: syscon@ff770000 {
  85                 compatible = "rockchip,rk3388-grf", "syscon";
  86                 reg = <0x0 0xff770000 0x0 0x1000>;
  87         };
  88
  89         i2c0: i2c@ff650000 {
  90                 compatible = "rockchip,rk30-i2c";
  91                 reg = <0x0 0xff650000 0x0 0x1000>;
  92                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
  93                 #address-cells = <1>;
  94                 #size-cells = <0>;
  95                 pinctrl-names = "default", "gpio";
  96                 pinctrl-0 = <&i2c0_xfer>;
  97                 pinctrl-1 = <&i2c0_gpio>;
  98                 gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
  99                 //clocks = <&clk_gates10 2>;
 100                 rockchip,check-idle = <1>;
 101                 status = "disabled";
 102         };
 103
 104         i2c1: i2c@ff140000 {
 105                 compatible = "rockchip,rk30-i2c";
 106                 reg = <0x0 0xff140000 0x0 0x1000>;
 107                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110                 pinctrl-names = "default", "gpio";
 111                 pinctrl-0 = <&i2c1_xfer>;
 112                 pinctrl-1 = <&i2c1_gpio>;
 113                 gpios = <&gpio2 GPIO_C5 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C6 GPIO_ACTIVE_LOW>;
 114                 //clocks = <&clk_gates10 3>;
 115                 rockchip,check-idle = <1>;
 116                 status = "disabled";
 117         };
 118
 119         i2c2: i2c@ff660000 {
 120                 compatible = "rockchip,rk30-i2c";
 121                 reg = <0x0 0xff660000 0x0 0x1000>;
 122                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125                 pinctrl-names = "default", "gpio";
 126                 pinctrl-0 = <&i2c2_xfer>;
 127                 pinctrl-1 = <&i2c2_gpio>;
 128                 gpios = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
 129                 //clocks = <&clk_gates6 13>;
 130                 rockchip,check-idle = <1>;
 131                 status = "disabled";
 132         };
 133
 134         i2c3: i2c@ff150000 {
 135                 compatible = "rockchip,rk30-i2c";
 136                 reg = <0x0 0xff150000 0x0 0x1000>;
 137                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 138                 #address-cells = <1>;
 139                 #size-cells = <0>;
 140                 pinctrl-names = "default", "gpio";
 141                 pinctrl-0 = <&i2c3_xfer>;
 142                 pinctrl-1 = <&i2c3_gpio>;
 143                 gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio1 GPIO_C0 GPIO_ACTIVE_LOW>;
 144                 //clocks = <&clk_gates6 14>;
 145                 rockchip,check-idle = <1>;
 146                 status = "disabled";
 147         };
 148
 149         i2c4: i2c@ff160000 {
 150                 compatible = "rockchip,rk30-i2c";
 151                 reg = <0x0 0xff160000 0x0 0x1000>;
 152                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 pinctrl-names = "default", "gpio";
 156                 pinctrl-0 = <&i2c4_xfer>;
 157                 pinctrl-1 = <&i2c4_gpio>;
 158                 gpios = <&gpio3 GPIO_D0 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D1 GPIO_ACTIVE_LOW>;
 159                 //clocks = <&clk_gates6 15>;
 160                 rockchip,check-idle = <1>;
 161                 status = "disabled";
 162         };
 163
 164         i2c5: i2c@ff170000 {
 165                 compatible = "rockchip,rk30-i2c";
 166                 reg = <0x0 0xff170000 0x0 0x1000>;
 167                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 168                 #address-cells = <1>;
 169                 #size-cells = <0>;
 170                 pinctrl-names = "default", "gpio";
 171                 pinctrl-0 = <&i2c5_xfer>;
 172                 pinctrl-1 = <&i2c5_gpio>;
 173                 gpios = <&gpio3 GPIO_D2 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D3 GPIO_ACTIVE_LOW>;
 174                 //clocks = <&clk_gates7 0>;
 175                 rockchip,check-idle = <1>;
 176                 status = "disabled";
 177         };
 178
 179         uart_bt: serial@ff180000 {
 180                 compatible = "rockchip,serial";
 181                 reg = <0x0 0xff180000 0x0 0x100>;
 182                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 183                 clock-frequency = <24000000>;
 184                 clocks = <&xin24m>, <&xin24m>;
 185                 clock-names = "sclk_uart", "pclk_uart";
 186                 reg-shift = <2>;
 187                 reg-io-width = <4>;
 188                 //dmas = <&pdma1 1>, <&pdma1 2>;
 189                 //#dma-cells = <2>;
 190                 pinctrl-names = "default";
 191                 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
 192                 status = "disabled";
 193         };
 194
 195         uart_bb: serial@ff190000 {
 196                 compatible = "rockchip,serial";
 197                 reg = <0x0 0xff190000 0x0 0x100>;
 198                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 199                 clock-frequency = <24000000>;
 200                 clocks = <&xin24m>, <&xin24m>;
 201                 clock-names = "sclk_uart", "pclk_uart";
 202                 reg-shift = <2>;
 203                 reg-io-width = <4>;
 204                 //dmas = <&pdma1 3>, <&pdma1 4>;
 205                 //#dma-cells = <2>;
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
 208                 status = "disabled";
 209         };
 210
 211         uart_dbg: serial@ff690000 {
 212                 compatible = "rockchip,serial";
 213                 reg = <0x0 0xff690000 0x0 0x100>;
 214                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 215                 clock-frequency = <24000000>;
 216                 clocks = <&xin24m>, <&xin24m>;
 217                 clock-names = "sclk_uart", "pclk_uart";
 218                 reg-shift = <2>;
 219                 reg-io-width = <4>;
 220                 //dmas = <&pdma0 4>, <&pdma0 5>;
 221                 //#dma-cells = <2>;
 222                 pinctrl-names = "default";
 223                 pinctrl-0 = <&uart2_xfer>;
 224                 //status = "disabled";
 225         };
 226
 227         uart_gps: serial@ff1b0000 {
 228                 compatible = "rockchip,serial";
 229                 reg = <0x0 0xff1b0000 0x0 0x100>;
 230                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 231                 clock-frequency = <24000000>;
 232                 clocks = <&xin24m>, <&xin24m>;
 233                 clock-names = "sclk_uart", "pclk_uart";
 234                 current-speed = <115200>;
 235                 reg-shift = <2>;
 236                 reg-io-width = <4>;
 237                 //dmas = <&pdma1 7>, <&pdma1 8>;
 238                 //#dma-cells = <2>;
 239                 pinctrl-names = "default";
 240                 pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>;
 241                 status = "disabled";
 242         };
 243
 244         uart_exp: serial@ff1c0000 {
 245                 compatible = "rockchip,serial";
 246                 reg = <0x0 0xff1c0000 0x0 0x100>;
 247                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 248                 clock-frequency = <24000000>;
 249                 clocks = <&xin24m>, <&xin24m>;
 250                 clock-names = "sclk_uart", "pclk_uart";
 251                 reg-shift = <2>;
 252                 reg-io-width = <4>;
 253                 //dmas = <&pdma1 9>, <&pdma1 10>;
 254                 //#dma-cells = <2>;
 255                 pinctrl-names = "default";
 256                 pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
 257                 status = "disabled";
 258         };
 259
 260         spi0: spi@ff110000 {
 261                 compatible = "rockchip,rockchip-spi";
 262                 reg = <0x0 0xff110000 0x0 0x1000>;
 263                 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 264                 #address-cells = <1>;
 265                 #size-cells = <0>;
 266                 pinctrl-names = "default";
 267                 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;
 268                 rockchip,spi-src-clk = <0>;
 269                 num-cs = <2>;
 270                 //clocks =<&clk_spi0>, <&clk_gates6 4>;
 271                 //clock-names = "spi","pclk_spi0";
 272                 //dmas = <&pdma1 11>, <&pdma1 12>;
 273                 //#dma-cells = <2>;
 274                 //dma-names = "tx", "rx";
 275                 status = "disabled";
 276         };
 277
 278         spi1: spi@ff120000 {
 279                 compatible = "rockchip,rockchip-spi";
 280                 reg = <0x0 0xff120000 0x0 0x1000>;
 281                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 282                 #address-cells = <1>;
 283                 #size-cells = <0>;
 284                 pinctrl-names = "default";
 285                 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
 286                 rockchip,spi-src-clk = <1>;
 287                 num-cs = <1>;
 288                 //clocks = <&clk_spi1>, <&clk_gates6 5>;
 289                 //clock-names = "spi","pclk_spi1";
 290                 //dmas = <&pdma1 13>, <&pdma1 14>;
 291                 //#dma-cells = <2>;
 292                 //dma-names = "tx", "rx";
 293                 status = "disabled";
 294         };
 295
 296         spi2: spi@ff130000 {
 297                 compatible = "rockchip,rockchip-spi";
 298                 reg = <0x0 0xff130000 0x0 0x1000>;
 299                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 300                 #address-cells = <1>;
 301                 #size-cells = <0>;
 302                 pinctrl-names = "default";
 303                 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
 304                 rockchip,spi-src-clk = <2>;
 305                 num-cs = <2>;
 306                 //clocks = <&clk_spi2>, <&clk_gates6 6>;
 307                 //clock-names = "spi","pclk_spi2";
 308                 //dmas = <&pdma1 15>, <&pdma1 16>;
 309                 //#dma-cells = <2>;
 310                 //dma-names = "tx", "rx";
 311                 status = "disabled";
 312         };
 313
 314
 315         pinctrl: pinctrl {
 316                 compatible = "rockchip,rk3368-pinctrl";
 317                 rockchip,grf = <&grf>;
 318                 rockchip,pmu = <&pmu_grf>;
 319                 #address-cells = <2>;
 320                 #size-cells = <2>;
 321                 ranges;
 322
 323                 gpio0: gpio0@ff750000 {
 324                         compatible = "rockchip,gpio-bank";
 325                         reg =   <0x0 0xff750000 0x0 0x100>;
 326                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 327                         //clocks = <&clk_gates17 4>;
 328
 329                         gpio-controller;
 330                         #gpio-cells = <2>;
 331
 332                         interrupt-controller;
 333                         #interrupt-cells = <2>;
 334                 };
 335
 336                 gpio1: gpio1@ff780000 {
 337                         compatible = "rockchip,gpio-bank";
 338                         reg = <0x0 0xff780000 0x0 0x100>;
 339                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 340                         //clocks = <&clk_gates14 1>;
 341
 342                         gpio-controller;
 343                         #gpio-cells = <2>;
 344
 345                         interrupt-controller;
 346                         #interrupt-cells = <2>;
 347                 };
 348
 349                 gpio2: gpio2@ff790000 {
 350                         compatible = "rockchip,gpio-bank";
 351                         reg = <0x0 0xff790000 0x0 0x100>;
 352                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 353                         //clocks = <&clk_gates14 2>;
 354
 355                         gpio-controller;
 356                         #gpio-cells = <2>;
 357
 358                         interrupt-controller;
 359                         #interrupt-cells = <2>;
 360                 };
 361
 362                 gpio3: gpio3@ff7a0000 {
 363                         compatible = "rockchip,gpio-bank";
 364                         reg = <0x0 0xff7a0000 0x0 0x100>;
 365                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 366                         //clocks = <&clk_gates14 3>;
 367
 368                         gpio-controller;
 369                         #gpio-cells = <2>;
 370
 371                         interrupt-controller;
 372                         #interrupt-cells = <2>;
 373                 };
 374
 375                 pcfg_pull_up: pcfg-pull-up {
 376                         bias-pull-up;
 377                 };
 378
 379                 pcfg_pull_down: pcfg-pull-down {
 380                         bias-pull-down;
 381                 };
 382
 383                 pcfg_pull_none: pcfg-pull-none {
 384                         bias-disable;
 385                 };
 386
 387                 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
 388                         drive-strength = <8>;
 389                 };
 390
 391                 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
 392                         bias-pull-up;
 393                         drive-strength = <8>;
 394                 };
 395
 396                 pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
 397                         drive-strength = <4>;
 398                 };
 399
 400                 pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
 401                         bias-pull-up;
 402                         drive-strength = <4>;
 403                 };
 404
 405                 pcfg_output_high: pcfg-output-high {
 406                         output-high;
 407                 };
 408
 409                 pcfg_output_low: pcfg-output-low {
 410                         output-low;
 411                 };
 412
 413                 i2c0 {
 414                         i2c0_xfer: i2c0-xfer {
 415                                 rockchip,pins = <0 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,
 416                                                 <0 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>;
 417                         };
 418                         i2c0_gpio: i2c0-gpio {
 419                                 rockchip,pins = <0 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_none>,
 420                                                 <0 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_none>;
 421                         };
 422                 };
 423
 424                 i2c1 {
 425                         i2c1_xfer: i2c1-xfer {
 426                                 rockchip,pins = <2 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>,
 427                                                 <2 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>;
 428                         };
 429                         i2c1_gpio: i2c1-gpio {
 430                                 rockchip,pins = <2 GPIO_C5 RK_FUNC_GPIO &pcfg_pull_none>,
 431                                                 <2 GPIO_C6 RK_FUNC_GPIO &pcfg_pull_none>;
 432                         };
 433                 };
 434
 435                 i2c2 {
 436                         i2c2_xfer: i2c2-xfer {
 437                                 rockchip,pins = <3 GPIO_D7 RK_FUNC_2 &pcfg_pull_none>,
 438                                                 <0 GPIO_B1 RK_FUNC_2 &pcfg_pull_none>;
 439                         };
 440                         i2c2_gpio: i2c2-gpio {
 441                                 rockchip,pins = <3 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>,
 442                                                 <0 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_none>;
 443             };
 444                 };
 445
 446                 i2c3 {
 447                         i2c3_xfer: i2c3-xfer {
 448                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,
 449                                                 <1 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>;
 450                         };
 451                         i2c3_gpio: i2c3-gpio {
 452                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>,
 453                                                 <1 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>;
 454                         };
 455                 };
 456
 457                 i2c4 {
 458                         i2c4_xfer: i2c4-xfer {
 459                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_2 &pcfg_pull_none>,
 460                                                 <3 GPIO_D1 RK_FUNC_2 &pcfg_pull_none>;
 461                         };
 462                         i2c4_gpio: i2c4-gpio {
 463                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_GPIO &pcfg_pull_none>,
 464                                                 <3 GPIO_D1 RK_FUNC_GPIO &pcfg_pull_none>;
 465                         };
 466                 };
 467
 468                 i2c5 {
 469                         i2c5_xfer: i2c5-xfer {
 470                                 rockchip,pins = <3 GPIO_D2 RK_FUNC_2 &pcfg_pull_none>,
 471                                                 <3 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>;
 472                         };
 473                         i2c5_gpio: i2c5-gpio {
 474                                 rockchip,pins = <3 GPIO_D2 RK_FUNC_GPIO &pcfg_pull_none>,
 475                                                 <3 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>;
 476                         };
 477                 };
 478
 479                 uart0 {
 480                         uart0_xfer: uart0-xfer {
 481                                 rockchip,pins = <2 GPIO_D0 RK_FUNC_1 &pcfg_pull_up>,
 482                                                 <2 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>;
 483                         };
 484
 485                         uart0_cts: uart0-cts {
 486                                 rockchip,pins = <2 GPIO_D2 RK_FUNC_1 &pcfg_pull_none>;
 487                         };
 488
 489                         uart0_rts: uart0-rts {
 490                                 rockchip,pins = <2 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>;
 491                         };
 492
 493                         uart0_rts_gpio: uart0-rts-gpio {
 494                                 rockchip,pins = <2 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>;
 495                         };
 496                 };
 497
 498                 uart1 {
 499                         uart1_xfer: uart1-xfer {
 500                                 rockchip,pins = <0 GPIO_C4 RK_FUNC_3 &pcfg_pull_up>,
 501                                                 <0 GPIO_C5 RK_FUNC_3 &pcfg_pull_none>;
 502                         };
 503
 504                         uart1_cts: uart1-cts {
 505                                 rockchip,pins = <0 GPIO_C6 RK_FUNC_3 &pcfg_pull_none>;
 506                         };
 507
 508                         uart1_rts: uart1-rts {
 509                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_3 &pcfg_pull_none>;
 510                         };
 511                 };
 512
 513                 uart2 {
 514                         uart2_xfer: uart2-xfer {
 515                                 rockchip,pins = <2 GPIO_A6 RK_FUNC_2 &pcfg_pull_up>,
 516                                                 <2 GPIO_A5 RK_FUNC_2 &pcfg_pull_none>;
 517                         };
 518                 };
 519
 520                 uart3 {
 521                         uart3_xfer: uart3-xfer {
 522                                 rockchip,pins = <3 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>,
 523                                                 <3 GPIO_D6 RK_FUNC_2 &pcfg_pull_none>;
 524                         };
 525
 526                         uart3_cts: uart3-cts {
 527                                 rockchip,pins = <3 GPIO_C0 RK_FUNC_2 &pcfg_pull_none>;
 528                         };
 529
 530                         uart3_rts: uart3-rts {
 531                                 rockchip,pins = <3 GPIO_C1 RK_FUNC_2 &pcfg_pull_none>;
 532                         };
 533                 };
 534
 535                 uart4 {
 536                         uart4_xfer: uart4-xfer {
 537                                 rockchip,pins = <0 GPIO_D3 RK_FUNC_3 &pcfg_pull_up>,
 538                                                 <0 GPIO_D2 RK_FUNC_3 &pcfg_pull_none>;
 539                         };
 540
 541                         uart4_cts: uart4-cts {
 542                                 rockchip,pins = <0 GPIO_D0 RK_FUNC_3 &pcfg_pull_none>;
 543                         };
 544
 545                         uart4_rts: uart4-rts {
 546                                 rockchip,pins = <0 GPIO_D1 RK_FUNC_3 &pcfg_pull_none>;
 547                         };
 548                 };
 549
 550                 spi0 {
 551                         spi0_clk: spi0-clk {
 552                                 rockchip,pins = <1 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>;
 553                         };
 554                         spi0_cs0: spi0-cs0 {
 555                                 rockchip,pins = <1 GPIO_D0 RK_FUNC_3 &pcfg_pull_up>;
 556                         };
 557                         spi0_tx: spi0-tx {
 558                                 rockchip,pins = <1 GPIO_C7 RK_FUNC_3 &pcfg_pull_up>;
 559                         };
 560                         spi0_rx: spi0-rx {
 561                                 rockchip,pins = <1 GPIO_C6 RK_FUNC_3 &pcfg_pull_up>;
 562                         };
 563                         spi0_cs1: spi0-cs1 {
 564                                 rockchip,pins = <1 GPIO_D1 RK_FUNC_3 &pcfg_pull_up>;
 565                         };
 566                 };
 567
 568                 spi1 {
 569                         spi1_clk: spi1-clk {
 570                                 rockchip,pins = <1 GPIO_B6 RK_FUNC_2 &pcfg_pull_up>;
 571                         };
 572                         spi1_cs0: spi1-cs0 {
 573                                 rockchip,pins = <1 GPIO_B7 RK_FUNC_2 &pcfg_pull_up>;
 574                         };
 575                         spi1_rx: spi1-rx {
 576                                 rockchip,pins = <1 GPIO_C0 RK_FUNC_2 &pcfg_pull_up>;
 577                         };
 578                         spi1_tx: spi1-tx {
 579                                 rockchip,pins = <1 GPIO_C1 RK_FUNC_2 &pcfg_pull_up>;
 580                         };
 581                 };
 582
 583                 spi2 {
 584                         spi2_clk: spi2-clk {
 585                                 rockchip,pins = <0 GPIO_B4 RK_FUNC_2 &pcfg_pull_up>;
 586                         };
 587                         spi2_cs0: spi2-cs0 {
 588                                 rockchip,pins = <0 GPIO_B5 RK_FUNC_2 &pcfg_pull_up>;
 589                         };
 590                         spi2_rx: spi2-rx {
 591                                 rockchip,pins = <0 GPIO_B2 RK_FUNC_2 &pcfg_pull_up>;
 592                         };
 593                         spi2_tx: spi2-tx {
 594                                 rockchip,pins = <0 GPIO_B3 RK_FUNC_2 &pcfg_pull_up>;
 595                         };
 596                 };
 597
 598                 i2s {
 599                         i2s_mclk: i2s-mclk {
 600                                 rockchip,pins = <2 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>;
 601                         };
 602
 603                         i2s_sclk:i2s-sclk {
 604                                 rockchip,pins = <2 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>;
 605                         };
 606
 607                         i2s_lrckrx:i2s-lrckrx {
 608                                 rockchip,pins = <2 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>;
 609                         };
 610
 611                         i2s_lrcktx:i2s-lrcktx {
 612                                 rockchip,pins = <2 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>;
 613                         };
 614
 615                         i2s_sdi:i2s-sdi {
 616                                 rockchip,pins = <2 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;
 617                         };
 618
 619                         i2s_sdo0:i2s-sdo0 {
 620                                 rockchip,pins = <2 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>;
 621                         };
 622
 623                         i2s_sdo1:i2s-sdo1 {
 624                                 rockchip,pins = <2 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>;
 625                         };
 626
 627                         i2s_sdo2:i2s-sdo2 {
 628                                 rockchip,pins = <2 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>;
 629                         };
 630
 631                         i2s_sdo3:i2s-sdo3 {
 632                                 rockchip,pins = <2 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>;
 633                         };
 634
 635                         i2s_gpio: i2s-gpio {
 636                                 rockchip,pins = <2 GPIO_C4  RK_FUNC_GPIO &pcfg_pull_none>,
 637                                                 <2 GPIO_B4 RK_FUNC_GPIO &pcfg_pull_none>,
 638                                                 <2 GPIO_B5 RK_FUNC_GPIO &pcfg_pull_none>,
 639                                                 <2 GPIO_B6 RK_FUNC_GPIO &pcfg_pull_none>,
 640                                                 <2 GPIO_B7 RK_FUNC_GPIO &pcfg_pull_none>,
 641                                                 <2 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>,
 642                                                 <2 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>,
 643                                                 <2 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_none>,
 644                                                 <2 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_none>;
 645                         };
 646                 };
 647
 648                 spdif {
 649                         spdif_tx: spdif-tx {
 650                                 rockchip,pins = <2 GPIO_C7 RK_FUNC_1 &pcfg_pull_none>;
 651                         };
 652                 };
 653
 654                 sdmmc {
 655                         sdmmc_clk: sdmmc-clk {
 656                                 rockchip,pins = <2 GPIO_B1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
 657                         };
 658
 659                         sdmmc_cmd: sdmmc-cmd {
 660                                 rockchip,pins = <2 GPIO_B2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 661                         };
 662
 663                         sdmmc_dectn: sdmmc-dectn {
 664                                 rockchip,pins = <2 GPIO_B3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 665                         };
 666
 667                         sdmmc_bus1: sdmmc-bus1 {
 668                                 rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 669                         };
 670
 671                         sdmmc_bus4: sdmmc-bus4 {
 672                                 rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 673                                                 <2 GPIO_A6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 674                                                 <2 GPIO_A7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 675                                                 <2 GPIO_B0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 676                         };
 677
 678                         sdmmc_gpio: sdmmc-gpio {
 679                                 rockchip,pins = <2 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK
 680                                                 <2 GPIO_B2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD
 681                                                 <2 GPIO_B3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET
 682                                                 <2 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO
 683                                                 <2 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1
 684                                                 <2 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2
 685                                                 <2 GPIO_B0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3
 686                         };
 687                 };
 688
 689                 sdio0 {
 690                         sdio0_bus1: sdio0-bus1 {
 691                                 rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 692                         };
 693
 694                         sdio0_bus4: sdio0-bus4 {
 695                                 rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 696                                                 <2 GPIO_D5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 697                                                 <2 GPIO_D6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
 698                                                 <2 GPIO_D7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 699                         };
 700
 701                         sdio0_cmd: sdio0-cmd {
 702                                 rockchip,pins = <3 GPIO_A0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
 703                         };
 704
 705                         sdio0_clk: sdio0-clk {
 706                                 rockchip,pins = <3 GPIO_A1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
 707                         };
 708
 709                         sdio0_dectn: sdio0-dectn {
 710                                 rockchip,pins = <3 GPIO_A2 RK_FUNC_1 &pcfg_pull_up>;
 711                         };
 712
 713                         sdio0_wrprt: sdio0-wrprt {
 714                                 rockchip,pins = <3 GPIO_A3 RK_FUNC_1 &pcfg_pull_up>;
 715                         };
 716
 717                         sdio0_pwren: sdio0-pwren {
 718                                 rockchip,pins = <3 GPIO_A4 RK_FUNC_1 &pcfg_pull_up>;
 719                         };
 720
 721                         sdio0_bkpwr: sdio0-bkpwr {
 722                                 rockchip,pins = <3 GPIO_A5 RK_FUNC_1 &pcfg_pull_up>;
 723                         };
 724
 725                         sdio0_int: sdio0-int {
 726                                 rockchip,pins = <3 GPIO_A6 RK_FUNC_1 &pcfg_pull_up>;
 727                         };
 728
 729                         sdio0_gpio: sdio0-gpio {
 730                                 rockchip,pins = <3 GPIO_A0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD
 731                                                 <3 GPIO_A1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK
 732                                                 <3 GPIO_A2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET
 733                                                 <3 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//wrprt
 734                                                 <3 GPIO_A4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//PWREN
 735                                                 <3 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//BKPWR
 736                                                 <3 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//INTN
 737                                                 <2 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO
 738                                                 <2 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1
 739                                                 <2 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2
 740                                                 <2 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3
 741                         };
 742                 };
 743
 744                 emmc {
 745                         emmc_clk: emmc-clk {
 746                                 rockchip,pins = <2 GPIO_A4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
 747                         };
 748
 749                         emmc_cmd: emmc-cmd {
 750                                 rockchip,pins = <1 GPIO_D2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
 751                         };
 752
 753                         emmc_pwren: emmc-pwren {
 754                                 rockchip,pins = <1 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>;
 755                         };
 756
 757                         emmc_rstnout: emmc_rstnout {
 758                                 rockchip,pins = <2 GPIO_A3 RK_FUNC_2 &pcfg_pull_none>;
 759                         };
 760
 761                         emmc_bus1: emmc-bus1 {
 762                                 rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//DO
 763                         };
 764
 765                         emmc_bus4: emmc-bus4 {
 766                                 rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//DO
 767                                                 <1 GPIO_C3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D1
 768                                                 <1 GPIO_C4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D2
 769                                                 <1 GPIO_C5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//D3
 770                         };
 771                 };
 772
 773                 pwm0 {
 774                         pwm0_pin: pwm0-pin {
 775                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>;
 776                         };
 777
 778                         vop_pwm_pin:vop-pwm {
 779                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_3 &pcfg_pull_none>;
 780                         };
 781                 };
 782
 783                 pwm1 {
 784                         pwm1_pin: pwm1-pin {
 785                                 rockchip,pins = <0 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>;
 786                         };
 787                 };
 788
 789                 pwm3 {
 790                         pwm3_pin: pwm3-pin {
 791                                 rockchip,pins = <3 GPIO_D6 RK_FUNC_3 &pcfg_pull_none>;
 792                         };
 793                 };
 794
 795                 lcdc {
 796                         lcdc_lcdc: lcdc-lcdc {
 797                                 rockchip,pins = <0 GPIO_D7 RK_FUNC_1 &pcfg_pull_none>,//DCLK
 798                                                 <0 GPIO_D6 RK_FUNC_1 &pcfg_pull_none>,//DEN
 799                                                 <0 GPIO_D4 RK_FUNC_1 &pcfg_pull_none>,//HSYNC
 800                                                 <0 GPIO_D5 RK_FUNC_1 &pcfg_pull_none>;//VSYN
 801                         };
 802
 803                         lcdc_gpio: lcdc-gpio {
 804                                 rockchip,pins = <0 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>,//DCLK
 805                                                 <0 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_none>,//DEN
 806                                                 <0 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_none>,//HSYNC
 807                                                 <0 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_none>;//VSYN
 808                         };
 809                 };
 810
 811                 isp {
 812                         cif_clkout: cif-clkout {
 813                                 rockchip,pins = <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout
 814                         };
 815
 816                         isp_dvp_d2d9: isp-dvp-d2d9 {
 817                                 rockchip,pins = <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2
 818                                                 <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3
 819                                                 <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4
 820                                                 <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5
 821                                                 <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6
 822                                                 <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>,//cif_data7
 823                                                 <1 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,//cif_data8
 824                                                 <1 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>,//cif_data9
 825                                                 <1 GPIO_B0 RK_FUNC_1 &pcfg_pull_none>,//cif_sync
 826                                                 <1 GPIO_B1 RK_FUNC_1 &pcfg_pull_none>,//cif_href
 827                                                 <1 GPIO_B2 RK_FUNC_1 &pcfg_pull_none>,//cif_clkin
 828                                                 <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout
 829                         };
 830
 831                         isp_dvp_d0d1: isp-dvp-d0d1 {
 832                                 rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0
 833                                                 <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>;//cif_data1
 834                         };
 835
 836                         isp_dvp_d10d11:isp_d10d11       {
 837                                 rockchip,pins = <1 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//cif_data10
 838                                                 <1 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;//cif_data11
 839                         };
 840
 841                         isp_dvp_d0d7: isp-dvp-d0d7 {
 842                                 rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0
 843                                                 <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>,//cif_data1
 844                                                 <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2
 845                                                 <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3
 846                                                 <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4
 847                                                 <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5
 848                                                 <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6
 849                                                 <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>;//cif_data7
 850                         };
 851
 852                         isp_shutter: isp-shutter {
 853                                 rockchip,pins = <3 GPIO_C3 RK_FUNC_2 &pcfg_pull_none>, //SHUTTEREN
 854                                                 <3 GPIO_C6 RK_FUNC_2 &pcfg_pull_none>;//SHUTTERTRIG
 855                         };
 856
 857                         isp_flash_trigger: isp-flash-trigger {
 858                                 rockchip,pins = <3 GPIO_C4 RK_FUNC_2 &pcfg_pull_none>; //ISP_FLASHTRIGOU
 859                         };
 860
 861                         isp_prelight: isp-prelight {
 862                                 rockchip,pins = <3 GPIO_C5 RK_FUNC_2 &pcfg_pull_none>;//ISP_PRELIGHTTRIG
 863                         };
 864
 865                         isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio {
 866                                 rockchip,pins = <3 GPIO_C4 RK_FUNC_GPIO &pcfg_pull_none>;//ISP_FLASHTRIGOU
 867                         };
 868                 };
 869
 870                 gps {
 871                         gps_mag: gps-mag {
 872                                 rockchip,pins = <3 GPIO_B6 RK_FUNC_2 &pcfg_pull_none>;
 873                         };
 874
 875                         gps_sig: gps-sig {
 876                                 rockchip,pins = <3 GPIO_B7 RK_FUNC_2 &pcfg_pull_none>;
 877
 878                         };
 879
 880                         gps_rfclk: gps-rfclk {
 881                                 rockchip,pins = <3 GPIO_C0 RK_FUNC_3 &pcfg_pull_none>;
 882                         };
 883                 };
 884
 885                 gmac {
 886                         mac_clk: mac-clk {
 887                                 rockchip,pins = <3 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>;
 888                         };
 889
 890                         mac_txpins: mac-txpins {
 891                                 rockchip,pins = <3 GPIO_B0 RK_FUNC_1 &pcfg_pull_none>,//TXD0
 892                                                 <3 GPIO_B1 RK_FUNC_1 &pcfg_pull_none>,//TXD1
 893                                                 <3 GPIO_B2 RK_FUNC_1 &pcfg_pull_none>,//TXD2
 894                                                 <3 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//TXD3
 895                                                 <3 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>,//TXEN
 896                                                 <3 GPIO_D4 RK_FUNC_1 &pcfg_pull_none>;//TXCLK
 897                         };
 898
 899                         mac_rxpins: mac-rxpins {
 900                                 rockchip,pins = <3 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>,//RXD0
 901                                                 <3 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,//RXD1
 902                                                 <3 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>,//RXD2
 903                                                 <3 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>,//RXD3
 904                                                 <3 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>,//RXDV
 905                                                 <3 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>,//RXER
 906                                                 <3 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>,//RXCLK
 907                                                 <3 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>;//COL
 908                         };
 909
 910                         mac_crs: mac-crs {
 911                                 rockchip,pins = <3 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>; //CRS
 912                         };
 913
 914                         mac_mdpins: mac-mdpins {
 915                                 rockchip,pins = <3 GPIO_D0 RK_FUNC_1 &pcfg_pull_none>,//MDIO
 916                                                 <3 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>;//MDC
 917                         };
 918                 };
 919
 920                 tsadc_pin {
 921                         tsadc_int: tsadc-int {
 922                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>;
 923                         };
 924                         tsadc_gpio: tsadc-gpio {
 925                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_none>;
 926                         };
 927                 };
 928         };
 929 };