2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
46 #include "rk3366-android.dtsi"
49 model = "Rockchip SDK sheep board";
50 compatible = "rockchip,sheep", "rockchip,rk3366";
53 bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
56 fiq_debugger: fiq-debugger {
57 compatible = "rockchip,fiq-debugger";
58 rockchip,serial-id = <2>;
59 rockchip,wake-irq = <0>;
60 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
61 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
62 pinctrl-names = "default";
63 pinctrl-0 = <&uart2_t1_xfer>;
64 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>; /* signal irq */
67 backlight: backlight {
68 compatible = "pwm-backlight";
69 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
73 16 17 18 19 20 21 22 23
74 24 25 26 27 28 29 30 31
75 32 33 34 35 36 37 38 39
76 40 41 42 43 44 45 46 47
77 48 49 50 51 52 53 54 55
78 56 57 58 59 60 61 62 63
79 64 65 66 67 68 69 70 71
80 72 73 74 75 76 77 78 79
81 80 81 82 83 84 85 86 87
82 88 89 90 91 92 93 94 95
83 96 97 98 99 100 101 102 103
84 104 105 106 107 108 109 110 111
85 112 113 114 115 116 117 118 119
86 120 121 122 123 124 125 126 127
87 128 129 130 131 132 133 134 135
88 136 137 138 139 140 141 142 143
89 144 145 146 147 148 149 150 151
90 152 153 154 155 156 157 158 159
91 160 161 162 163 164 165 166 167
92 168 169 170 171 172 173 174 175
93 176 177 178 179 180 181 182 183
94 184 185 186 187 188 189 190 191
95 192 193 194 195 196 197 198 199
96 200 201 202 203 204 205 206 207
97 208 209 210 211 212 213 214 215
98 216 217 218 219 220 221 222 223
99 224 225 226 227 228 229 230 231
100 232 233 234 235 236 237 238 239
101 240 241 242 243 244 245 246 247
102 248 249 250 251 252 253 254 255>;
103 default-brightness-level = <200>;
104 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
107 dwc_control_usb: dwc-control-usb {
108 compatible = "rockchip,rk3368-dwc-control-usb";
109 rockchip,grf = <&grf>;
110 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
111 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
113 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
114 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
115 interrupt-names = "otg_id", "otg_bvalid",
116 "otg_linestate", "host0_linestate";
117 clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>;
118 clock-names = "sclk_otgphy0", "otg";
121 compatible = "inno,phy";
122 regbase = &dwc_control_usb;
123 rk_usb,bvalid = <0x49c 23 1>;
124 rk_usb,iddig = <0x49c 26 1>;
125 rk_usb,vdmsrcen = <0x718 12 1>;
126 rk_usb,vdpsrcen = <0x718 11 1>;
127 rk_usb,rdmpden = <0x718 10 1>;
128 rk_usb,idpsrcen = <0x718 9 1>;
129 rk_usb,idmsinken = <0x718 8 1>;
130 rk_usb,idpsinken = <0x718 7 1>;
131 rk_usb,dpattach = <0x498 31 1>;
132 rk_usb,cpdet = <0x498 30 1>;
133 rk_usb,dcpattach = <0x498 29 1>;
137 ext_gmac: external-gmac-clock {
138 compatible = "fixed-clock";
139 clock-frequency = <125000000>;
140 clock-output-names = "ext_gmac";
145 compatible = "rockchip,ion";
146 #address-cells = <1>;
150 reg = <0x00000000 0x02000000>;
158 compatible = "rockchip,rk3366-io-voltage-domain";
159 rockchip,grf = <&grf>;
161 lcdc-supply = <&vcc_io>;
162 dvpts-supply = <&vcc_18>;
163 wifibt-supply = <&vccio_wl>;
164 audio-supply = <&vcc_io>;
165 sdcard-supply = <&vccio_sd>;
166 tphdsor-supply = <&vcc_io>;
170 compatible = "i2c-gpio";
171 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */
172 <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */
173 i2c-gpio,delay-us = <2>; /* ~100 kHz */
174 #address-cells = <1>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&i2c2_gpio>;
182 compatible = "invensense,mpu6050";
183 pinctrl-names = "default";
184 pinctrl-0 = <&mpu6500_irq_gpio>;
186 irq-gpio = <&gpio5 18 IRQ_TYPE_EDGE_RISING>;
187 mpu-int_config = <0x10>;
188 mpu-level_shifter = <0>;
189 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
193 support-hw-poweroff = <0>;
199 compatible = "i2c-gpio";
200 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */
201 <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */
202 i2c-gpio,delay-us = <2>; /* ~100 kHz */
203 #address-cells = <1>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c4_gpio>;
210 compatible = "goodix,gt9xx";
212 touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>;
213 reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
217 tp-supply = <&vcc_tp>;
222 ramoops_mem: ramoops_mem {
223 reg = <0x0 0x100000 0x0 0x100000>;
224 reg-names = "ramoops_mem";
228 compatible = "ramoops";
229 record-size = <0x0 0x10000>;
230 console-size = <0x0 0x80000>;
231 ftrace-size = <0x0 0x10000>;
232 pmsg-size = <0x0 0x50000>;
233 memory-region = <&ramoops_mem>;
236 rk_key: rockchip-key {
237 compatible = "rockchip,key";
240 io-channels = <&saradc 1>;
245 rockchip,adc_value = <1>;
250 label = "volume down";
251 rockchip,adc_value = <170>;
255 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
264 rockchip,adc_value = <355>;
270 rockchip,adc_value = <746>;
276 rockchip,adc_value = <560>;
282 rockchip,adc_value = <450>;
287 compatible = "simple-audio-card";
288 simple-audio-card,format = "i2s";
289 simple-audio-card,name = "rockchip,rt5640-codec";
290 simple-audio-card,mclk-fs = <256>;
291 simple-audio-card,widgets =
292 "Microphone", "Mic Jack",
293 "Headphone", "Headphone Jack";
294 simple-audio-card,routing =
295 "Mic Jack", "MICBIAS1",
297 "Headphone Jack", "HPOL",
298 "Headphone Jack", "HPOR";
299 simple-audio-card,cpu {
300 sound-dai = <&i2s_8ch>;
302 simple-audio-card,codec {
303 sound-dai = <&rt5640>;
308 compatible = "simple-audio-card";
309 simple-audio-card,name = "rockchip,spdif";
310 simple-audio-card,cpu {
311 sound-dai = <&spdif>;
313 simple-audio-card,codec {
314 sound-dai = <&spdif_out>;
318 spdif_out: spdif-out {
319 compatible = "linux,spdif-dit";
320 #sound-dai-cells = <0>;
324 compatible = "regulator-fixed";
325 regulator-name = "vcc_sys";
328 regulator-min-microvolt = <3800000>;
329 regulator-max-microvolt = <3800000>;
332 vbus_host: vbus-host-regulator {
333 compatible = "regulator-fixed";
335 gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&host_vbus_drv>;
338 regulator-name = "vbus_host";
341 vcc_phy: vcc-phy-regulator {
342 compatible = "regulator-fixed";
344 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
345 pinctrl-names = "default";
346 pinctrl-0 = <ð_phy_pwr>;
347 regulator-name = "vcc_phy";
352 sdio_pwrseq: sdio-pwrseq {
353 compatible = "mmc-pwrseq-simple";
355 clock-names = "ext_clock";
356 pinctrl-names = "default";
357 pinctrl-0 = <&wifi_enable_h>;
360 * On the module itself this is one of these (depending
361 * on the actual card populated):
362 * - SDIO_RESET_L_WL_REG_ON
363 * - PDN (power down when low)
365 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */
369 compatible = "wlan-platdata";
370 rockchip,grf = <&grf>;
371 wifi_chip_type = "ap6335";
373 WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */
378 compatible = "bluetooth-platdata";
379 //wifi-bt-power-toggle;
380 uart_rts_gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* GPIO3_b3 */
381 pinctrl-names = "default","rts_gpio";
382 pinctrl-0 = <&uart0_rts>;
383 pinctrl-1 = <&uart0_rts_gpio>;
384 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
385 BT,reset_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
386 BT,wake_gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>; /* GPIO3_c2 */
387 BT,wake_host_irq = <&gpio3 21 GPIO_ACTIVE_HIGH>; /* GPIO3_c5 */
393 cpu-supply = <&syr827>;
397 cpu-supply = <&syr827>;
401 cpu-supply = <&syr827>;
405 cpu-supply = <&syr827>;
409 mali-supply = <&vdd_logic>;
414 phy-supply = <&vcc_phy>;
416 clock_in_out = "input";
417 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
418 snps,reset-active-low;
419 snps,reset-delays-us = <0 10000 50000>;
420 assigned-clocks = <&cru SCLK_MAC>;
421 assigned-clock-parents = <&ext_gmac>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&rgmii_pins>;
431 i2c-scl-rising-time-ns = <250>;
432 i2c-scl-falling-time-ns = <20>;
435 regulator-name = "vdd_arm";
436 compatible = "silergy,syr827";
439 regulator-compatible = "fan53555-reg";
440 regulator-min-microvolt = <712500>;
441 regulator-max-microvolt = <1500000>;
442 fcs,suspend-voltage-selector = <1>;
445 regulator-initial-state = <3>;
446 regulator-ramp-delay = <2000>;
447 regulator-state-mem {
448 regulator-off-in-suspend;
449 regulator-suspend-microvolt = <900000>;
454 compatible = "rockchip,rk818";
457 clock-output-names = "xin32k", "wifibt_32kin";
458 interrupt-parent = <&gpio0>;
459 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
460 pinctrl-names = "default";
461 pinctrl-0 = <&pmic_int_l>;
462 rockchip,system-power-controller;
466 vcc1-supply = <&vcc_sys>;
467 vcc2-supply = <&vcc_sys>;
468 vcc3-supply = <&vcc_sys>;
469 vcc4-supply = <&vcc_sys>;
470 vcc6-supply = <&vcc_sys>;
471 vcc7-supply = <&vcc_sys>;
472 vcc8-supply = <&vcc_sys>;
473 vcc9-supply = <&vcc_io>;
476 vdd_logic: DCDC_REG1 {
477 regulator-name = "vdd_logic";
480 regulator-min-microvolt = <750000>;
481 regulator-max-microvolt = <1450000>;
482 regulator-ramp-delay = <6001>;
483 regulator-state-mem {
484 regulator-on-in-suspend;
485 regulator-suspend-microvolt = <1000000>;
490 regulator-name = "vdd_gpu";
493 regulator-min-microvolt = <800000>;
494 regulator-max-microvolt = <1250000>;
495 regulator-ramp-delay = <6001>;
496 regulator-state-mem {
497 regulator-on-in-suspend;
498 regulator-suspend-microvolt = <1000000>;
503 regulator-name = "vcc_ddr";
506 regulator-state-mem {
507 regulator-on-in-suspend;
512 regulator-name = "vcc_io";
515 regulator-min-microvolt = <3300000>;
516 regulator-max-microvolt = <3300000>;
517 regulator-state-mem {
518 regulator-on-in-suspend;
519 regulator-suspend-microvolt = <3300000>;
523 vcca_codec: LDO_REG1 {
524 regulator-name = "vcca_codec";
527 regulator-min-microvolt = <3300000>;
528 regulator-max-microvolt = <3300000>;
529 regulator-state-mem {
530 regulator-on-in-suspend;
531 regulator-suspend-microvolt = <3300000>;
536 regulator-name = "vcc_tp";
539 regulator-min-microvolt = <3000000>;
540 regulator-max-microvolt = <3000000>;
541 regulator-state-mem {
542 regulator-on-in-suspend;
543 regulator-suspend-microvolt = <3000000>;
548 regulator-name = "vdd_10";
551 regulator-min-microvolt = <1000000>;
552 regulator-max-microvolt = <1000000>;
553 regulator-state-mem {
554 regulator-on-in-suspend;
555 regulator-suspend-microvolt = <1000000>;
559 vcc18_lcd: LDO_REG4 {
560 regulator-name = "vcc18_lcd";
563 regulator-min-microvolt = <1800000>;
564 regulator-max-microvolt = <1800000>;
565 regulator-state-mem {
566 regulator-on-in-suspend;
567 regulator-suspend-microvolt = <1800000>;
571 vccio_pmu: LDO_REG5 {
572 regulator-name = "vccio_pmu";
575 regulator-min-microvolt = <1800000>;
576 regulator-max-microvolt = <1800000>;
577 regulator-state-mem {
578 regulator-on-in-suspend;
579 regulator-suspend-microvolt = <1800000>;
583 vdd10_lcd: LDO_REG6 {
584 regulator-name = "vdd10_lcd";
587 regulator-min-microvolt = <1000000>;
588 regulator-max-microvolt = <1000000>;
589 regulator-state-mem {
590 regulator-on-in-suspend;
591 regulator-suspend-microvolt = <1000000>;
596 regulator-name = "vcc_18";
599 regulator-min-microvolt = <1800000>;
600 regulator-max-microvolt = <1800000>;
601 regulator-state-mem {
602 regulator-on-in-suspend;
603 regulator-suspend-microvolt = <1800000>;
608 regulator-name = "vccio_wl";
611 regulator-min-microvolt = <1800000>;
612 regulator-max-microvolt = <3300000>;
613 regulator-state-mem {
614 regulator-on-in-suspend;
615 regulator-suspend-microvolt = <3300000>;
620 regulator-name = "vccio_sd";
623 regulator-min-microvolt = <1800000>;
624 regulator-max-microvolt = <3300000>;
625 regulator-state-mem {
626 regulator-on-in-suspend;
627 regulator-suspend-microvolt = <3300000>;
632 regulator-name = "vcc_sd";
635 regulator-state-mem {
636 regulator-on-in-suspend;
642 compatible = "rk818-battery";
643 ocv_table = <3400 3650 3693 3707 3731 3749 3760
644 3770 3782 3796 3812 3829 3852 3882
645 3915 3951 3981 4047 4086 4132 4182>;
646 design_capacity = <7916>;
647 design_qmax = <8708>;
649 max_input_current = <2000>;
650 max_chrg_current = <1600>;
651 max_chrg_voltage = <4200>;
652 sleep_enter_current = <300>;
653 sleep_exit_current = <300>;
654 power_off_thresd = <3400>;
655 zero_algorithm_vol = <3850>;
656 fb_temperature = <105>;
658 max_soc_offset = <60>;
669 i2c-scl-rising-time-ns = <460>;
670 i2c-scl-falling-time-ns = <15>;
673 #sound-dai-cells = <0>;
674 compatible = "realtek,rt5640";
676 clocks = <&cru SCLK_I2S_8CH_OUT>;
677 clock-names = "mclk";
678 realtek,in1-differential;
684 rockchip,i2s-broken-burst-len;
685 rockchip,playback-channels = <8>;
686 rockchip,capture-channels = <2>;
687 #sound-dai-cells = <0>;
692 #sound-dai-cells = <0>;
699 compatible = "simple-panel-dsi";
701 backlight = <&backlight>;
702 enable-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
704 delay,prepare = <20>;
707 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
708 dsi,format = <MIPI_DSI_FMT_RGB888>;
712 native-mode = <&timing0>;
715 clock-frequency = <135000000>;
727 pixelclk-active = <0>;
750 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
752 rockchip,remote_wakeup;
753 rockchip,usb_irq_wakeup;
757 assigned-clocks = <&cru SCLK_USBPHY480M>;
758 assigned-clock-parents = <&u2phy>;
767 clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>;
768 clock-names = "usbphy_480m", "otg";
769 resets = <&cru SRST_USBOTG_AHB>,
770 <&cru SRST_USBOTG_PHY>,
771 <&cru SRST_USBOTG_CON>;
772 reset-names = "otg_ahb", "otg_phy", "otg_controller";
773 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
774 rockchip,usb-mode = <0>;
779 phy-supply = <&vbus_host>;
784 mpu6500_irq_gpio: mpu6500-irq-gpio {
785 rockchip,pins = <5 18 RK_FUNC_GPIO &pcfg_pull_none>;
790 pmic_int_l: pmic-int-l {
791 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
796 wifi_enable_h: wifienable-h {
797 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
802 uart0_rts_gpio: uart0-rts-gpios {
803 rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_none>;
817 clock-frequency = <100000000>;
818 clock-freq-min-max = <400000 100000000>;
825 pinctrl-names = "default";
826 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
831 status = "okay"; /* enable both for emmc and nand */
835 clock-frequency = <37500000>;
836 clock-freq-min-max = <400000 37500000>;
841 card-detect-delay = <200>;
844 pinctrl-names = "default";
845 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
850 clock-frequency = <37500000>;
851 clock-freq-min-max = <200000 37500000>;
857 keep-power-in-suspend;
858 mmc-pwrseq = <&sdio_pwrseq>;
861 pinctrl-names = "default";
862 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
877 pinctrl-0 = <&uart0_xfer &uart0_cts>;