2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000 clk_ignore_unused";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 backlight: backlight {
69 compatible = "pwm-backlight";
70 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
74 16 17 18 19 20 21 22 23
75 24 25 26 27 28 29 30 31
76 32 33 34 35 36 37 38 39
77 40 41 42 43 44 45 46 47
78 48 49 50 51 52 53 54 55
79 56 57 58 59 60 61 62 63
80 64 65 66 67 68 69 70 71
81 72 73 74 75 76 77 78 79
82 80 81 82 83 84 85 86 87
83 88 89 90 91 92 93 94 95
84 96 97 98 99 100 101 102 103
85 104 105 106 107 108 109 110 111
86 112 113 114 115 116 117 118 119
87 120 121 122 123 124 125 126 127
88 128 129 130 131 132 133 134 135
89 136 137 138 139 140 141 142 143
90 144 145 146 147 148 149 150 151
91 152 153 154 155 156 157 158 159
92 160 161 162 163 164 165 166 167
93 168 169 170 171 172 173 174 175
94 176 177 178 179 180 181 182 183
95 184 185 186 187 188 189 190 191
96 192 193 194 195 196 197 198 199
97 200 201 202 203 204 205 206 207
98 208 209 210 211 212 213 214 215
99 216 217 218 219 220 221 222 223
100 224 225 226 227 228 229 230 231
101 232 233 234 235 236 237 238 239
102 240 241 242 243 244 245 246 247
103 248 249 250 251 252 253 254 255>;
104 default-brightness-level = <200>;
105 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
108 rk_key: rockchip-key {
109 compatible = "rockchip,key";
112 io-channels = <&saradc 1>;
117 rockchip,adc_value = <1>;
122 label = "volume down";
123 rockchip,adc_value = <170>;
127 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
136 rockchip,adc_value = <355>;
142 rockchip,adc_value = <746>;
148 rockchip,adc_value = <560>;
154 rockchip,adc_value = <450>;
159 compatible = "simple-audio-card";
160 simple-audio-card,format = "i2s";
161 simple-audio-card,name = "rockchip,rt5640-codec";
162 simple-audio-card,mclk-fs = <256>;
163 simple-audio-card,widgets =
164 "Microphone", "Mic Jack",
165 "Headphone", "Headphone Jack";
166 simple-audio-card,routing =
167 "Mic Jack", "MICBIAS1",
169 "Headphone Jack", "HPOL",
170 "Headphone Jack", "HPOR";
171 simple-audio-card,cpu {
172 sound-dai = <&i2s_8ch>;
174 simple-audio-card,codec {
175 sound-dai = <&rt5640>;
180 compatible = "simple-audio-card";
181 simple-audio-card,name = "rockchip,spdif";
182 simple-audio-card,cpu {
183 sound-dai = <&spdif>;
185 simple-audio-card,codec {
186 sound-dai = <&spdif_out>;
190 spdif_out: spdif-out {
191 compatible = "linux,spdif-dit";
192 #sound-dai-cells = <0>;
196 compatible = "regulator-fixed";
197 regulator-name = "vcc_sys";
200 regulator-min-microvolt = <3800000>;
201 regulator-max-microvolt = <3800000>;
204 ext_gmac: external-gmac-clock {
205 compatible = "fixed-clock";
206 clock-frequency = <125000000>;
207 clock-output-names = "ext_gmac";
211 vcc_phy: vcc-phy-regulator {
212 compatible = "regulator-fixed";
214 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
215 pinctrl-names = "default";
216 pinctrl-0 = <ð_phy_pwr>;
217 regulator-name = "vcc_phy";
223 compatible = "rockchip,rk3366-io-voltage-domain";
224 rockchip,grf = <&grf>;
226 lcdc-supply = <&vcc_io>;
227 dvpts-supply = <&vcc_18>;
228 wifibt-supply = <&vccio_wl>;
229 audio-supply = <&vcc_io>;
230 sdcard-supply = <&vccio_sd>;
231 tphdsor-supply = <&vcc_io>;
234 dwc_control_usb: dwc-control-usb {
235 compatible = "rockchip,rk3368-dwc-control-usb";
236 rockchip,grf = <&grf>;
237 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
238 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
241 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
242 interrupt-names = "otg_id", "otg_bvalid",
243 "otg_linestate", "host0_linestate";
244 clocks = <&cru SCLK_USBPHY480M>;
245 clock-names = "usbphy_480m";
248 compatible = "inno,phy";
249 regbase = &dwc_control_usb;
250 rk_usb,bvalid = <0x49c 23 1>;
251 rk_usb,iddig = <0x49c 26 1>;
252 rk_usb,vdmsrcen = <0x718 12 1>;
253 rk_usb,vdpsrcen = <0x718 11 1>;
254 rk_usb,rdmpden = <0x718 10 1>;
255 rk_usb,idpsrcen = <0x718 9 1>;
256 rk_usb,idmsinken = <0x718 8 1>;
257 rk_usb,idpsinken = <0x718 7 1>;
258 rk_usb,dpattach = <0x498 31 1>;
259 rk_usb,cpdet = <0x498 30 1>;
260 rk_usb,dcpattach = <0x498 29 1>;
265 compatible = "i2c-gpio";
266 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */
267 <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */
268 i2c-gpio,delay-us = <2>; /* ~100 kHz */
269 #address-cells = <1>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&i2c2_gpio>;
277 compatible = "i2c-gpio";
278 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */
279 <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */
280 i2c-gpio,delay-us = <2>; /* ~100 kHz */
281 #address-cells = <1>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&i2c4_gpio>;
288 compatible = "goodix,gt9xx";
290 touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>;
291 reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
295 tp-supply = <&vcc_tp>;
300 sdio_pwrseq: sdio-pwrseq {
301 compatible = "mmc-pwrseq-simple";
303 clock-names = "ext_clock";
304 pinctrl-names = "default";
305 pinctrl-0 = <&wifi_enable_h>;
308 * On the module itself this is one of these (depending
309 * on the actual card populated):
310 * - SDIO_RESET_L_WL_REG_ON
311 * - PDN (power down when low)
313 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */
317 compatible = "wlan-platdata";
318 rockchip,grf = <&grf>;
319 wifi_chip_type = "ap6335";
321 WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */
326 compatible = "bluetooth-platdata";
327 //wifi-bt-power-toggle;
328 uart_rts_gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* GPIO3_b3 */
329 pinctrl-names = "default","rts_gpio";
330 pinctrl-0 = <&uart0_rts>;
331 pinctrl-1 = <&uart0_rts_gpio>;
332 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
333 BT,reset_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */
334 BT,wake_gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>; /* GPIO3_c2 */
335 BT,wake_host_irq = <&gpio3 21 GPIO_ACTIVE_HIGH>; /* GPIO3_c5 */
341 status = "okay"; /* enable both for emmc and nand */
345 clock-frequency = <100000000>;
346 clock-freq-min-max = <400000 100000000>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
359 clock-frequency = <37500000>;
360 clock-freq-min-max = <400000 37500000>;
365 card-detect-delay = <200>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
374 clock-frequency = <37500000>;
375 clock-freq-min-max = <200000 37500000>;
381 keep-power-in-suspend;
382 mmc-pwrseq = <&sdio_pwrseq>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
393 pinctrl-0 = <&uart0_xfer &uart0_cts>;
402 i2c-scl-rising-time-ns = <250>;
403 i2c-scl-falling-time-ns = <20>;
406 regulator-name = "vdd_arm";
407 compatible = "silergy,syr827";
410 regulator-compatible = "fan53555-reg";
411 regulator-min-microvolt = <712500>;
412 regulator-max-microvolt = <1500000>;
413 fcs,suspend-voltage-selector = <1>;
416 regulator-initial-state = <3>;
417 regulator-ramp-delay = <2000>;
418 regulator-state-mem {
419 regulator-off-in-suspend;
420 regulator-suspend-microvolt = <900000>;
425 compatible = "rockchip,rk818";
428 clock-output-names = "xin32k", "wifibt_32kin";
429 interrupt-parent = <&gpio0>;
430 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pmic_int_l>;
433 rockchip,system-power-controller;
437 vcc1-supply = <&vcc_sys>;
438 vcc2-supply = <&vcc_sys>;
439 vcc3-supply = <&vcc_sys>;
440 vcc4-supply = <&vcc_sys>;
441 vcc6-supply = <&vcc_sys>;
442 vcc7-supply = <&vcc_sys>;
443 vcc8-supply = <&vcc_sys>;
444 vcc9-supply = <&vcc_io>;
447 vdd_logic: DCDC_REG1 {
448 regulator-name = "vdd_logic";
451 regulator-min-microvolt = <750000>;
452 regulator-max-microvolt = <1450000>;
453 regulator-ramp-delay = <6001>;
454 regulator-state-mem {
455 regulator-on-in-suspend;
456 regulator-suspend-microvolt = <1000000>;
461 regulator-name = "vdd_gpu";
464 regulator-min-microvolt = <800000>;
465 regulator-max-microvolt = <1250000>;
466 regulator-ramp-delay = <6001>;
467 regulator-state-mem {
468 regulator-on-in-suspend;
469 regulator-suspend-microvolt = <1000000>;
474 regulator-name = "vcc_ddr";
477 regulator-state-mem {
478 regulator-on-in-suspend;
483 regulator-name = "vcc_io";
486 regulator-min-microvolt = <3300000>;
487 regulator-max-microvolt = <3300000>;
488 regulator-state-mem {
489 regulator-on-in-suspend;
490 regulator-suspend-microvolt = <3300000>;
494 vcca_codec: LDO_REG1 {
495 regulator-name = "vcca_codec";
498 regulator-min-microvolt = <3300000>;
499 regulator-max-microvolt = <3300000>;
500 regulator-state-mem {
501 regulator-on-in-suspend;
502 regulator-suspend-microvolt = <3300000>;
507 regulator-name = "vcc_tp";
510 regulator-min-microvolt = <3000000>;
511 regulator-max-microvolt = <3000000>;
512 regulator-state-mem {
513 regulator-on-in-suspend;
514 regulator-suspend-microvolt = <3000000>;
519 regulator-name = "vdd_10";
522 regulator-min-microvolt = <1000000>;
523 regulator-max-microvolt = <1000000>;
524 regulator-state-mem {
525 regulator-on-in-suspend;
526 regulator-suspend-microvolt = <1000000>;
530 vcc18_lcd: LDO_REG4 {
531 regulator-name = "vcc18_lcd";
534 regulator-min-microvolt = <1800000>;
535 regulator-max-microvolt = <1800000>;
536 regulator-state-mem {
537 regulator-on-in-suspend;
538 regulator-suspend-microvolt = <1800000>;
542 vccio_pmu: LDO_REG5 {
543 regulator-name = "vccio_pmu";
546 regulator-min-microvolt = <1800000>;
547 regulator-max-microvolt = <1800000>;
548 regulator-state-mem {
549 regulator-on-in-suspend;
550 regulator-suspend-microvolt = <1800000>;
554 vdd10_lcd: LDO_REG6 {
555 regulator-name = "vdd10_lcd";
558 regulator-min-microvolt = <1000000>;
559 regulator-max-microvolt = <1000000>;
560 regulator-state-mem {
561 regulator-on-in-suspend;
562 regulator-suspend-microvolt = <1000000>;
567 regulator-name = "vcc_18";
570 regulator-min-microvolt = <1800000>;
571 regulator-max-microvolt = <1800000>;
572 regulator-state-mem {
573 regulator-on-in-suspend;
574 regulator-suspend-microvolt = <1800000>;
579 regulator-name = "vccio_wl";
582 regulator-min-microvolt = <1800000>;
583 regulator-max-microvolt = <3300000>;
584 regulator-state-mem {
585 regulator-on-in-suspend;
586 regulator-suspend-microvolt = <3300000>;
591 regulator-name = "vccio_sd";
594 regulator-min-microvolt = <1800000>;
595 regulator-max-microvolt = <3300000>;
596 regulator-state-mem {
597 regulator-on-in-suspend;
598 regulator-suspend-microvolt = <3300000>;
603 regulator-name = "vcc_sd";
606 regulator-state-mem {
607 regulator-on-in-suspend;
616 i2c-scl-rising-time-ns = <460>;
617 i2c-scl-falling-time-ns = <15>;
620 #sound-dai-cells = <0>;
621 compatible = "realtek,rt5640";
623 clocks = <&cru SCLK_I2S_8CH_OUT>;
624 clock-names = "mclk";
625 realtek,in1-differential;
631 rockchip,i2s-broken-burst-len;
632 rockchip,playback-channels = <8>;
633 rockchip,capture-channels = <2>;
634 #sound-dai-cells = <0>;
639 #sound-dai-cells = <0>;
656 rockchip,disp-mode = <DUAL>;
657 rockchip,uboot-logo-on = <0>;
662 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
663 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
667 pinctrl-names = "lcdc", "sleep";
668 pinctrl-0 = <&lcdc_lcdc>;
669 pinctrl-1 = <&lcdc_gpio>;
679 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
681 <148500000 0 0 17 18 18 18>,
682 <297000000 1 1 17 14 14 14>,
683 <594000000 1 1 16 5 5 5>;
688 rockchip,prop = <EXTEND>;
689 rockchip,mirror = <NO_MIRROR>;
690 rockchip,cabc_mode = <0>;
691 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
724 rockchip,prop = <PRMRY>;
725 backlight = <&backlight>;
726 rockchip,mirror = <NO_MIRROR>;
727 rockchip,cabc_mode = <0>;
728 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
729 power_ctr: power_ctr {
730 rockchip,debug = <0>;
732 rockchip,power_type = <GPIO>;
733 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
734 rockchip,delay = <10>;
738 rockchip,power_type = <GPIO>;
739 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
740 rockchip,delay = <10>;
743 /* lcd_rst: lcd-rst {
744 * rockchip,power_type = <GPIO>;
745 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
746 * rockchip,delay = <5>;
758 pmic_int_l: pmic-int-l {
759 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
764 wifi_enable_h: wifienable-h {
765 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
770 uart0_rts_gpio: uart0-rts-gpios {
771 rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_none>;
777 phy-supply = <&vcc_phy>;
779 clock_in_out = "input";
780 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
781 snps,reset-active-low;
782 snps,reset-delays-us = <0 10000 50000>;
783 assigned-clocks = <&cru SCLK_MAC>;
784 assigned-clock-parents = <&ext_gmac>;
785 pinctrl-names = "default";
786 pinctrl-0 = <&rgmii_pins>;
793 host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
794 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
796 rockchip,remote_wakeup;
797 rockchip,usb_irq_wakeup;
809 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
810 clock-names = "sclk_otgphy0", "otg";
811 resets = <&cru SRST_USBOTG_AHB>,
812 <&cru SRST_USBOTG_PHY>,
813 <&cru SRST_USBOTG_CON>;
814 reset-names = "otg_ahb", "otg_phy", "otg_controller";
815 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
816 rockchip,usb-mode = <0>;
817 assigned-clocks = <&cru SCLK_USBPHY480M>;
818 assigned-clock-parents = <&usbphy0>;
827 cpu-supply = <&syr827>;
831 mali-supply = <&vdd_logic>;