2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000 clk_ignore_unused";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 backlight: backlight {
69 compatible = "pwm-backlight";
70 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
74 16 17 18 19 20 21 22 23
75 24 25 26 27 28 29 30 31
76 32 33 34 35 36 37 38 39
77 40 41 42 43 44 45 46 47
78 48 49 50 51 52 53 54 55
79 56 57 58 59 60 61 62 63
80 64 65 66 67 68 69 70 71
81 72 73 74 75 76 77 78 79
82 80 81 82 83 84 85 86 87
83 88 89 90 91 92 93 94 95
84 96 97 98 99 100 101 102 103
85 104 105 106 107 108 109 110 111
86 112 113 114 115 116 117 118 119
87 120 121 122 123 124 125 126 127
88 128 129 130 131 132 133 134 135
89 136 137 138 139 140 141 142 143
90 144 145 146 147 148 149 150 151
91 152 153 154 155 156 157 158 159
92 160 161 162 163 164 165 166 167
93 168 169 170 171 172 173 174 175
94 176 177 178 179 180 181 182 183
95 184 185 186 187 188 189 190 191
96 192 193 194 195 196 197 198 199
97 200 201 202 203 204 205 206 207
98 208 209 210 211 212 213 214 215
99 216 217 218 219 220 221 222 223
100 224 225 226 227 228 229 230 231
101 232 233 234 235 236 237 238 239
102 240 241 242 243 244 245 246 247
103 248 249 250 251 252 253 254 255>;
104 default-brightness-level = <200>;
105 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
108 rk_key: rockchip-key {
109 compatible = "rockchip,key";
112 io-channels = <&saradc 1>;
117 rockchip,adc_value = <1>;
122 label = "volume down";
123 rockchip,adc_value = <170>;
127 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
136 rockchip,adc_value = <355>;
142 rockchip,adc_value = <746>;
148 rockchip,adc_value = <560>;
154 rockchip,adc_value = <450>;
159 compatible = "simple-audio-card";
160 simple-audio-card,format = "i2s";
161 simple-audio-card,name = "rockchip,rt5640-codec";
162 simple-audio-card,mclk-fs = <256>;
163 simple-audio-card,widgets =
164 "Microphone", "Mic Jack",
165 "Headphone", "Headphone Jack";
166 simple-audio-card,routing =
167 "Mic Jack", "MICBIAS1",
169 "Headphone Jack", "HPOL",
170 "Headphone Jack", "HPOR";
171 simple-audio-card,cpu {
172 sound-dai = <&i2s_8ch>;
174 simple-audio-card,codec {
175 sound-dai = <&rt5640>;
180 compatible = "regulator-fixed";
181 regulator-name = "vcc_sys";
184 regulator-min-microvolt = <3800000>;
185 regulator-max-microvolt = <3800000>;
188 ext_gmac: external-gmac-clock {
189 compatible = "fixed-clock";
190 clock-frequency = <125000000>;
191 clock-output-names = "ext_gmac";
195 vcc_phy: vcc-phy-regulator {
196 compatible = "regulator-fixed";
198 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
199 pinctrl-names = "default";
200 pinctrl-0 = <ð_phy_pwr>;
201 regulator-name = "vcc_phy";
207 compatible = "rockchip,rk3366-io-voltage-domain";
208 rockchip,grf = <&grf>;
210 lcdc-supply = <&vcc_io>;
211 dvpts-supply = <&vcc_18>;
212 wifibt-supply = <&vccio_wl>;
213 audio-supply = <&vcc_io>;
214 sdcard-supply = <&vccio_sd>;
215 tphdsor-supply = <&vcc_io>;
218 dwc_control_usb: dwc-control-usb {
219 compatible = "rockchip,rk3368-dwc-control-usb";
220 rockchip,grf = <&grf>;
221 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
222 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
226 interrupt-names = "otg_id", "otg_bvalid",
227 "otg_linestate", "host0_linestate";
228 clocks = <&cru SCLK_USBPHY480M>;
229 clock-names = "usbphy_480m";
232 compatible = "inno,phy";
233 regbase = &dwc_control_usb;
234 rk_usb,bvalid = <0x49c 23 1>;
235 rk_usb,iddig = <0x49c 26 1>;
236 rk_usb,vdmsrcen = <0x718 12 1>;
237 rk_usb,vdpsrcen = <0x718 11 1>;
238 rk_usb,rdmpden = <0x718 10 1>;
239 rk_usb,idpsrcen = <0x718 9 1>;
240 rk_usb,idmsinken = <0x718 8 1>;
241 rk_usb,idpsinken = <0x718 7 1>;
242 rk_usb,dpattach = <0x498 31 1>;
243 rk_usb,cpdet = <0x498 30 1>;
244 rk_usb,dcpattach = <0x498 29 1>;
250 clock-frequency = <100000000>;
251 clock-freq-min-max = <400000 100000000>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
264 clock-frequency = <37500000>;
265 clock-freq-min-max = <400000 37500000>;
270 card-detect-delay = <200>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
279 clock-frequency = <50000000>;
280 clock-freq-min-max = <200000 50000000>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
299 regulator-name = "vdd_arm";
300 compatible = "silergy,syr827";
303 regulator-compatible = "fan53555-reg";
304 regulator-min-microvolt = <712500>;
305 regulator-max-microvolt = <1500000>;
306 fcs,suspend-voltage-selector = <1>;
309 regulator-initial-state = <3>;
310 regulator-state-mem {
311 regulator-on-in-suspend;
312 regulator-suspend-microvolt = <900000>;
317 compatible = "rockchip,rk818";
320 clock-output-names = "xin32k", "wifibt_32kin";
321 interrupt-parent = <&gpio0>;
322 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&pmic_int_l>;
325 rockchip,system-power-controller;
329 vcc1-supply = <&vcc_sys>;
330 vcc2-supply = <&vcc_sys>;
331 vcc3-supply = <&vcc_sys>;
332 vcc4-supply = <&vcc_sys>;
333 vcc6-supply = <&vcc_sys>;
334 vcc7-supply = <&vcc_sys>;
335 vcc8-supply = <&vcc_sys>;
336 vcc9-supply = <&vcc_io>;
339 vdd_logic: DCDC_REG1 {
340 regulator-name = "vdd_logic";
343 regulator-min-microvolt = <750000>;
344 regulator-max-microvolt = <1450000>;
345 regulator-ramp-delay = <6001>;
346 regulator-state-mem {
347 regulator-on-in-suspend;
348 regulator-suspend-microvolt = <1000000>;
353 regulator-name = "vdd_gpu";
356 regulator-min-microvolt = <800000>;
357 regulator-max-microvolt = <1250000>;
358 regulator-ramp-delay = <6001>;
359 regulator-state-mem {
360 regulator-on-in-suspend;
361 regulator-suspend-microvolt = <1000000>;
366 regulator-name = "vcc_ddr";
369 regulator-state-mem {
370 regulator-on-in-suspend;
375 regulator-name = "vcc_io";
378 regulator-min-microvolt = <3300000>;
379 regulator-max-microvolt = <3300000>;
380 regulator-state-mem {
381 regulator-on-in-suspend;
382 regulator-suspend-microvolt = <3300000>;
386 vcca_codec: LDO_REG1 {
387 regulator-name = "vcca_codec";
390 regulator-min-microvolt = <3300000>;
391 regulator-max-microvolt = <3300000>;
392 regulator-state-mem {
393 regulator-on-in-suspend;
394 regulator-suspend-microvolt = <3300000>;
399 regulator-name = "vcc_tp";
402 regulator-min-microvolt = <3000000>;
403 regulator-max-microvolt = <3000000>;
404 regulator-state-mem {
405 regulator-on-in-suspend;
406 regulator-suspend-microvolt = <3000000>;
411 regulator-name = "vdd_10";
414 regulator-min-microvolt = <1000000>;
415 regulator-max-microvolt = <1000000>;
416 regulator-state-mem {
417 regulator-on-in-suspend;
418 regulator-suspend-microvolt = <1000000>;
422 vcc18_lcd: LDO_REG4 {
423 regulator-name = "vcc18_lcd";
426 regulator-min-microvolt = <1800000>;
427 regulator-max-microvolt = <1800000>;
428 regulator-state-mem {
429 regulator-on-in-suspend;
430 regulator-suspend-microvolt = <1800000>;
434 vccio_pmu: LDO_REG5 {
435 regulator-name = "vccio_pmu";
438 regulator-min-microvolt = <1800000>;
439 regulator-max-microvolt = <1800000>;
440 regulator-state-mem {
441 regulator-on-in-suspend;
442 regulator-suspend-microvolt = <1800000>;
446 vdd10_lcd: LDO_REG6 {
447 regulator-name = "vdd10_lcd";
450 regulator-min-microvolt = <1000000>;
451 regulator-max-microvolt = <1000000>;
452 regulator-state-mem {
453 regulator-on-in-suspend;
454 regulator-suspend-microvolt = <1000000>;
459 regulator-name = "vcc_18";
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <1800000>;
464 regulator-state-mem {
465 regulator-on-in-suspend;
466 regulator-suspend-microvolt = <1800000>;
471 regulator-name = "vccio_wl";
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <3300000>;
476 regulator-state-mem {
477 regulator-on-in-suspend;
478 regulator-suspend-microvolt = <3300000>;
483 regulator-name = "vccio_sd";
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <3300000>;
488 regulator-state-mem {
489 regulator-on-in-suspend;
490 regulator-suspend-microvolt = <3300000>;
495 regulator-name = "vcc_sd";
498 regulator-state-mem {
499 regulator-on-in-suspend;
510 #sound-dai-cells = <0>;
511 compatible = "realtek,rt5640";
513 clocks = <&cru SCLK_I2S_8CH_OUT>;
514 clock-names = "mclk";
515 realtek,in1-differential;
521 rockchip,i2s-broken-burst-len;
522 rockchip,playback-channels = <8>;
523 rockchip,capture-channels = <2>;
524 #sound-dai-cells = <0>;
537 rockchip,disp-mode = <DUAL>;
538 rockchip,uboot-logo-on = <0>;
543 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
544 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
548 pinctrl-names = "lcdc", "sleep";
549 pinctrl-0 = <&lcdc_lcdc>;
550 pinctrl-1 = <&lcdc_gpio>;
560 rockchip,prop = <EXTEND>;
561 rockchip,mirror = <NO_MIRROR>;
562 rockchip,cabc_mode = <0>;
563 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
572 rockchip,prop = <PRMRY>;
573 backlight = <&backlight>;
574 rockchip,mirror = <NO_MIRROR>;
575 rockchip,cabc_mode = <0>;
576 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
577 power_ctr: power_ctr {
578 rockchip,debug = <0>;
580 rockchip,power_type = <GPIO>;
581 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
582 rockchip,delay = <10>;
586 rockchip,power_type = <GPIO>;
587 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
588 rockchip,delay = <10>;
591 /* lcd_rst: lcd-rst {
592 * rockchip,power_type = <GPIO>;
593 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
594 * rockchip,delay = <5>;
606 pmic_int_l: pmic-int-l {
607 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
613 phy-supply = <&vcc_phy>;
615 clock_in_out = "input";
616 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
617 snps,reset-active-low;
618 snps,reset-delays-us = <0 10000 50000>;
619 assigned-clocks = <&cru SCLK_MAC>;
620 assigned-clock-parents = <&ext_gmac>;
621 pinctrl-names = "default";
622 pinctrl-0 = <&rgmii_pins>;
629 host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
630 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
632 rockchip,remote_wakeup;
633 rockchip,usb_irq_wakeup;
637 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
638 clock-names = "sclk_otgphy0", "otg";
639 resets = <&cru SRST_USBOTG_AHB>,
640 <&cru SRST_USBOTG_PHY>,
641 <&cru SRST_USBOTG_CON>;
642 reset-names = "otg_ahb", "otg_phy", "otg_controller";
643 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
644 rockchip,usb-mode = <0>;
649 cpu-supply = <&syr827>;