2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3368.dtsi"
46 #include "rk3368-android.dtsi"
49 model = "Rockchip rk3368 p9 board";
50 compatible = "rockchip,p9", "rockchip,rk3368";
53 compatible = "simple-audio-card";
54 simple-audio-card,format = "i2s";
55 simple-audio-card,name = "rockchip,es8316-codec";
56 simple-audio-card,mclk-fs = <256>;
57 simple-audio-card,widgets =
58 "Microphone", "Mic Jack",
59 "Headphone", "Headphone Jack";
60 simple-audio-card,routing =
61 "Mic Jack", "MICBIAS1",
63 "Headphone Jack", "HPOL",
64 "Headphone Jack", "HPOR";
65 simple-audio-card,cpu {
66 sound-dai = <&i2s_8ch>;
68 simple-audio-card,codec {
69 sound-dai = <&es8316>;
73 sdio_pwrseq: sdio-pwrseq {
74 compatible = "mmc-pwrseq-simple";
76 clock-names = "ext_clock";
77 pinctrl-names = "default";
78 pinctrl-0 = <&wifi_enable_h>;
81 * On the module itself this is one of these (depending
82 * on the actual card populated):
83 * - SDIO_RESET_L_WL_REG_ON
84 * - PDN (power down when low)
86 reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
89 backlight: backlight {
90 compatible = "pwm-backlight";
91 pwms = <&pwm0 0 25000 0>;
95 16 17 18 19 20 21 22 23
96 24 25 26 27 28 29 30 31
97 32 33 34 35 36 37 38 39
98 40 41 42 43 44 45 46 47
99 48 49 50 51 52 53 54 55
100 56 57 58 59 60 61 62 63
101 64 65 66 67 68 69 70 71
102 72 73 74 75 76 77 78 79
103 80 81 82 83 84 85 86 87
104 88 89 90 91 92 93 94 95
105 96 97 98 99 100 101 102 103
106 104 105 106 107 108 109 110 111
107 112 113 114 115 116 117 118 119
108 120 121 122 123 124 125 126 127
109 128 129 130 131 132 133 134 135
110 136 137 138 139 140 141 142 143
111 144 145 146 147 148 149 150 151
112 152 153 154 155 156 157 158 159
113 160 161 162 163 164 165 166 167
114 168 169 170 171 172 173 174 175
115 176 177 178 179 180 181 182 183
116 184 185 186 187 188 189 190 191
117 192 193 194 195 196 197 198 199
118 200 201 202 203 204 205 206 207
119 208 209 210 211 212 213 214 215
120 216 217 218 219 220 221 222 223
121 224 225 226 227 228 229 230 231
122 232 233 234 235 236 237 238 239
123 240 241 242 243 244 245 246 247
124 248 249 250 251 252 253 254 255>;
125 default-brightness-level = <200>;
126 enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
129 rk_key: rockchip-key {
130 compatible = "rockchip,key";
133 io-channels = <&saradc 1>;
138 rockchip,adc_value = <1>;
143 label = "volume down";
144 rockchip,adc_value = <170>;
148 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
156 compatible = "wlan-platdata";
157 rockchip,grf = <&grf>;
158 /* wifi_chip_type - wifi chip define
159 * ap6210, ap6330, ap6335
160 * rtl8188eu, rtl8723bs, rtl8723bu
163 wifi_chip_type = "ap6210";
164 sdio_vref = <1800>; //1800mv or 3300mv
165 WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>;
170 compatible = "bluetooth-platdata";
172 clock-names = "ext_clock";
173 uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
174 pinctrl-names = "default","rts_gpio";
175 pinctrl-0 = <&uart0_rts>;
176 pinctrl-1 = <&uart0_rts_gpio>;
178 //BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
179 BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
180 BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
181 BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>;
187 compatible = "regulator-fixed";
188 regulator-name = "vcc_sys";
191 regulator-min-microvolt = <3800000>;
192 regulator-max-microvolt = <3800000>;
196 compatible = "regulator-fixed";
198 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&host_vbus_drv>;
201 regulator-name = "vcc_host";
207 cpu-supply = <&syr827>;
211 cpu-supply = <&syr827>;
215 cpu-supply = <&syr827>;
219 cpu-supply = <&syr827>;
223 cpu-supply = <&syr827>;
227 cpu-supply = <&syr827>;
231 cpu-supply = <&syr827>;
235 cpu-supply = <&syr827>;
239 logic-supply = <&vdd_logic>;
244 rockchip,sleep-mode-config = <
247 | RKPM_SLP_PMU_PLLS_PWRDN
248 | RKPM_SLP_PMU_PMUALIVE_32K
249 | RKPM_SLP_SFT_PLLS_DEEP
250 | RKPM_SLP_PMU_DIS_OSC
251 | RKPM_SLP_SFT_PD_NBSCUS
254 rockchip,wakeup-config = <
258 | RKPM_CLUSTER_L_WKUP_EN
271 pinctrl-names = "default";
272 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
277 clock-frequency = <37500000>;
278 clock-freq-min-max = <400000 37500000>;
282 card-detect-delay = <200>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
291 clock-frequency = <50000000>;
292 clock-freq-min-max = <200000 50000000>;
298 keep-power-in-suspend;
299 mmc-pwrseq = <&sdio_pwrseq>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
312 compatible = "silergy,syr827";
315 regulator-compatible = "fan53555-reg";
316 regulator-name = "vdd_arm";
317 regulator-min-microvolt = <712500>;
318 regulator-max-microvolt = <1500000>;
319 regulator-ramp-delay = <1000>;
320 fcs,suspend-voltage-selector = <1>;
321 pinctrl-0 = <&vsel_gpio>;
322 vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
325 regulator-initial-state = <3>;
326 regulator-state-mem {
327 regulator-off-in-suspend;
328 regulator-suspend-microvolt = <900000>;
333 compatible = "rockchip,rk818";
336 clock-output-names = "xin32k", "wifibt_32kin";
337 interrupt-parent = <&gpio0>;
338 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&pmic_int_l>;
341 rockchip,system-power-controller;
345 vcc1-supply = <&vcc_sys>;
346 vcc2-supply = <&vcc_sys>;
347 vcc3-supply = <&vcc_sys>;
348 vcc4-supply = <&vcc_sys>;
349 vcc6-supply = <&vcc_sys>;
350 vcc7-supply = <&vcc_sys>;
351 vcc8-supply = <&vcc_sys>;
352 vcc9-supply = <&vcc_io>;
355 vdd_logic: DCDC_REG1 {
356 regulator-name = "vdd_logic";
359 regulator-min-microvolt = <750000>;
360 regulator-max-microvolt = <1450000>;
361 regulator-ramp-delay = <6001>;
362 regulator-state-mem {
363 regulator-on-in-suspend;
364 regulator-suspend-microvolt = <1000000>;
369 regulator-name = "vdd_gpu";
372 regulator-min-microvolt = <800000>;
373 regulator-max-microvolt = <1250000>;
374 regulator-ramp-delay = <6001>;
375 regulator-state-mem {
376 regulator-on-in-suspend;
377 regulator-suspend-microvolt = <1000000>;
384 regulator-name = "vcc_ddr";
385 regulator-state-mem {
386 regulator-on-in-suspend;
393 regulator-min-microvolt = <3300000>;
394 regulator-max-microvolt = <3300000>;
395 regulator-name = "vcc_io";
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 regulator-suspend-microvolt = <3300000>;
402 vcca_codec: LDO_REG1 {
405 regulator-min-microvolt = <3300000>;
406 regulator-max-microvolt = <3300000>;
407 regulator-name = "vcca_codec";
408 regulator-state-mem {
409 regulator-on-in-suspend;
410 regulator-suspend-microvolt = <3300000>;
416 regulator-min-microvolt = <3000000>;
417 regulator-max-microvolt = <3000000>;
418 regulator-name = "vcc_tp";
419 regulator-state-mem {
420 regulator-off-in-suspend;
427 regulator-min-microvolt = <1000000>;
428 regulator-max-microvolt = <1000000>;
429 regulator-name = "vdd_10";
430 regulator-state-mem {
431 regulator-on-in-suspend;
432 regulator-suspend-microvolt = <1000000>;
436 vcc18_lcd: LDO_REG4 {
439 regulator-min-microvolt = <1800000>;
440 regulator-max-microvolt = <1800000>;
441 regulator-name = "vcc18_lcd";
442 regulator-state-mem {
443 regulator-on-in-suspend;
444 regulator-suspend-microvolt = <1800000>;
448 vccio_pmu: LDO_REG5 {
451 regulator-min-microvolt = <1800000>;
452 regulator-max-microvolt = <1800000>;
453 regulator-name = "vccio_pmu";
454 regulator-state-mem {
455 regulator-on-in-suspend;
456 regulator-suspend-microvolt = <1800000>;
460 vdd10_lcd: LDO_REG6 {
463 regulator-min-microvolt = <1000000>;
464 regulator-max-microvolt = <1000000>;
465 regulator-name = "vdd10_lcd";
466 regulator-state-mem {
467 regulator-on-in-suspend;
468 regulator-suspend-microvolt = <1000000>;
475 regulator-min-microvolt = <1800000>;
476 regulator-max-microvolt = <1800000>;
477 regulator-name = "vcc_18";
478 regulator-state-mem {
479 regulator-on-in-suspend;
480 regulator-suspend-microvolt = <1800000>;
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <1800000>;
489 regulator-name = "vccio_wl";
490 regulator-state-mem {
491 regulator-on-in-suspend;
492 regulator-suspend-microvolt = <1800000>;
499 regulator-min-microvolt = <1800000>;
500 regulator-max-microvolt = <3300000>;
501 regulator-name = "vccio_sd";
502 regulator-state-mem {
503 regulator-on-in-suspend;
504 regulator-suspend-microvolt = <3300000>;
511 regulator-name = "vcc_sd";
512 regulator-state-mem {
513 regulator-on-in-suspend;
517 boost_otg: DCDC_BOOST {
518 regulator-name = "boost_otg";
521 regulator-min-microvolt = <5000000>;
522 regulator-max-microvolt = <5000000>;
523 regulator-state-mem {
524 regulator-on-in-suspend;
525 regulator-suspend-microvolt = <5000000>;
529 otg_switch: OTG_SWITCH {
530 regulator-name = "otg_switch";
535 compatible = "rk818-battery";
536 pinctrl-names = "default";
537 pinctrl-0 = <&dc_irq_gpio>;
539 3400 3650 3693 3707 3731 3749 3760
540 3770 3782 3796 3812 3829 3852 3882
541 3915 3951 3981 4047 4086 4132 4182>;
542 design_capacity = <8650>;
543 design_qmax = <8800>;
545 max_input_current = <2000>;
546 max_chrg_current = <1800>;
547 max_chrg_voltage = <4200>;
548 sleep_enter_current = <600>;
549 sleep_exit_current = <600>;
550 power_off_thresd = <3400>;
551 zero_algorithm_vol = <3850>;
552 fb_temperature = <115>;
554 max_soc_offset = <60>;
559 support_usb_adp = <1>;
560 support_dc_adp = <1>;
561 dc_det_gpio = <&gpio0 17 GPIO_ACTIVE_LOW>;
571 #sound-dai-cells = <0>;
572 compatible = "everest,es8316";
574 clocks = <&cru SCLK_I2S_8CH_OUT>;
575 clock-names = "mclk";
576 spk-con-gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
577 hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>;
585 compatible = "goodix,gt9xx";
587 touch-gpio = <&gpio0 12 IRQ_TYPE_LEVEL_LOW>;
588 reset-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
593 tp-supply = <&vcc_tp>;
605 compatible = "invensense,mpu6500";
606 pinctrl-names = "default";
607 pinctrl-0 = <&mpu6500_irq_gpio>;
609 irq-gpio = <&gpio3 14 IRQ_TYPE_EDGE_RISING>;
610 mpu-int_config = <0x10>;
611 mpu-level_shifter = <0>;
612 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
616 support-hw-poweroff = <1>;
623 rockchip,i2s-broken-burst-len;
624 rockchip,playback-channels = <8>;
625 rockchip,capture-channels = <2>;
626 #sound-dai-cells = <0>;
632 dvp-supply = <&vcc_18>;
633 audio-supply = <&vcc_io>;
634 gpio30-supply = <&vcc_io>;
635 gpio1830-supply = <&vcc_io>;
636 sdcard-supply = <&vccio_sd>;
637 wifi-supply = <&vccio_wl>;
643 pmu-supply = <&vccio_pmu>;
644 vop-supply = <&vccio_pmu>;
652 pinctrl-names = "default";
653 pinctrl-0 = <&uart0_xfer &uart0_cts>;
664 u2phy_host: host-port {
665 phy-supply = <&vcc_host>;
682 compatible = "simple-panel-dsi";
684 backlight = <&backlight>;
685 enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
687 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
688 dsi,format = <MIPI_DSI_FMT_RGB888>;
691 prepare-delay-ms = <120>;
692 enable-delay-ms = <200>;
695 native-mode = <&timing0>;
698 clock-frequency = <145000000>;
724 tsadc-supply = <&syr827>;
730 pmic_int_l: pmic-int-l {
731 rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO &pcfg_pull_up>;
733 vsel_gpio: vsel-gpio {
734 rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_pull_down>;
739 mpu6500_irq_gpio: mpu6500-irq-gpio {
740 rockchip,pins = <3 14 RK_FUNC_GPIO &pcfg_pull_none>;
745 dc_irq_gpio: dc-irq-gpio {
746 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_up>;
751 wifi_enable_h: wifi-enable-h {
752 rockchip,pins = <3 4 RK_FUNC_GPIO &pcfg_pull_none>;
757 host_vbus_drv: host-vbus-drv {
758 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_none>;
763 uart0_rts_gpio: uart0-rts-gpio {
764 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;