2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/display/drm_mipi_dsi.h>
44 #include <dt-bindings/display/media-bus-format.h>
45 #include "rk3399-vop-clk-set.dtsi"
48 compatible = "rockchip,android", "rockchip,rk3399";
51 bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1";
55 compatible = "rockchip,cpuinfo";
56 nvmem-cells = <&efuse_id>;
57 nvmem-cell-names = "id";
60 ramoops_mem: ramoops_mem {
61 reg = <0x0 0x110000 0x0 0xf0000>;
62 reg-names = "ramoops_mem";
66 compatible = "ramoops";
67 record-size = <0x0 0x20000>;
68 console-size = <0x0 0x80000>;
69 ftrace-size = <0x0 0x00000>;
70 pmsg-size = <0x0 0x50000>;
71 memory-region = <&ramoops_mem>;
74 fiq_debugger: fiq-debugger {
75 compatible = "rockchip,fiq-debugger";
76 rockchip,serial-id = <2>;
77 rockchip,signal-irq = <182>;
78 rockchip,wake-irq = <0>;
79 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
80 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
81 pinctrl-names = "default";
82 pinctrl-0 = <&uart2c_xfer>;
90 drm_logo: drm-logo@00000000 {
91 compatible = "rockchip,drm-logo";
92 reg = <0x0 0x0 0x0 0x0>;
96 rk_key: rockchip-key {
97 compatible = "rockchip,key";
100 io-channels = <&saradc 1>;
105 rockchip,adc_value = <1>;
110 label = "volume down";
111 rockchip,adc_value = <170>;
115 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
124 rockchip,adc_value = <746>;
130 rockchip,adc_value = <355>;
136 rockchip,adc_value = <560>;
142 rockchip,adc_value = <450>;
147 compatible = "rockchip,rga2";
149 reg = <0x0 0xff680000 0x0 0x1000>;
150 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
151 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
152 clock-names = "aclk_rga", "hclk_rga", "clk_rga";
153 power-domains = <&power RK3399_PD_RGA>;
159 compatible = "rockchip,rk3399-isp", "rockchip,isp";
160 reg = <0x0 0xff910000 0x0 0x4000>;
161 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
163 <&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>,
164 <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru SCLK_MIPIDPHY_REF>,
165 <&cru ACLK_ISP0_NOC>, <&cru ACLK_ISP0_WRAPPER>,
166 <&cru HCLK_ISP0_NOC>, <&cru HCLK_ISP0_WRAPPER>,
167 <&cru SCLK_ISP0>, <&cru SCLK_DPHY_RX0_CFG>;
169 "clk_cif_out", "clk_cif_pll",
170 "pclk_dphytxrx", "pclk_dphy_ref",
171 "aclk_isp0_noc", "aclk_isp0_wrapper",
172 "hclk_isp0_noc", "hclk_isp0_wrapper",
173 "clk_isp0", "pclk_dphyrx";
175 "cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
176 "isp_mipi_fl_prefl", "isp_flash_as_gpio",
177 "isp_flash_as_trigger_out";
178 pinctrl-0 = <&cif_clkout>;
179 pinctrl-1 = <&isp_dvp_d0d7>;
180 pinctrl-2 = <&cif_clkout>;
181 pinctrl-3 = <&isp_prelight>;
182 pinctrl-4 = <&isp_flash_trigger_as_gpio>;
183 pinctrl-5 = <&isp_flash_trigger>;
184 rockchip,isp,mipiphy = <2>;
185 rockchip,isp,cifphy = <1>;
186 rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
187 rockchip,grf = <&grf>;
188 rockchip,cru = <&cru>;
189 rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
190 rockchip,isp,iommu-enable = <1>;
191 power-domains = <&power RK3399_PD_ISP0>;
192 iommus = <&isp0_mmu>;
197 compatible = "rockchip,rk3399-isp", "rockchip,isp";
198 reg = <0x0 0xff920000 0x0 0x4000>;
199 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
201 <&cru ACLK_ISP1_NOC>, <&cru ACLK_ISP1_WRAPPER>,
202 <&cru HCLK_ISP1_NOC>, <&cru HCLK_ISP1_WRAPPER>,
203 <&cru SCLK_ISP1>, <&cru SCLK_CIF_OUT>,
204 <&cru SCLK_CIF_OUT>, <&cru SCLK_DPHY_TX1RX1_CFG>,
205 <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_ISP1_WRAPPER>,
206 <&cru SCLK_DPHY_RX0_CFG>, <&cru PCLK_MIPI_DSI1>,
207 <&cru SCLK_MIPIDPHY_CFG>;
209 "aclk_isp1_noc", "aclk_isp1_wrapper",
210 "hclk_isp1_noc", "hclk_isp1_wrapper",
211 "clk_isp1", "clk_cif_out",
212 "clk_cif_pll", "pclk_dphytxrx",
213 "pclk_dphy_ref", "pclk_isp1",
214 "pclk_dphyrx", "pclk_mipi_dsi",
217 "cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
218 "isp_mipi_fl_prefl", "isp_flash_as_gpio",
219 "isp_flash_as_trigger_out";
220 pinctrl-0 = <&cif_clkout>;
221 pinctrl-1 = <&isp_dvp_d0d7>;
222 pinctrl-2 = <&cif_clkout>;
223 pinctrl-3 = <&isp_prelight>;
224 pinctrl-4 = <&isp_flash_trigger_as_gpio>;
225 pinctrl-5 = <&isp_flash_trigger>;
226 rockchip,isp,mipiphy = <2>;
227 rockchip,isp,cifphy = <1>;
228 rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
229 rockchip,grf = <&grf>;
230 rockchip,cru = <&cru>;
231 rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
232 rockchip,isp,iommu-enable = <1>;
233 power-domains = <&power RK3399_PD_ISP1>;
234 iommus = <&isp1_mmu>;
239 compatible = "rockchip,uboot-charge";
240 rockchip,uboot-charge-on = <1>;
241 rockchip,android-charge-on = <0>;
244 hdmi_dp_sound: hdmi-dp-sound {
246 compatible = "rockchip,rk3399-hdmi-dp";
247 rockchip,cpu = <&i2s2>;
248 rockchip,codec = <&hdmi>, <&cdn_dp>;
269 #address-cells = <1>;
271 #sound-dai-cells = <0>;
272 ddc-i2c-scl-high-time-ns = <9625>;
273 ddc-i2c-scl-low-time-ns = <10000>;
280 ports = <&vopb_out>, <&vopl_out>;
281 memory-region = <&drm_logo>;
283 route_hdmi: route-hdmi {
285 logo,uboot = "logo.bmp";
286 logo,kernel = "logo_kernel.bmp";
287 logo,mode = "fullscreen";
288 charge_logo,mode = "center";
289 connect = <&vopb_out_hdmi>;
292 route_mipi: route-mipi {
294 logo,uboot = "logo.bmp";
295 logo,kernel = "logo_kernel.bmp";
296 logo,mode = "fullscreen";
297 charge_logo,mode = "center";
298 connect = <&vopb_out_mipi>;
301 route_edp: route-edp {
303 logo,uboot = "logo.bmp";
304 logo,kernel = "logo_kernel.bmp";
305 logo,mode = "fullscreen";
306 charge_logo,mode = "center";
307 connect = <&vopb_out_edp>;
313 #sound-dai-cells = <0>;
314 rockchip,bclk-fs = <128>;
339 cif_clkout: cif-clkout {
342 <2 11 RK_FUNC_3 &pcfg_pull_none>;
345 isp_dvp_d0d7: isp-dvp-d0d7 {
348 <2 0 RK_FUNC_3 &pcfg_pull_none>,
350 <2 1 RK_FUNC_3 &pcfg_pull_none>,
352 <2 2 RK_FUNC_3 &pcfg_pull_none>,
354 <2 3 RK_FUNC_3 &pcfg_pull_none>,
356 <2 4 RK_FUNC_3 &pcfg_pull_none>,
358 <2 5 RK_FUNC_3 &pcfg_pull_none>,
360 <2 6 RK_FUNC_3 &pcfg_pull_none>,
362 <2 7 RK_FUNC_3 &pcfg_pull_none>,
364 <2 8 RK_FUNC_3 &pcfg_pull_none>,
366 <2 9 RK_FUNC_3 &pcfg_pull_none>,
368 <2 10 RK_FUNC_3 &pcfg_pull_none>;
371 isp_shutter: isp-shutter {
374 <1 1 RK_FUNC_1 &pcfg_pull_none>,
376 <1 0 RK_FUNC_1 &pcfg_pull_none>;
379 isp_flash_trigger: isp-flash-trigger {
381 rockchip,pins = <1 3 RK_FUNC_1 &pcfg_pull_none>;
384 isp_prelight: isp-prelight {
386 rockchip,pins = <1 4 RK_FUNC_1 &pcfg_pull_none>;
389 isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio {
392 <1 3 RK_FUNC_GPIO &pcfg_pull_none>;