2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/pwm/pwm.h>
43 #include <dt-bindings/input/input.h>
44 #include "rk3399.dtsi"
45 #include "rk3399-android.dtsi"
46 #include "rk3399-opp.dtsi"
49 compatible = "rockchip,rk3399-box","rockchip,rk3399";
51 vcc1v8_s0: vcc1v8-s0 {
52 compatible = "regulator-fixed";
53 regulator-name = "vcc1v8_s0";
54 regulator-min-microvolt = <1800000>;
55 regulator-max-microvolt = <1800000>;
60 compatible = "regulator-fixed";
61 regulator-name = "vcc_sys";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
67 vcc_phy: vcc-phy-regulator {
68 compatible = "regulator-fixed";
69 regulator-name = "vcc_phy";
74 vcc3v3_sys: vcc3v3-sys {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc3v3_sys";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
80 vin-supply = <&vcc_sys>;
83 vcc5v0_host: vcc5v0-host-regulator {
84 compatible = "regulator-fixed";
86 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&host_vbus_drv>;
89 regulator-name = "vcc5v0_host";
94 compatible = "pwm-regulator";
95 pwms = <&pwm2 0 25000 0>;
96 regulator-name = "vdd_log";
97 regulator-min-microvolt = <800000>;
98 regulator-max-microvolt = <1400000>;
102 /* for rockchip boot on */
103 rockchip,pwm_id= <2>;
104 rockchip,pwm_voltage = <900000>;
106 vin-supply = <&vcc_sys>;
109 clkin_gmac: external-gmac-clock {
110 compatible = "fixed-clock";
111 clock-frequency = <125000000>;
112 clock-output-names = "clkin_gmac";
118 compatible = "simple-audio-card";
119 simple-audio-card,name = "ROCKCHIP,SPDIF";
120 simple-audio-card,cpu {
121 sound-dai = <&spdif>;
123 simple-audio-card,codec {
124 sound-dai = <&spdif_out>;
128 spdif_out: spdif-out {
130 compatible = "linux,spdif-dit";
131 #sound-dai-cells = <0>;
134 hdmi_sound: hdmi-sound {
136 compatible = "simple-audio-card";
137 simple-audio-card,format = "i2s";
138 simple-audio-card,mclk-fs = <256>;
139 simple-audio-card,name = "rockchip,hdmi";
140 simple-audio-card,cpu {
143 simple-audio-card,codec {
144 sound-dai = <&dw_hdmi_audio>;
148 dw_hdmi_audio: dw-hdmi-audio {
150 compatible = "rockchip,dw-hdmi-audio";
151 #sound-dai-cells = <0>;
154 sdio_pwrseq: sdio-pwrseq {
155 compatible = "mmc-pwrseq-simple";
157 clock-names = "ext_clock";
158 pinctrl-names = "default";
159 pinctrl-0 = <&wifi_enable_h>;
162 * On the module itself this is one of these (depending
163 * on the actual card populated):
164 * - SDIO_RESET_L_WL_REG_ON
165 * - PDN (power down when low)
167 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
171 compatible = "wlan-platdata";
172 rockchip,grf = <&grf>;
173 wifi_chip_type = "ap6354";
175 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
180 compatible = "bluetooth-platdata";
182 clock-names = "ext_clock";
183 /* wifi-bt-power-toggle; */
184 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
185 pinctrl-names = "default", "rts_gpio";
186 pinctrl-0 = <&uart0_rts>;
187 pinctrl-1 = <&uart0_gpios>;
188 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
189 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
190 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
191 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
201 clock-frequency = <100000000>;
202 clock-freq-min-max = <100000 100000000>;
210 vqmmc-supply = <&vcc_sd>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
213 card-detect-delay = <800>;
218 clock-frequency = <100000000>;
219 clock-freq-min-max = <200000 100000000>;
225 keep-power-in-suspend;
226 mmc-pwrseq = <&sdio_pwrseq>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
244 mmc-hs400-enhanced-strobe;
250 rockchip,i2s-broken-burst-len;
251 rockchip,playback-channels = <8>;
252 rockchip,capture-channels = <8>;
253 #sound-dai-cells = <0>;
257 #sound-dai-cells = <0>;
261 pinctrl-0 = <&spdif_bus_1>;
263 #sound-dai-cells = <0>;
268 i2c-scl-rising-time-ns = <168>;
269 i2c-scl-falling-time-ns = <4>;
270 clock-frequency = <400000>;
272 vdd_cpu_b: syr827@40 {
273 compatible = "silergy,syr827";
275 regulator-compatible = "fan53555-reg";
276 pinctrl-0 = <&vsel1_gpio>;
277 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
278 regulator-name = "vdd_cpu_b";
279 regulator-min-microvolt = <712500>;
280 regulator-max-microvolt = <1500000>;
281 regulator-ramp-delay = <1000>;
282 fcs,suspend-voltage-selector = <1>;
285 vin-supply = <&vcc_sys>;
286 regulator-state-mem {
287 regulator-off-in-suspend;
292 compatible = "silergy,syr828";
294 regulator-compatible = "fan53555-reg";
295 pinctrl-0 = <&vsel2_gpio>;
296 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
297 regulator-name = "vdd_gpu";
298 regulator-min-microvolt = <712500>;
299 regulator-max-microvolt = <1500000>;
300 regulator-ramp-delay = <1000>;
301 fcs,suspend-voltage-selector = <1>;
304 vin-supply = <&vcc_sys>;
305 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
306 regulator-state-mem {
307 regulator-off-in-suspend;
312 compatible = "rockchip,rk808";
314 interrupt-parent = <&gpio1>;
315 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&pmic_int_l>;
318 rockchip,system-power-controller;
321 clock-output-names = "xin32k", "rk808-clkout2";
323 vcc1-supply = <&vcc_sys>;
324 vcc2-supply = <&vcc_sys>;
325 vcc3-supply = <&vcc_sys>;
326 vcc4-supply = <&vcc_sys>;
327 vcc6-supply = <&vcc_sys>;
328 vcc7-supply = <&vcc_sys>;
329 vcc8-supply = <&vcc3v3_sys>;
330 vcc9-supply = <&vcc_sys>;
331 vcc10-supply = <&vcc_sys>;
332 vcc11-supply = <&vcc_sys>;
333 vcc12-supply = <&vcc3v3_sys>;
334 vddio-supply = <&vcc_1v8>;
337 vdd_center: DCDC_REG1 {
338 regulator-name = "vdd_center";
339 regulator-min-microvolt = <750000>;
340 regulator-max-microvolt = <1350000>;
341 regulator-ramp-delay = <6001>;
344 regulator-state-mem {
345 regulator-off-in-suspend;
349 vdd_cpu_l: DCDC_REG2 {
350 regulator-name = "vdd_cpu_l";
351 regulator-min-microvolt = <750000>;
352 regulator-max-microvolt = <1350000>;
353 regulator-ramp-delay = <6001>;
356 regulator-state-mem {
357 regulator-off-in-suspend;
362 regulator-name = "vcc_ddr";
365 regulator-state-mem {
366 regulator-on-in-suspend;
371 regulator-name = "vcc_1v8";
372 regulator-min-microvolt = <1800000>;
373 regulator-max-microvolt = <1800000>;
376 regulator-state-mem {
377 regulator-on-in-suspend;
378 regulator-suspend-microvolt = <1800000>;
382 vcc1v8_dvp: LDO_REG1 {
383 regulator-name = "vcc1v8_dvp";
384 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <1800000>;
388 regulator-state-mem {
389 regulator-on-in-suspend;
390 regulator-suspend-microvolt = <1800000>;
394 vcca1v8_hdmi: LDO_REG2 {
395 regulator-name = "vcca1v8_hdmi";
396 regulator-min-microvolt = <1800000>;
397 regulator-max-microvolt = <1800000>;
400 regulator-state-mem {
401 regulator-on-in-suspend;
402 regulator-suspend-microvolt = <1800000>;
407 regulator-name = "vcca_1v8";
408 regulator-min-microvolt = <1800000>;
409 regulator-max-microvolt = <1800000>;
412 regulator-state-mem {
413 regulator-on-in-suspend;
414 regulator-suspend-microvolt = <1800000>;
419 regulator-name = "vcc_sd";
420 regulator-min-microvolt = <1800000>;
421 regulator-max-microvolt = <3300000>;
424 regulator-state-mem {
425 regulator-on-in-suspend;
426 regulator-suspend-microvolt = <3300000>;
430 vcc3v0_sd: LDO_REG5 {
431 regulator-name = "vcc3v0_sd";
432 regulator-min-microvolt = <3000000>;
433 regulator-max-microvolt = <3000000>;
436 regulator-state-mem {
437 regulator-on-in-suspend;
438 regulator-suspend-microvolt = <3000000>;
443 regulator-name = "vcc_1v5";
444 regulator-min-microvolt = <1500000>;
445 regulator-max-microvolt = <1500000>;
448 regulator-state-mem {
449 regulator-on-in-suspend;
450 regulator-suspend-microvolt = <1500000>;
454 vcca0v9_hdmi: LDO_REG7 {
455 regulator-name = "vcca0v9_hdmi";
456 regulator-min-microvolt = <900000>;
457 regulator-max-microvolt = <900000>;
460 regulator-state-mem {
461 regulator-on-in-suspend;
462 regulator-suspend-microvolt = <900000>;
467 regulator-name = "vcc_3v0";
468 regulator-min-microvolt = <3000000>;
469 regulator-max-microvolt = <3000000>;
472 regulator-state-mem {
473 regulator-on-in-suspend;
474 regulator-suspend-microvolt = <3000000>;
478 vcc3v3_s3: SWITCH_REG1 {
479 regulator-name = "vcc3v3_s3";
482 regulator-state-mem {
483 regulator-on-in-suspend;
487 vcc3v3_s0: SWITCH_REG2 {
488 regulator-name = "vcc3v3_s0";
491 regulator-state-mem {
492 regulator-on-in-suspend;
500 cpu-supply = <&vdd_cpu_l>;
504 cpu-supply = <&vdd_cpu_l>;
508 cpu-supply = <&vdd_cpu_l>;
512 cpu-supply = <&vdd_cpu_l>;
516 cpu-supply = <&vdd_cpu_b>;
520 cpu-supply = <&vdd_cpu_b>;
525 mali-supply = <&vdd_gpu>;
533 temperature = <85000>;
537 temperature = <100000>;
541 temperature = <105000>;
554 /* tshut mode 0:CRU 1:GPIO */
555 rockchip,hw-tshut-mode = <1>;
556 /* tshut polarity 0:LOW 1:HIGH */
557 rockchip,hw-tshut-polarity = <1>;
558 rockchip,hw-tshut-temp = <110000>;
566 u2phy0_otg: otg-port {
570 u2phy0_host: host-port {
571 phy-supply = <&vcc5v0_host>;
579 u2phy1_otg: otg-port {
583 u2phy1_host: host-port {
584 phy-supply = <&vcc5v0_host>;
590 pinctrl-names = "default";
591 pinctrl-0 = <&uart0_xfer &uart0_cts>;
641 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
642 compatible = "rockchip,remotectl-pwm";
647 rockchip,usercode = <0x4040>;
657 <0xe3 KEY_VOLUMEDOWN>,
674 rockchip,usercode = <0xff00>;
684 <0xeb KEY_VOLUMEDOWN>,
689 <0xa9 KEY_VOLUMEDOWN>,
690 <0xa8 KEY_VOLUMEDOWN>,
691 <0xe0 KEY_VOLUMEDOWN>,
692 <0xa5 KEY_VOLUMEDOWN>,
697 <0xed KEY_VOLUMEDOWN>,
699 <0xb3 KEY_VOLUMEDOWN>,
700 <0xf1 KEY_VOLUMEDOWN>,
701 <0xf2 KEY_VOLUMEDOWN>,
703 <0xb4 KEY_VOLUMEDOWN>,
708 rockchip,usercode = <0x1dcc>;
718 <0xfd KEY_VOLUMEDOWN>,
736 <0xb5 KEY_BACKSPACE>;
741 phy-supply = <&vcc_phy>;
743 clock_in_out = "input";
744 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
745 snps,reset-active-low;
746 snps,reset-delays-us = <0 10000 50000>;
747 assigned-clocks = <&cru SCLK_RMII_SRC>;
748 assigned-clock-parents = <&clkin_gmac>;
749 pinctrl-names = "default", "sleep";
750 pinctrl-0 = <&rgmii_pins>;
751 pinctrl-1 = <&rgmii_sleep_pins>;
762 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
766 native-mode = <&timing1>; /* 1080p */
778 rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
783 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC0>;
785 <165000000 0 0 17 18 18 18>,
786 <340000000 0 2 17 14 14 14>,
787 <594000000 0 2 17 9 9 9>;
798 dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
808 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
809 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
810 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
811 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
816 wifi_enable_h: wifi-enable-h {
818 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
823 uart0_gpios: uart0-gpios {
825 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
830 host_vbus_drv: host-vbus-drv {
832 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
837 pmic_int_l: pmic-int-l {
839 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
842 vsel1_gpio: vsel1-gpio {
844 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
847 vsel2_gpio: vsel2-gpio {
849 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
854 rgmii_sleep_pins: rgmii-sleep-pins {
856 <3 15 RK_FUNC_GPIO &pcfg_output_low>;
871 pmu1830-supply = <&vcc_1v8>;
876 rockchip,sleep-debug-en = <0>;
877 rockchip,sleep-mode-config = <
887 rockchip,wakeup-config = <
893 rockchip,pwm-regulator-config = <
898 rockchip,power-ctrl =
899 <&gpio1 17 GPIO_ACTIVE_HIGH>,
900 <&gpio1 14 GPIO_ACTIVE_HIGH>;