arch/arm64/boot/dts/rockchip/rk3399-fb.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/display/rk_fb.h>
  43 #include <dt-bindings/display/mipi_dsi.h>
  44
  45 / {
  46         vpu: vpu_service@ff650000 {
  47                 compatible = "rockchip,vpu_service";
  48                 rockchip,grf = <&grf>;
  49                 iommu_enabled = <1>;
  50                 reg = <0x0 0xff650000 0x0 0x800>;
  51                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
  52                         <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
  53                 interrupt-names = "irq_dec", "irq_enc";
  54                 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
  55                 clock-names = "aclk_vcodec", "hclk_vcodec";
  56                 resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
  57                 reset-names = "video_h", "video_a";
  58                 name = "vpu_service";
  59                 dev_mode = <0>;
  60                 status = "disabled";
  61         };
  62
  63         vpu_mmu: vpu_mmu {
  64                 dbgname = "vpu";
  65                 compatible = "rockchip,vpu_mmu";
  66                 reg = <0x0 0xff650800 0x0 0x40>;
  67                 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
  68                 interrupt-names = "vpu_mmu";
  69                 status = "disabled";
  70         };
  71
  72         rkvdec: rkvdec@ff660000 {
  73                 compatible = "rockchip,rkvdec";
  74                 rockchip,grf = <&grf>;
  75                 iommu_enabled = <1>;
  76                 reg = <0x0 0xff660000 0x0 0x400>;
  77                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
  78                 interrupt-names = "irq_dec";
  79                 clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>;
  80                 clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
  81                 resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
  82                 reset-names = "video_h", "video_a";
  83                 dev_mode = <2>;
  84                 name = "rkvdec";
  85                 status = "disabled";
  86         };
  87
  88         vdec_mmu: vdec_mmu {
  89                 dbgname = "vdec";
  90                 compatible = "rockchip,vdec_mmu";
  91                 reg = <0x0 0xff660480 0x0 0x40>,
  92                       <0x0 0xff6604c0 0x0 0x40>;
  93                 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
  94                 interrupt-names = "vdec_mmu";
  95                 status = "disabled";
  96         };
  97
  98         iep: iep@ff670000 {
  99                 compatible = "rockchip,iep";
 100                 iommu_enabled = <1>;
 101                 reg = <0x0 0xff670000 0x0 0x800>;
 102                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 103                 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
 104                 clock-names = "aclk_iep", "hclk_iep";
 105                 version = <2>;
 106                 status = "disabled";
 107         };
 108
 109         iep_mmu: iep-mmu {
 110                 dbgname = "iep";
 111                 compatible = "rockchip,iep_mmu";
 112                 reg = <0x0 0xff670800 0x0 0x40>;
 113                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 114                 interrupt-names = "iep_mmu";
 115                 status = "disabled";
 116         };
 117
 118         fb: fb {
 119                 compatible = "rockchip,rk-fb";
 120                 rockchip,disp-mode = <DUAL>;
 121                 status = "disabled";
 122         };
 123
 124         rk_screen: screen {
 125                 compatible = "rockchip,screen";
 126                 status = "disabled";
 127         };
 128
 129         vopb_rk_fb: vop-rk-fb@ff900000 {
 130                 status = "disabled";
 131                 compatible = "rockchip,rk3399-lcdc";
 132                 rockchip,prop = <PRMRY>;
 133                 reg = <0x0 0xff900000 0x0 0x3efc>;
 134                 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 135                 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
 136                 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
 137                 resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
 138                 reset-names = "axi", "ahb", "dclk";
 139                 rockchip,grf = <&grf>;
 140                 rockchip,pwr18 = <0>;
 141                 rockchip,iommu-enabled = <1>;
 142                 power_ctr: power_ctr {
 143                 /*rockchip,debug = <0>;
 144                 lcd_en: lcd-en {
 145                         rockchip,power_type = <GPIO>;
 146                         gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;//GPIO_C6 = 22
 147                         rockchip,delay = <10>;
 148                 };
 149                 */
 150
 151                 /*lcd_cs: lcd-cs {
 152                         rockchip,power_type = <GPIO>;
 153                         gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;//GPIO_C5 = 21
 154                         rockchip,delay = <10>;
 155                 };*/
 156
 157                 /*lcd_rst: lcd-rst {
 158                         rockchip,power_type = <GPIO>;
 159                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 160                         rockchip,delay = <5>;
 161                 };*/
 162                 };
 163         };
 164
 165         vopb_mmu_rk_fb: vopb-mmu {
 166                 dbgname = "vop";
 167                 compatible = "rockchip,vopb_mmu";
 168                 reg = <0x0 0xff903f00 0x0 0x100>;
 169                 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 170                 interrupt-names = "vopb_mmu";
 171                 status = "okay";
 172         };
 173
 174         vopl_rk_fb: vop-rk-fb@ff8f0000 {
 175                 compatible = "rockchip,rk3399-lcdc";
 176                 rockchip,prop = <EXTEND>;
 177                 reg = <0x0 0xff8f0000 0x0 0x3efc>;
 178                 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
 179                 clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
 180                 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
 181                 resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
 182                 reset-names = "axi", "ahb", "dclk";
 183                 rockchip,grf = <&grf>;
 184                 rockchip,pwr18 = <0>;
 185                 rockchip,iommu-enabled = <1>;
 186                 status = "disabled";
 187         };
 188
 189         vopl_mmu_rk_fb: vopl-mmu {
 190                 dbgname = "vop";
 191                 compatible = "rockchip,vopl_mmu";
 192                 reg = <0x0 0xff8f3f00 0x0 0x100>;
 193                 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
 194                 interrupt-names = "vopl_mmu";
 195                 status = "okay";
 196         };
 197
 198         hdmi_rk_fb: hdmi-rk-fb@ff940000 {
 199                 compatible = "rockchip,rk3399-hdmi";
 200                 reg = <0x0 0xff940000 0x0 0x20000>;
 201                 status = "disabled";
 202         };
 203
 204         mipi0_rk_fb: mipi-rk-fb@ff960000 {
 205                 compatible = "rockchip,rk3399-dsi";
 206                 rockchip,prop = <0>;
 207                 rockchip,grf = <&grf>;
 208                 reg = <0x0 0xff960000 0x0 0x8000>;
 209                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 210                 clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_MIPIDPHY_CFG>;
 211                 clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";
 212                 status = "disabled";
 213         };
 214
 215         mipi1_rk_fb: mipi-rk-fb@ff968000 {
 216                 compatible = "rockchip,rk3399-dsi";
 217                 rockchip,prop = <1>;
 218                 reg = <0x0 0xff968000 0x0 0x8000>;
 219                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 220                 clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI1>, <&cru SCLK_MIPIDPHY_CFG>;
 221                 clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";
 222                 status = "disabled";
 223         };
 224 };