2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
42 #include <dt-bindings/display/rk_fb.h>
46 compatible = "rockchip,rk-fb";
47 rockchip,disp-mode = <DUAL>;
52 compatible = "rockchip,screen";
56 vopl_rk_fb: vop-rk-fb@ff8f0000 {
57 compatible = "rockchip,rk3399-lcdc";
58 rockchip,prop = <EXTEND>;
59 reg = <0x0 0xff8f0000 0x0 0x3efc>;
60 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
61 clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
62 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
63 resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
64 reset-names = "axi", "ahb", "dclk";
65 rockchip,grf = <&grf>;
67 rockchip,iommu-enabled = <0>;
71 vopl_mmu_rk_fb: vopl-mmu {
73 compatible = "rockchip,vopl_mmu";
74 reg = <0x0 0xff8f3f00 0x0 0x100>;
75 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-names = "vopl_mmu";
80 vopb_rk_fb: vop-rk-fb@ff900000 {
82 compatible = "rockchip,rk3399-lcdc";
83 rockchip,prop = <PRMRY>;
84 reg = <0x0 0xff900000 0x0 0x3efc>;
85 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
87 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
88 resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
89 reset-names = "axi", "ahb", "dclk";
90 rockchip,grf = <&grf>;
92 rockchip,iommu-enabled = <0>;
93 power_ctr: power_ctr {
94 /*rockchip,debug = <0>;
96 rockchip,power_type = <GPIO>;
97 gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;//GPIO_C6 = 22
98 rockchip,delay = <10>;
103 rockchip,power_type = <GPIO>;
104 gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;//GPIO_C5 = 21
105 rockchip,delay = <10>;
109 rockchip,power_type = <GPIO>;
110 gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
111 rockchip,delay = <5>;
116 vopb_mmu_rk_fb: vopb-mmu {
118 compatible = "rockchip,vopb_mmu";
119 reg = <0x0 0xff903f00 0x0 0x100>;
120 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
121 interrupt-names = "vopb_mmu";
125 hdmi_rk_fb: hdmi-rk-fb@ff940000 {
126 compatible = "rockchip,rk3399-hdmi";
127 reg = <0x0 0xff940000 0x0 0x20000>;
131 mipi0_rk_fb: mipi-rk-fb@ff960000 {
132 compatible = "rockchip,rk3399-dsi";
134 rockchip,grf = <&grf>;
135 reg = <0x0 0xff960000 0x0 0x8000>;
136 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
137 clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_MIPIDPHY_CFG>;
138 clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";
142 mipi1_rk_fb: mipi-rk-fb@ff968000 {
143 compatible = "rockchip,rk3399-dsi";
145 reg = <0x0 0xff968000 0x0 0x8000>;
146 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
147 clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI1>, <&cru SCLK_MIPIDPHY_CFG>;
148 clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";