2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
52 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53 compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
55 backlight: backlight {
57 compatible = "pwm-backlight";
58 pwms = <&pwm0 0 25000 0>;
62 16 17 18 19 20 21 22 23
63 24 25 26 27 28 29 30 31
64 32 33 34 35 36 37 38 39
65 40 41 42 43 44 45 46 47
66 48 49 50 51 52 53 54 55
67 56 57 58 59 60 61 62 63
68 64 65 66 67 68 69 70 71
69 72 73 74 75 76 77 78 79
70 80 81 82 83 84 85 86 87
71 88 89 90 91 92 93 94 95
72 96 97 98 99 100 101 102 103
73 104 105 106 107 108 109 110 111
74 112 113 114 115 116 117 118 119
75 120 121 122 123 124 125 126 127
76 128 129 130 131 132 133 134 135
77 136 137 138 139 140 141 142 143
78 144 145 146 147 148 149 150 151
79 152 153 154 155 156 157 158 159
80 160 161 162 163 164 165 166 167
81 168 169 170 171 172 173 174 175
82 176 177 178 179 180 181 182 183
83 184 185 186 187 188 189 190 191
84 192 193 194 195 196 197 198 199
85 200 201 202 203 204 205 206 207
86 208 209 210 211 212 213 214 215
87 216 217 218 219 220 221 222 223
88 224 225 226 227 228 229 230 231
89 232 233 234 235 236 237 238 239
90 240 241 242 243 244 245 246 247
91 248 249 250 251 252 253 254 255>;
92 default-brightness-level = <200>;
95 clkin_gmac: external-gmac-clock {
96 compatible = "fixed-clock";
97 clock-frequency = <125000000>;
98 clock-output-names = "clkin_gmac";
102 dw_hdmi_audio: dw-hdmi-audio {
104 compatible = "rockchip,dw-hdmi-audio";
105 #sound-dai-cells = <0>;
108 edp_panel: edp-panel {
109 compatible = "sharp,lcd-f402", "panel-simple";
110 backlight = <&backlight>;
111 power-supply = <&vcc_lcd>;
112 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
113 pinctrl-names = "default";
114 pinctrl-0 = <&lcd_panel_reset>;
117 panel_in_edp: endpoint {
118 remote-endpoint = <&edp_out_panel>;
123 fiq_debugger: fiq-debugger {
124 compatible = "rockchip,fiq-debugger";
125 rockchip,serial-id = <2>;
126 rockchip,signal-irq = <182>;
127 rockchip,wake-irq = <0>;
128 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
129 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
130 pinctrl-names = "default";
131 pinctrl-0 = <&uart2c_xfer>;
135 compatible = "gpio-keys";
136 #address-cells = <1>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pwrbtn>;
144 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
145 linux,code = <KEY_POWER>;
146 label = "GPIO Key Power";
147 linux,input-type = <1>;
148 gpio-key,wakeup = <1>;
149 debounce-interval = <100>;
154 compatible = "simple-audio-card";
155 simple-audio-card,format = "i2s";
156 simple-audio-card,name = "rockchip,rt5640-codec";
157 simple-audio-card,mclk-fs = <256>;
158 simple-audio-card,widgets =
159 "Microphone", "Mic Jack",
160 "Headphone", "Headphone Jack";
161 simple-audio-card,routing =
162 "Mic Jack", "MICBIAS1",
164 "Headphone Jack", "HPOL",
165 "Headphone Jack", "HPOR";
166 simple-audio-card,cpu {
169 simple-audio-card,codec {
170 sound-dai = <&rt5640>;
174 hdmi_sound: hdmi-sound {
176 compatible = "simple-audio-card";
177 simple-audio-card,format = "i2s";
178 simple-audio-card,mclk-fs = <256>;
179 simple-audio-card,name = "rockchip,hdmi";
181 simple-audio-card,cpu {
184 simple-audio-card,codec {
185 sound-dai = <&dw_hdmi_audio>;
189 hdmi_codec: hdmi-codec {
190 compatible = "simple-audio-card";
191 simple-audio-card,format = "i2s";
192 simple-audio-card,mclk-fs = <256>;
193 simple-audio-card,name = "HDMI-CODEC";
195 simple-audio-card,cpu {
199 simple-audio-card,codec {
206 compatible = "simple-audio-card";
207 simple-audio-card,name = "ROCKCHIP,SPDIF";
208 simple-audio-card,cpu {
209 sound-dai = <&spdif>;
211 simple-audio-card,codec {
212 sound-dai = <&spdif_out>;
216 spdif_out: spdif-out {
218 compatible = "linux,spdif-dit";
219 #sound-dai-cells = <0>;
222 sdio_pwrseq: sdio-pwrseq {
223 compatible = "mmc-pwrseq-simple";
225 clock-names = "ext_clock";
226 pinctrl-names = "default";
227 pinctrl-0 = <&wifi_enable_h>;
230 * On the module itself this is one of these (depending
231 * on the actual card populated):
232 * - SDIO_RESET_L_WL_REG_ON
233 * - PDN (power down when low)
235 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
238 vcc3v3_pcie: vcc3v3-pcie-regulator {
239 compatible = "regulator-fixed";
243 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pcie_drv>;
246 regulator-name = "vcc3v3_pcie";
249 vcc3v3_sys: vcc3v3-sys {
250 compatible = "regulator-fixed";
251 regulator-name = "vcc3v3_sys";
254 regulator-min-microvolt = <3300000>;
255 regulator-max-microvolt = <3300000>;
258 vcc5v0_host: vcc5v0-host-regulator {
259 compatible = "regulator-fixed";
261 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&host_vbus_drv>;
264 regulator-name = "vcc5v0_host";
268 vcc5v0_sys: vcc5v0-sys {
269 compatible = "regulator-fixed";
270 regulator-name = "vcc5v0_sys";
273 regulator-min-microvolt = <5000000>;
274 regulator-max-microvolt = <5000000>;
277 vcc_phy: vcc-phy-regulator {
278 compatible = "regulator-fixed";
279 regulator-name = "vcc_phy";
285 compatible = "pwm-regulator";
286 pwms = <&pwm2 0 25000 1>;
287 regulator-name = "vdd_log";
288 regulator-min-microvolt = <800000>;
289 regulator-max-microvolt = <1400000>;
293 /* for rockchip boot on */
294 rockchip,pwm_id= <2>;
295 rockchip,pwm_voltage = <1000000>;
298 vccadc_ref: vccadc-ref {
299 compatible = "regulator-fixed";
300 regulator-name = "vcc1v8_sys";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
307 vcc_lcd: vcc-lcd-regulator {
308 compatible = "regulator-fixed";
312 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&lcd_en>;
315 regulator-name = "vcc_lcd";
319 compatible = "wlan-platdata";
320 rockchip,grf = <&grf>;
321 wifi_chip_type = "ap6354";
323 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
328 compatible = "bluetooth-platdata";
329 //wifi-bt-power-toggle;
331 clock-names = "ext_clock";
332 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
333 pinctrl-names = "default", "rts_gpio";
334 pinctrl-0 = <&uart0_rts>;
335 pinctrl-1 = <&uart0_gpios>;
336 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
337 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
338 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
339 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
344 compatible = "gpio-leds";
346 label = "firefly:blue:power";
347 linux,default-trigger = "ir-power-click";
348 default-state = "on";
349 gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&led_power>;
354 label = "firefly:yellow:user";
355 linux,default-trigger = "ir-user-click";
356 default-state = "off";
357 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&led_user>;
365 cpu-supply = <&vdd_cpu_l>;
369 cpu-supply = <&vdd_cpu_l>;
373 cpu-supply = <&vdd_cpu_l>;
377 cpu-supply = <&vdd_cpu_l>;
381 cpu-supply = <&vdd_cpu_b>;
385 cpu-supply = <&vdd_cpu_b>;
398 #address-cells = <1>;
401 edp_out_panel: endpoint@0 {
403 remote-endpoint = <&panel_in_edp>;
414 phy-supply = <&vcc_phy>;
416 clock_in_out = "input";
417 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
418 snps,reset-active-low;
419 snps,reset-delays-us = <0 10000 50000>;
420 assigned-clocks = <&cru SCLK_RMII_SRC>;
421 assigned-clock-parents = <&clkin_gmac>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&rgmii_pins>;
431 mali-supply = <&vdd_gpu>;
435 #address-cells = <1>;
437 #sound-dai-cells = <0>;
438 ddc-i2c-bus = <&i2c3>;
444 i2c-scl-rising-time-ns = <168>;
445 i2c-scl-falling-time-ns = <4>;
446 clock-frequency = <400000>;
448 vdd_cpu_b: syr827@40 {
449 compatible = "silergy,syr827";
451 vin-supply = <&vcc5v0_sys>;
452 regulator-compatible = "fan53555-reg";
453 regulator-name = "vdd_cpu_b";
454 regulator-min-microvolt = <712500>;
455 regulator-max-microvolt = <1500000>;
456 regulator-ramp-delay = <1000>;
457 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
458 fcs,suspend-voltage-selector = <1>;
461 regulator-initial-state = <3>;
462 regulator-state-mem {
463 regulator-off-in-suspend;
468 compatible = "silergy,syr828";
470 vin-supply = <&vcc5v0_sys>;
471 regulator-compatible = "fan53555-reg";
472 regulator-name = "vdd_gpu";
473 regulator-min-microvolt = <712500>;
474 regulator-max-microvolt = <1500000>;
475 regulator-ramp-delay = <1000>;
476 fcs,suspend-voltage-selector = <1>;
479 regulator-initial-state = <3>;
480 regulator-state-mem {
481 regulator-off-in-suspend;
486 compatible = "rockchip,rk808";
488 interrupt-parent = <&gpio1>;
489 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
492 rockchip,system-power-controller;
495 clock-output-names = "xin32k", "rk808-clkout2";
497 vcc1-supply = <&vcc3v3_sys>;
498 vcc2-supply = <&vcc3v3_sys>;
499 vcc3-supply = <&vcc3v3_sys>;
500 vcc4-supply = <&vcc3v3_sys>;
501 vcc6-supply = <&vcc3v3_sys>;
502 vcc7-supply = <&vcc3v3_sys>;
503 vcc8-supply = <&vcc3v3_sys>;
504 vcc9-supply = <&vcc3v3_sys>;
505 vcc10-supply = <&vcc3v3_sys>;
506 vcc11-supply = <&vcc3v3_sys>;
507 vcc12-supply = <&vcc3v3_sys>;
508 vddio-supply = <&vcc1v8_pmu>;
511 vdd_center: DCDC_REG1 {
514 regulator-min-microvolt = <750000>;
515 regulator-max-microvolt = <1350000>;
516 regulator-ramp-delay = <6001>;
517 regulator-name = "vdd_center";
518 regulator-state-mem {
519 regulator-off-in-suspend;
523 vdd_cpu_l: DCDC_REG2 {
526 regulator-min-microvolt = <750000>;
527 regulator-max-microvolt = <1350000>;
528 regulator-ramp-delay = <6001>;
529 regulator-name = "vdd_cpu_l";
530 regulator-state-mem {
531 regulator-off-in-suspend;
538 regulator-name = "vcc_ddr";
539 regulator-state-mem {
540 regulator-on-in-suspend;
547 regulator-min-microvolt = <1800000>;
548 regulator-max-microvolt = <1800000>;
549 regulator-name = "vcc_1v8";
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <1800000>;
556 vcc1v8_dvp: LDO_REG1 {
559 regulator-min-microvolt = <1800000>;
560 regulator-max-microvolt = <1800000>;
561 regulator-name = "vcc1v8_dvp";
562 regulator-state-mem {
563 regulator-off-in-suspend;
567 vcc3v0_tp: LDO_REG2 {
570 regulator-min-microvolt = <3000000>;
571 regulator-max-microvolt = <3000000>;
572 regulator-name = "vcc3v0_tp";
573 regulator-state-mem {
574 regulator-off-in-suspend;
578 vcc1v8_pmu: LDO_REG3 {
581 regulator-min-microvolt = <1800000>;
582 regulator-max-microvolt = <1800000>;
583 regulator-name = "vcc1v8_pmu";
584 regulator-state-mem {
585 regulator-on-in-suspend;
586 regulator-suspend-microvolt = <1800000>;
593 regulator-min-microvolt = <1800000>;
594 regulator-max-microvolt = <3300000>;
595 regulator-name = "vcc_sd";
596 regulator-state-mem {
597 regulator-on-in-suspend;
598 regulator-suspend-microvolt = <3300000>;
602 vcca3v0_codec: LDO_REG5 {
605 regulator-min-microvolt = <3000000>;
606 regulator-max-microvolt = <3000000>;
607 regulator-name = "vcca3v0_codec";
608 regulator-state-mem {
609 regulator-off-in-suspend;
616 regulator-min-microvolt = <1500000>;
617 regulator-max-microvolt = <1500000>;
618 regulator-name = "vcc_1v5";
619 regulator-state-mem {
620 regulator-on-in-suspend;
621 regulator-suspend-microvolt = <1500000>;
625 vcca1v8_codec: LDO_REG7 {
628 regulator-min-microvolt = <1800000>;
629 regulator-max-microvolt = <1800000>;
630 regulator-name = "vcca1v8_codec";
631 regulator-state-mem {
632 regulator-off-in-suspend;
639 regulator-min-microvolt = <3000000>;
640 regulator-max-microvolt = <3000000>;
641 regulator-name = "vcc_3v0";
642 regulator-state-mem {
643 regulator-on-in-suspend;
644 regulator-suspend-microvolt = <3000000>;
648 vcc3v3_s3: SWITCH_REG1 {
651 regulator-name = "vcc3v3_s3";
652 regulator-state-mem {
653 regulator-off-in-suspend;
657 vcc3v3_s0: SWITCH_REG2 {
660 regulator-name = "vcc3v3_s0";
661 regulator-state-mem {
662 regulator-off-in-suspend;
671 i2c-scl-rising-time-ns = <300>;
672 i2c-scl-falling-time-ns = <15>;
675 #sound-dai-cells = <0>;
676 compatible = "realtek,rt5640";
678 clocks = <&cru SCLK_I2S_8CH_OUT>;
679 clock-names = "mclk";
680 realtek,in1-differential;
681 pinctrl-names = "default";
682 pinctrl-0 = <&rt5640_hpcon>;
683 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
684 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
685 io-channels = <&saradc 4>;
686 hp-det-adc-value = <500>;
692 i2c-scl-rising-time-ns = <450>;
693 i2c-scl-falling-time-ns = <15>;
698 i2c-scl-rising-time-ns = <475>;
699 i2c-scl-falling-time-ns = <26>;
702 compatible = "fairchild,fusb302";
704 pinctrl-names = "default";
705 pinctrl-0 = <&fusb0_int>;
706 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
707 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
711 gsl3680: gsl3680@41 {
713 compatible = "gslX680-pad";
715 screen_max_x = <1536>;
716 screen_max_y = <2048>;
717 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
718 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
722 compatible = "invensense,mpu6050";
724 mpu-int_config = <0x10>;
725 mpu-level_shifter = <0>;
726 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
730 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
737 rockchip,i2s-broken-burst-len;
738 rockchip,playback-channels = <8>;
739 rockchip,capture-channels = <8>;
740 #sound-dai-cells = <0>;
745 rockchip,i2s-broken-burst-len;
746 rockchip,playback-channels = <2>;
747 rockchip,capture-channels = <2>;
748 #sound-dai-cells = <0>;
752 #sound-dai-cells = <0>;
759 bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
760 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
761 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
762 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
770 ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
772 pinctrl-names = "default";
773 pinctrl-0 = <&pcie_clkreqn_cpm>;
779 pmu1830-supply = <&vcc_3v0>;
785 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
790 lcd_panel_reset: lcd-panel-reset {
791 rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
795 rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
802 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
804 pcie_3g_drv: pcie-3g-drv {
806 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
812 vsel1_gpio: vsel1-gpio {
814 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
817 vsel2_gpio: vsel2-gpio {
819 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
824 wifi_enable_h: wifi-enable-h {
826 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
831 uart0_gpios: uart0-gpios {
833 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
838 led_power: led-power {
839 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
843 rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
848 rt5640_hpcon: rt5640-hpcon {
849 rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
854 pmic_int_l: pmic-int-l {
856 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
859 pmic_dvs2: pmic-dvs2 {
861 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
866 host_vbus_drv: host-vbus-drv {
868 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
873 fusb0_int: fusb0-int {
874 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
892 rockchip,power-ctrl =
893 <&gpio1 18 GPIO_ACTIVE_LOW>,
894 <&gpio1 14 GPIO_ACTIVE_HIGH>;
903 logo,mode = "center";
908 vref-supply = <&vccadc_ref>;
913 keep-power-in-suspend;
915 mmc-hs400-enhanced-strobe;
922 max-frequency = <150000000>;
929 vqmmc-supply = <&vcc_sd>;
930 pinctrl-names = "default";
931 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
936 max-frequency = <50000000>;
941 keep-power-in-suspend;
942 mmc-pwrseq = <&sdio_pwrseq>;
945 pinctrl-names = "default";
946 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
953 pinctrl-0 = <&spdif_bus_1>;
954 i2c-scl-rising-time-ns = <450>;
955 i2c-scl-falling-time-ns = <15>;
956 #sound-dai-cells = <0>;
969 /* tshut mode 0:CRU 1:GPIO */
970 rockchip,hw-tshut-mode = <1>;
971 /* tshut polarity 0:LOW 1:HIGH */
972 rockchip,hw-tshut-polarity = <1>;
980 u2phy0_otg: otg-port {
984 u2phy0_host: host-port {
985 phy-supply = <&vcc5v0_host>;
993 u2phy1_otg: otg-port {
997 u2phy1_host: host-port {
998 phy-supply = <&vcc5v0_host>;
1005 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1006 compatible = "rockchip,remotectl-pwm";
1007 remote_pwm_id = <3>;
1008 handle_cpu_id = <0>;
1011 rockchip,usercode = <0xff00>;
1012 rockchip,key_table =
1018 <0xf4 KEY_VOLUMEUP>,
1019 <0xa7 KEY_VOLUMEDOWN>,
1029 pinctrl-names = "default";
1030 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1090 /* 0 means ion, 1 means drm */