ARM64: DTS: Fix Firefly board audio driver
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rockchip / rk3399-firefly-linux-mipi.dts
1 /*
2  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
50
51 / {
52         model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53         compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
54
55         backlight: backlight {
56                 status = "okay";
57                 compatible = "pwm-backlight";
58                 pwms = <&pwm1 0 25000 0>;
59                 brightness-levels = <
60                           0   1   2   3   4   5   6   7
61                           8   9  10  11  12  13  14  15
62                          16  17  18  19  20  21  22  23
63                          24  25  26  27  28  29  30  31
64                          32  33  34  35  36  37  38  39
65                          40  41  42  43  44  45  46  47
66                          48  49  50  51  52  53  54  55
67                          56  57  58  59  60  61  62  63
68                          64  65  66  67  68  69  70  71
69                          72  73  74  75  76  77  78  79
70                          80  81  82  83  84  85  86  87
71                          88  89  90  91  92  93  94  95
72                          96  97  98  99 100 101 102 103
73                         104 105 106 107 108 109 110 111
74                         112 113 114 115 116 117 118 119
75                         120 121 122 123 124 125 126 127
76                         128 129 130 131 132 133 134 135
77                         136 137 138 139 140 141 142 143
78                         144 145 146 147 148 149 150 151
79                         152 153 154 155 156 157 158 159
80                         160 161 162 163 164 165 166 167
81                         168 169 170 171 172 173 174 175
82                         176 177 178 179 180 181 182 183
83                         184 185 186 187 188 189 190 191
84                         192 193 194 195 196 197 198 199
85                         200 201 202 203 204 205 206 207
86                         208 209 210 211 212 213 214 215
87                         216 217 218 219 220 221 222 223
88                         224 225 226 227 228 229 230 231
89                         232 233 234 235 236 237 238 239
90                         240 241 242 243 244 245 246 247
91                         248 249 250 251 252 253 254 255>;
92                 default-brightness-level = <200>;
93         };
94
95         clkin_gmac: external-gmac-clock {
96                 compatible = "fixed-clock";
97                 clock-frequency = <125000000>;
98                 clock-output-names = "clkin_gmac";
99                 #clock-cells = <0>;
100         };
101
102         dw_hdmi_audio: dw-hdmi-audio {
103                 status = "disabled";
104                 compatible = "rockchip,dw-hdmi-audio";
105                 #sound-dai-cells = <0>;
106         };
107
108         edp_panel: edp-panel {
109                 status = "disabled";
110                 compatible = "sharp,lcd-f402", "panel-simple";
111                 backlight = <&backlight>;
112                 power-supply = <&vcc_lcd>;
113                 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
114                 pinctrl-names = "default";
115                 pinctrl-0 = <&lcd_panel_reset>;
116
117                 ports {
118                         panel_in_edp: endpoint {
119                                 remote-endpoint = <&edp_out_panel>;
120                         };
121                 };
122         };
123
124         fiq_debugger: fiq-debugger {
125                 compatible = "rockchip,fiq-debugger";
126                 rockchip,serial-id = <2>;
127                 rockchip,signal-irq = <182>;
128                 rockchip,wake-irq = <0>;
129                 rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
130                 rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
131                 pinctrl-names = "default";
132                 pinctrl-0 = <&uart2c_xfer>;
133         };
134
135         gpio-keys {
136                 compatible = "gpio-keys";
137                 #address-cells = <1>;
138                 #size-cells = <0>;
139                 autorepeat;
140
141                 pinctrl-names = "default";
142                 pinctrl-0 = <&pwrbtn>;
143
144                 button@0 {
145                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146                         linux,code = <KEY_POWER>;
147                         label = "GPIO Key Power";
148                         linux,input-type = <1>;
149                         gpio-key,wakeup = <1>;
150                         debounce-interval = <100>;
151                 };
152         };
153
154         rt5640-sound {
155                 compatible = "simple-audio-card";
156                 simple-audio-card,format = "i2s";
157                 simple-audio-card,name = "rockchip,rt5640-codec";
158                 simple-audio-card,mclk-fs = <256>;
159                 simple-audio-card,widgets =
160                         "Microphone", "Mic Jack",
161                         "Headphone", "Headphone Jack";
162                 simple-audio-card,routing =
163                         "Mic Jack", "MICBIAS1",
164                         "IN1P", "Mic Jack",
165                         "Headphone Jack", "HPOL",
166                         "Headphone Jack", "HPOR";
167                 simple-audio-card,cpu {
168                         sound-dai = <&i2s1>;
169                 };
170                 simple-audio-card,codec {
171                         sound-dai = <&rt5640>;
172                 };
173         };
174
175         hdmi_sound: hdmi-sound {
176                 status = "disabled";
177                 compatible = "simple-audio-card";
178                 simple-audio-card,format = "i2s";
179                 simple-audio-card,mclk-fs = <256>;
180                 simple-audio-card,name = "rockchip,hdmi";
181
182                 simple-audio-card,cpu {
183                         sound-dai = <&i2s2>;
184                 };
185                 simple-audio-card,codec {
186                         sound-dai = <&dw_hdmi_audio>;
187                 };
188         };
189
190         hdmi_codec: hdmi-codec {
191                 compatible = "simple-audio-card";
192                 simple-audio-card,format = "i2s";
193                 simple-audio-card,mclk-fs = <256>;
194                 simple-audio-card,name = "HDMI-CODEC";
195
196                 simple-audio-card,cpu {
197                         sound-dai = <&i2s2>;
198                 };
199
200                 simple-audio-card,codec {
201                         sound-dai = <&hdmi>;
202                 };
203         };
204
205         spdif-sound {
206                 status = "okay";
207                 compatible = "simple-audio-card";
208                 simple-audio-card,name = "ROCKCHIP,SPDIF";
209                 simple-audio-card,cpu {
210                         sound-dai = <&spdif>;
211                 };
212                 simple-audio-card,codec {
213                         sound-dai = <&spdif_out>;
214                 };
215         };
216
217         spdif_out: spdif-out {
218                 status = "okay";
219                 compatible = "linux,spdif-dit";
220                 #sound-dai-cells = <0>;
221         };
222
223         sdio_pwrseq: sdio-pwrseq {
224                 compatible = "mmc-pwrseq-simple";
225                 clocks = <&rk808 1>;
226                 clock-names = "ext_clock";
227                 pinctrl-names = "default";
228                 pinctrl-0 = <&wifi_enable_h>;
229
230                 /*
231                  * On the module itself this is one of these (depending
232                  * on the actual card populated):
233                  * - SDIO_RESET_L_WL_REG_ON
234                  * - PDN (power down when low)
235                  */
236                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
237         };
238
239         vcc3v3_pcie: vcc3v3-pcie-regulator {
240                 compatible = "regulator-fixed";
241                 enable-active-high;
242                 regulator-always-on;
243                 regulator-boot-on;
244                 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
245                 pinctrl-names = "default";
246                 pinctrl-0 = <&pcie_drv>;
247                 regulator-name = "vcc3v3_pcie";
248         };
249
250         vcc3v3_3g: vcc3v3-3g-regulator {
251                 compatible = "regulator-fixed";
252                 enable-active-high;
253                 regulator-always-on;
254                 regulator-boot-on;
255                 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
256                 pinctrl-names = "default";
257                 pinctrl-0 = <&pcie_3g_drv>;
258                 regulator-name = "vcc3v3_3g";
259     };
260
261         vcc3v3_sys: vcc3v3-sys {
262                 compatible = "regulator-fixed";
263                 regulator-name = "vcc3v3_sys";
264                 regulator-always-on;
265                 regulator-boot-on;
266                 regulator-min-microvolt = <3300000>;
267                 regulator-max-microvolt = <3300000>;
268         };
269
270         vcc5v0_host: vcc5v0-host-regulator {
271                 compatible = "regulator-fixed";
272                 enable-active-high;
273                 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
274                 pinctrl-names = "default";
275                 pinctrl-0 = <&host_vbus_drv>;
276                 regulator-name = "vcc5v0_host";
277                 regulator-always-on;
278         };
279
280         vcc5v0_sys: vcc5v0-sys {
281                 compatible = "regulator-fixed";
282                 regulator-name = "vcc5v0_sys";
283                 regulator-always-on;
284                 regulator-boot-on;
285                 regulator-min-microvolt = <5000000>;
286                 regulator-max-microvolt = <5000000>;
287         };
288
289         vcc_phy: vcc-phy-regulator {
290                 compatible = "regulator-fixed";
291                 regulator-name = "vcc_phy";
292                 regulator-always-on;
293                 regulator-boot-on;
294         };
295
296         vdd_log: vdd-log {
297                 compatible = "pwm-regulator";
298                 pwms = <&pwm2 0 25000 1>;
299                 regulator-name = "vdd_log";
300                 regulator-min-microvolt = <800000>;
301                 regulator-max-microvolt = <1100000>;
302                 regulator-always-on;
303                 regulator-boot-on;
304
305                 /* for rockchip boot on */
306                 rockchip,pwm_id= <2>;
307                 rockchip,pwm_voltage = <1000000>;
308         };
309
310         vccadc_ref: vccadc-ref {
311                 compatible = "regulator-fixed";
312                 regulator-name = "vcc1v8_sys";
313                 regulator-always-on;
314                 regulator-boot-on;
315                 regulator-min-microvolt = <1800000>;
316                 regulator-max-microvolt = <1800000>;
317         };
318
319         vcc_lcd: vcc-lcd-regulator {
320                 compatible = "regulator-fixed";
321                 regulator-always-on;
322                 regulator-boot-on;
323                 enable-active-high;
324                 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
325                 pinctrl-names = "default";
326                 pinctrl-0 = <&lcd_en>;
327                 regulator-name = "vcc_lcd";
328         };
329
330         wireless-wlan {
331                 compatible = "wlan-platdata";
332                 rockchip,grf = <&grf>;
333                 wifi_chip_type = "ap6354";
334                 sdio_vref = <1800>;
335                 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
336                 status = "okay";
337         };
338
339         wireless-bluetooth {
340                 compatible = "bluetooth-platdata";
341                 //wifi-bt-power-toggle;
342                 clocks = <&rk808 1>;
343                 clock-names = "ext_clock";
344                 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
345                 pinctrl-names = "default", "rts_gpio";
346                 pinctrl-0 = <&uart0_rts>;
347                 pinctrl-1 = <&uart0_gpios>;
348                 //BT,power_gpio  = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
349                 BT,reset_gpio    = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
350                 BT,wake_gpio     = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
351                 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
352                 status = "okay";
353         };
354
355     leds {
356        compatible = "gpio-leds";
357        power {
358            label = "firefly:blue:power";
359            linux,default-trigger = "ir-power-click";
360            default-state = "on";
361            gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
362            pinctrl-names = "default";
363            pinctrl-0 = <&led_power>;
364        };
365        user {
366            label = "firefly:yellow:user";
367            linux,default-trigger = "ir-user-click";
368            default-state = "off";
369            gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
370            pinctrl-names = "default";
371            pinctrl-0 = <&led_user>;
372        };
373    };
374 };
375
376 &dsi {
377         status = "okay";
378         dsi_panel: panel {
379                 compatible ="simple-panel-dsi";
380                 reg = <0>;
381                 backlight = <&backlight>;
382                 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
383                 dsi,format = <MIPI_DSI_FMT_RGB888>;
384                 //bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
385                 dsi,lanes = <4>;
386                 /*
387                 dsi,channel = <0>;
388                 delay,enable = <35>;
389                 delay,prepare = <6>;
390                 delay,unprepare = <0>;
391                 delay,disable = <20>;
392                 size,width = <120>;
393                 size,height = <170>;
394                 */
395                 status = "okay";
396
397                 panel-init-sequence = [
398                         05 20 01 29
399                         05 96 01 11
400                 ];
401
402                 panel-exit-sequence = [
403                                 05 05 01 28
404                                 05 78 01 10
405                 ];
406
407                 disp_timings: display-timings {
408                         native-mode = <&timing0>;
409                         timing0: timing0 {
410                            clock-frequency = <64000000>;
411                            hactive = <768>;
412                            vactive = <1024>;
413                            hsync-len = <5>;   //20, 50
414                            hback-porch = <25>; //50, 56
415                            hfront-porch = <150>;//50, 30
416                            vsync-len = <1>;
417                            vback-porch = <15>;
418                            vfront-porch = <100>;
419                            hsync-active = <0>;
420                            vsync-active = <0>;
421                            de-active = <0>;
422                            pixelclk-active = <0>;
423                         };
424                 };
425         };
426 };
427
428 &cpu_l0 {
429         cpu-supply = <&vdd_cpu_l>;
430 };
431
432 &cpu_l1 {
433         cpu-supply = <&vdd_cpu_l>;
434 };
435
436 &cpu_l2 {
437         cpu-supply = <&vdd_cpu_l>;
438 };
439
440 &cpu_l3 {
441         cpu-supply = <&vdd_cpu_l>;
442 };
443
444 &cpu_b0 {
445         cpu-supply = <&vdd_cpu_b>;
446 };
447
448 &cpu_b1 {
449         cpu-supply = <&vdd_cpu_b>;
450 };
451
452 &display_subsystem {
453         status = "okay";
454 };
455
456 &edp {
457         status = "disabled";
458
459         ports {
460                 edp_out: port@1 {
461                         reg = <1>;
462                         #address-cells = <1>;
463                         #size-cells = <0>;
464
465                         edp_out_panel: endpoint@0 {
466                                 reg = <0>;
467                                 remote-endpoint = <&panel_in_edp>;
468                         };
469                 };
470         };
471 };
472
473 &emmc_phy {
474         status = "okay";
475 };
476
477 &gmac {
478         phy-supply = <&vcc_phy>;
479         phy-mode = "rgmii";
480         clock_in_out = "input";
481         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
482         snps,reset-active-low;
483         snps,reset-delays-us = <0 10000 50000>;
484         assigned-clocks = <&cru SCLK_RMII_SRC>;
485         assigned-clock-parents = <&clkin_gmac>;
486         pinctrl-names = "default";
487         pinctrl-0 = <&rgmii_pins>;
488         tx_delay = <0x28>;
489         rx_delay = <0x1B>;
490         status = "okay";
491 };
492
493 &gpu {
494         status = "okay";
495         mali-supply = <&vdd_gpu>;
496 };
497
498 &hdmi {
499         #address-cells = <1>;
500         #size-cells = <0>;
501         #sound-dai-cells = <0>;
502         status = "okay";
503 };
504
505 &i2c0 {
506         status = "okay";
507         i2c-scl-rising-time-ns = <168>;
508         i2c-scl-falling-time-ns = <4>;
509         clock-frequency = <400000>;
510
511         vdd_cpu_b: syr827@40 {
512                 compatible = "silergy,syr827";
513                 reg = <0x40>;
514                 vin-supply = <&vcc5v0_sys>;
515                 regulator-compatible = "fan53555-reg";
516                 regulator-name = "vdd_cpu_b";
517                 regulator-min-microvolt = <712500>;
518                 regulator-max-microvolt = <1500000>;
519                 regulator-ramp-delay = <1000>;
520                 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
521                 fcs,suspend-voltage-selector = <1>;
522                 regulator-always-on;
523                 regulator-boot-on;
524                 regulator-initial-state = <3>;
525                         regulator-state-mem {
526                         regulator-off-in-suspend;
527                 };
528         };
529
530         vdd_gpu: syr828@41 {
531                 compatible = "silergy,syr828";
532                 reg = <0x41>;
533                 vin-supply = <&vcc5v0_sys>;
534                 regulator-compatible = "fan53555-reg";
535                 regulator-name = "vdd_gpu";
536                 regulator-min-microvolt = <712500>;
537                 regulator-max-microvolt = <1500000>;
538                 regulator-ramp-delay = <1000>;
539                 fcs,suspend-voltage-selector = <1>;
540                 regulator-always-on;
541                 regulator-boot-on;
542                 regulator-initial-state = <3>;
543                         regulator-state-mem {
544                         regulator-off-in-suspend;
545                 };
546         };
547
548         rk808: pmic@1b {
549                 compatible = "rockchip,rk808";
550                 reg = <0x1b>;
551                 interrupt-parent = <&gpio1>;
552                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
553                 pinctrl-names = "default";
554                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
555                 rockchip,system-power-controller;
556                 wakeup-source;
557                 #clock-cells = <1>;
558                 clock-output-names = "xin32k", "rk808-clkout2";
559
560                 vcc1-supply = <&vcc3v3_sys>;
561                 vcc2-supply = <&vcc3v3_sys>;
562                 vcc3-supply = <&vcc3v3_sys>;
563                 vcc4-supply = <&vcc3v3_sys>;
564                 vcc6-supply = <&vcc3v3_sys>;
565                 vcc7-supply = <&vcc3v3_sys>;
566                 vcc8-supply = <&vcc3v3_sys>;
567                 vcc9-supply = <&vcc3v3_sys>;
568                 vcc10-supply = <&vcc3v3_sys>;
569                 vcc11-supply = <&vcc3v3_sys>;
570                 vcc12-supply = <&vcc3v3_sys>;
571                 vddio-supply = <&vcc1v8_pmu>;
572
573                 regulators {
574                         vdd_center: DCDC_REG1 {
575                                 regulator-always-on;
576                                 regulator-boot-on;
577                                 regulator-min-microvolt = <750000>;
578                                 regulator-max-microvolt = <1350000>;
579                                 regulator-ramp-delay = <6001>;
580                                 regulator-name = "vdd_center";
581                                 regulator-state-mem {
582                                         regulator-off-in-suspend;
583                                 };
584                         };
585
586                         vdd_cpu_l: DCDC_REG2 {
587                                 regulator-always-on;
588                                 regulator-boot-on;
589                                 regulator-min-microvolt = <750000>;
590                                 regulator-max-microvolt = <1350000>;
591                                 regulator-ramp-delay = <6001>;
592                                 regulator-name = "vdd_cpu_l";
593                                 regulator-state-mem {
594                                         regulator-off-in-suspend;
595                                 };
596                         };
597
598                         vcc_ddr: DCDC_REG3 {
599                                 regulator-always-on;
600                                 regulator-boot-on;
601                                 regulator-name = "vcc_ddr";
602                                 regulator-state-mem {
603                                         regulator-on-in-suspend;
604                                 };
605                         };
606
607                         vcc_1v8: DCDC_REG4 {
608                                 regulator-always-on;
609                                 regulator-boot-on;
610                                 regulator-min-microvolt = <1800000>;
611                                 regulator-max-microvolt = <1800000>;
612                                 regulator-name = "vcc_1v8";
613                                 regulator-state-mem {
614                                         regulator-on-in-suspend;
615                                         regulator-suspend-microvolt = <1800000>;
616                                 };
617                         };
618
619                         vcc1v8_dvp: LDO_REG1 {
620                                 regulator-always-on;
621                                 regulator-boot-on;
622                                 regulator-min-microvolt = <1800000>;
623                                 regulator-max-microvolt = <1800000>;
624                                 regulator-name = "vcc1v8_dvp";
625                                 regulator-state-mem {
626                                         regulator-off-in-suspend;
627                                 };
628                         };
629
630                         vcc3v0_tp: LDO_REG2 {
631                                 regulator-always-on;
632                                 regulator-boot-on;
633                                 regulator-min-microvolt = <3000000>;
634                                 regulator-max-microvolt = <3000000>;
635                                 regulator-name = "vcc3v0_tp";
636                                 regulator-state-mem {
637                                         regulator-off-in-suspend;
638                                 };
639                         };
640
641                         vcc1v8_pmu: LDO_REG3 {
642                                 regulator-always-on;
643                                 regulator-boot-on;
644                                 regulator-min-microvolt = <1800000>;
645                                 regulator-max-microvolt = <1800000>;
646                                 regulator-name = "vcc1v8_pmu";
647                                 regulator-state-mem {
648                                         regulator-on-in-suspend;
649                                         regulator-suspend-microvolt = <1800000>;
650                                 };
651                         };
652
653                         vcc_sd: LDO_REG4 {
654                                 regulator-always-on;
655                                 regulator-boot-on;
656                                 regulator-min-microvolt = <1800000>;
657                                 regulator-max-microvolt = <3300000>;
658                                 regulator-name = "vcc_sd";
659                                 regulator-state-mem {
660                                         regulator-on-in-suspend;
661                                         regulator-suspend-microvolt = <3300000>;
662                                 };
663                         };
664
665                         vcca3v0_codec: LDO_REG5 {
666                                 regulator-always-on;
667                                 regulator-boot-on;
668                                 regulator-min-microvolt = <3000000>;
669                                 regulator-max-microvolt = <3000000>;
670                                 regulator-name = "vcca3v0_codec";
671                                 regulator-state-mem {
672                                         regulator-off-in-suspend;
673                                 };
674                         };
675
676                         vcc_1v5: LDO_REG6 {
677                                 regulator-always-on;
678                                 regulator-boot-on;
679                                 regulator-min-microvolt = <1500000>;
680                                 regulator-max-microvolt = <1500000>;
681                                 regulator-name = "vcc_1v5";
682                                 regulator-state-mem {
683                                         regulator-on-in-suspend;
684                                         regulator-suspend-microvolt = <1500000>;
685                                 };
686                         };
687
688                         vcca1v8_codec: LDO_REG7 {
689                                 regulator-always-on;
690                                 regulator-boot-on;
691                                 regulator-min-microvolt = <1800000>;
692                                 regulator-max-microvolt = <1800000>;
693                                 regulator-name = "vcca1v8_codec";
694                                 regulator-state-mem {
695                                         regulator-off-in-suspend;
696                                 };
697                         };
698
699                         vcc_3v0: LDO_REG8 {
700                                 regulator-always-on;
701                                 regulator-boot-on;
702                                 regulator-min-microvolt = <3000000>;
703                                 regulator-max-microvolt = <3000000>;
704                                 regulator-name = "vcc_3v0";
705                                 regulator-state-mem {
706                                         regulator-on-in-suspend;
707                                         regulator-suspend-microvolt = <3000000>;
708                                 };
709                         };
710
711                         vcc3v3_s3: SWITCH_REG1 {
712                                 regulator-always-on;
713                                 regulator-boot-on;
714                                 regulator-name = "vcc3v3_s3";
715                                 regulator-state-mem {
716                                         regulator-off-in-suspend;
717                                 };
718                         };
719
720                         vcc3v3_s0: SWITCH_REG2 {
721                                 regulator-always-on;
722                                 regulator-boot-on;
723                                 regulator-name = "vcc3v3_s0";
724                                 regulator-state-mem {
725                                         regulator-off-in-suspend;
726                                 };
727                         };
728                 };
729         };
730 };
731
732 &i2c1 {
733         status = "okay";
734         i2c-scl-rising-time-ns = <300>;
735         i2c-scl-falling-time-ns = <15>;
736
737         rt5640: rt5640@1c {
738                 #sound-dai-cells = <0>;
739                 compatible = "realtek,rt5640";
740                 reg = <0x1c>;
741                 clocks = <&cru SCLK_I2S_8CH_OUT>;
742                 clock-names = "mclk";
743                 realtek,in1-differential;
744                 pinctrl-names = "default";
745                 pinctrl-0 = <&rt5640_hpcon>;
746                 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
747                 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
748                 io-channels = <&saradc 4>;
749                 hp-det-adc-value = <500>;
750         };
751 };
752
753 &i2c3 {
754         status = "okay";
755         i2c-scl-rising-time-ns = <450>;
756         i2c-scl-falling-time-ns = <15>;
757 };
758
759 &i2c4 {
760         status = "okay";
761         i2c-scl-rising-time-ns = <475>;
762         i2c-scl-falling-time-ns = <26>;
763
764         fusb0: fusb30x@22 {
765                 compatible = "fairchild,fusb302";
766                 reg = <0x22>;
767                 pinctrl-names = "default";
768                 pinctrl-0 = <&fusb0_int>;
769                 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
770                 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
771                 status = "okay";
772         };
773
774         gsl3680: gsl3680@40 {
775                 status = "okay";
776                 compatible = "gslX680";
777                 reg = <0x40>;
778                 screen_max_x = <1536>;
779                 screen_max_y = <2048>;
780                 touch-gpio = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
781                 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
782     };
783
784         mpu6050:mpu@68{
785                         status = "disabled";
786             compatible = "invensense,mpu6050";
787             reg = <0x68>;
788             mpu-int_config = <0x10>;
789             mpu-level_shifter = <0>;
790             mpu-orientation = <0 1 0 1 0 0 0 0 1>;
791             orientation-x= <1>;
792             orientation-y= <1>;
793             orientation-z= <1>;
794             irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
795             mpu-debug = <1>;
796         };
797 };
798
799 &i2s0 {
800         status = "okay";
801         rockchip,i2s-broken-burst-len;
802         rockchip,playback-channels = <8>;
803         rockchip,capture-channels = <8>;
804         assigned-clocks = <&cru SCLK_I2S0_DIV>, <&cru SCLK_I2S_8CH>;
805         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S0_8CH>;
806         #sound-dai-cells = <0>;
807 };
808
809 &i2s1 {
810         status = "okay";
811         rockchip,i2s-broken-burst-len;
812         rockchip,playback-channels = <2>;
813         rockchip,capture-channels = <2>;
814         assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
815         assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
816         #sound-dai-cells = <0>;
817 };
818
819 &i2s2 {
820         #sound-dai-cells = <0>;
821         status = "okay";
822 };
823
824 &io_domains {
825         status = "okay";
826
827         bt656-supply = <&vcc1v8_dvp>;           /* bt656_gpio2ab_ms */
828         audio-supply = <&vcca1v8_codec>;        /* audio_gpio3d4a_ms */
829         sdmmc-supply = <&vcc_sd>;               /* sdmmc_gpio4b_ms */
830         gpio1830-supply = <&vcc_3v0>;           /* gpio1833_gpio4cd_ms */
831 };
832
833 &pcie_phy {
834         status = "okay";
835 };
836
837 &pcie0 {
838         ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
839         num-lanes = <4>;
840         pinctrl-names = "default";
841         pinctrl-0 = <&pcie_clkreqn_cpm>;
842         status = "okay";
843 };
844
845 &pmu_io_domains {
846         status = "okay";
847         pmu1830-supply = <&vcc_3v0>;
848 };
849
850 &pinctrl {
851         buttons {
852                 pwrbtn: pwrbtn {
853                         rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
854                 };
855         };
856         lcd-panel {
857                 lcd_panel_reset: lcd-panel-reset {
858                         rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
859                 };
860         
861                 lcd_en: lcd-en {
862                         rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
863                 };
864         };
865         pcie {
866                 pcie_drv: pcie-drv {
867                         rockchip,pins =
868                                 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
869                 };
870                 pcie_3g_drv: pcie-3g-drv {
871                 rockchip,pins =
872                                 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
873                 };
874
875         };
876
877         pmic {
878                 vsel1_gpio: vsel1-gpio {
879                         rockchip,pins =
880                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
881                 };
882
883                 vsel2_gpio: vsel2-gpio {
884                         rockchip,pins =
885                         <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
886                 };
887         };
888
889         sdio-pwrseq {
890                 wifi_enable_h: wifi-enable-h {
891                         rockchip,pins =
892                                 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
893                 };
894         };
895
896         wireless-bluetooth {
897                 uart0_gpios: uart0-gpios {
898                         rockchip,pins =
899                                 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
900                 };
901         };
902
903         leds {
904                 led_power: led-power {
905                         rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
906                 };
907
908                 led_user: led-user {
909                         rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
910                 };
911         };
912
913         rt5640 {
914                 rt5640_hpcon: rt5640-hpcon {
915                         rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
916                 };
917         };
918
919         pmic {
920                 pmic_int_l: pmic-int-l {
921                         rockchip,pins =
922                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
923                 };
924
925                 pmic_dvs2: pmic-dvs2 {
926                         rockchip,pins =
927                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
928                 };
929         };
930
931         usb2 {
932                 host_vbus_drv: host-vbus-drv {
933                         rockchip,pins =
934                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
935                 };
936         };
937
938         fusb30x {
939                 fusb0_int: fusb0-int {
940                         rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
941                 };
942         };
943 };
944
945 &pwm0 {
946         status = "okay";
947 };
948
949 &pwm1 {
950         status = "okay";
951 };
952
953 &pwm2 {
954         status = "okay";
955 };
956
957 &rkvdec {
958         status = "okay";
959 };
960
961 &rockchip_suspend {
962         rockchip,power-ctrl =
963                 <&gpio1 18 GPIO_ACTIVE_LOW>,
964                 <&gpio1 14 GPIO_ACTIVE_HIGH>;
965 };
966
967 &route_edp {
968         status = "disabled";
969 };
970
971 &route_hdmi {
972         status = "okay";
973         logo,mode = "center";
974 };
975
976 &cdn_dp {
977         status = "disabled";
978         extcon = <&fusb0>;
979         phys = <&tcphy0_dp>;
980 };
981
982 &hdmi_in_vopl {
983         status = "disabled";
984 };
985
986 &dsi_in_vopb {
987         status = "okay";
988 };
989
990 &dsi_in_vopl {
991         status = "okay";
992 };
993
994 &dp_in_vopb {
995         status = "disabled";
996 };
997
998 &saradc {
999         status = "okay";
1000         vref-supply = <&vccadc_ref>;
1001 };
1002
1003 &sdhci {
1004         bus-width = <8>;
1005         keep-power-in-suspend;
1006         mmc-hs400-1_8v;
1007         mmc-hs400-enhanced-strobe;
1008         non-removable;
1009         status = "okay";
1010         supports-emmc;
1011 };
1012
1013 &sdmmc {
1014         max-frequency = <150000000>;
1015         supports-sd;
1016         bus-width = <4>;
1017         cap-mmc-highspeed;
1018         cap-sd-highspeed;
1019         disable-wp;
1020         num-slots = <1>;
1021         vqmmc-supply = <&vcc_sd>;
1022         pinctrl-names = "default";
1023         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
1024         status = "okay";
1025 };
1026
1027 &sdio0 {
1028         max-frequency = <50000000>;
1029         supports-sdio;
1030         bus-width = <4>;
1031         disable-wp;
1032         cap-sd-highspeed;
1033         keep-power-in-suspend;
1034         mmc-pwrseq = <&sdio_pwrseq>;
1035         non-removable;
1036         num-slots = <1>;
1037         pinctrl-names = "default";
1038         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
1039         sd-uhs-sdr104;
1040         status = "okay";
1041 };
1042
1043 &spdif {
1044         status = "okay";
1045         pinctrl-0 = <&spdif_bus_1>;
1046         i2c-scl-rising-time-ns = <450>;
1047         i2c-scl-falling-time-ns = <15>;
1048         #sound-dai-cells = <0>;
1049 };
1050
1051 &tcphy0 {
1052         extcon = <&fusb0>;
1053         status = "okay";
1054 };
1055
1056 &tcphy1 {
1057         status = "okay";
1058 };
1059
1060 &tsadc {
1061         /* tshut mode 0:CRU 1:GPIO */
1062         rockchip,hw-tshut-mode = <1>;
1063         /* tshut polarity 0:LOW 1:HIGH */
1064         rockchip,hw-tshut-polarity = <1>;
1065         status = "okay";
1066 };
1067
1068 &u2phy0 {
1069         status = "okay";
1070         extcon = <&fusb0>;
1071
1072         u2phy0_otg: otg-port {
1073                 status = "okay";
1074         };
1075
1076         u2phy0_host: host-port {
1077                 phy-supply = <&vcc5v0_host>;
1078                 status = "okay";
1079         };
1080 };
1081
1082 &u2phy1 {
1083         status = "okay";
1084
1085         u2phy1_otg: otg-port {
1086                 status = "okay";
1087         };
1088
1089         u2phy1_host: host-port {
1090                 phy-supply = <&vcc5v0_host>;
1091                 status = "okay";
1092         };
1093 };
1094
1095 &pwm3 {
1096         status = "okay";
1097         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1098         compatible = "rockchip,remotectl-pwm";
1099         remote_pwm_id = <3>;
1100         handle_cpu_id = <0>;
1101
1102     ir_key1{
1103         rockchip,usercode = <0xff00>;
1104         rockchip,key_table =
1105             <0xeb   KEY_POWER>,
1106             <0xec   KEY_COMPOSE>,
1107             <0xfe   KEY_BACK>,
1108             <0xb7   KEY_HOME>,
1109             <0xa3   KEY_WWW>,
1110             <0xf4   KEY_VOLUMEUP>,
1111             <0xa7   KEY_VOLUMEDOWN>,
1112             <0xf8   KEY_ENTER>,
1113             <0xfc   KEY_UP>,
1114             <0xfd   KEY_DOWN>,
1115             <0xf1   KEY_LEFT>,
1116             <0xe5   KEY_RIGHT>;
1117     };
1118 };
1119
1120 &uart0 {
1121         pinctrl-names = "default";
1122         pinctrl-0 = <&uart0_xfer &uart0_cts>;
1123         status = "okay";
1124 };
1125
1126 &uart2 {
1127         status = "okay";
1128 };
1129
1130 &uart4 {
1131         current-speed = <9600>;
1132         no-loopback-test;
1133         status = "okay";
1134 };
1135
1136 &usbdrd3_0 {
1137         status = "okay";
1138         extcon = <&fusb0>;
1139 };
1140
1141 &usbdrd3_1 {
1142         status = "okay";
1143 };
1144
1145 &usbdrd_dwc3_0 {
1146         status = "okay";
1147 };
1148
1149 &usbdrd_dwc3_1 {
1150         status = "okay";
1151         dr_mode = "host";
1152 };
1153
1154 &usb_host0_ehci {
1155         status = "okay";
1156 };
1157
1158 &usb_host0_ohci {
1159         status = "okay";
1160 };
1161
1162 &usb_host1_ehci {
1163         status = "okay";
1164 };
1165
1166 &usb_host1_ohci {
1167         status = "okay";
1168 };
1169
1170 &vopb {
1171         status = "okay";
1172 };
1173
1174 &vopb_mmu {
1175         status = "okay";
1176 };
1177
1178 &vopl {
1179         status = "okay";
1180 };
1181
1182 &vopl_mmu {
1183         status = "okay";
1184 };
1185
1186 &vpu {
1187         status = "okay";
1188         /* 0 means ion, 1 means drm */
1189         //allocator = <0>;
1190 };