2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
52 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53 compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
55 backlight: backlight {
57 compatible = "pwm-backlight";
58 pwms = <&pwm1 0 25000 0>;
62 16 17 18 19 20 21 22 23
63 24 25 26 27 28 29 30 31
64 32 33 34 35 36 37 38 39
65 40 41 42 43 44 45 46 47
66 48 49 50 51 52 53 54 55
67 56 57 58 59 60 61 62 63
68 64 65 66 67 68 69 70 71
69 72 73 74 75 76 77 78 79
70 80 81 82 83 84 85 86 87
71 88 89 90 91 92 93 94 95
72 96 97 98 99 100 101 102 103
73 104 105 106 107 108 109 110 111
74 112 113 114 115 116 117 118 119
75 120 121 122 123 124 125 126 127
76 128 129 130 131 132 133 134 135
77 136 137 138 139 140 141 142 143
78 144 145 146 147 148 149 150 151
79 152 153 154 155 156 157 158 159
80 160 161 162 163 164 165 166 167
81 168 169 170 171 172 173 174 175
82 176 177 178 179 180 181 182 183
83 184 185 186 187 188 189 190 191
84 192 193 194 195 196 197 198 199
85 200 201 202 203 204 205 206 207
86 208 209 210 211 212 213 214 215
87 216 217 218 219 220 221 222 223
88 224 225 226 227 228 229 230 231
89 232 233 234 235 236 237 238 239
90 240 241 242 243 244 245 246 247
91 248 249 250 251 252 253 254 255>;
92 default-brightness-level = <200>;
95 clkin_gmac: external-gmac-clock {
96 compatible = "fixed-clock";
97 clock-frequency = <125000000>;
98 clock-output-names = "clkin_gmac";
102 dw_hdmi_audio: dw-hdmi-audio {
104 compatible = "rockchip,dw-hdmi-audio";
105 #sound-dai-cells = <0>;
108 edp_panel: edp-panel {
110 compatible = "sharp,lcd-f402", "panel-simple";
111 backlight = <&backlight>;
112 power-supply = <&vcc_lcd>;
113 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&lcd_panel_reset>;
118 panel_in_edp: endpoint {
119 remote-endpoint = <&edp_out_panel>;
124 fiq_debugger: fiq-debugger {
125 compatible = "rockchip,fiq-debugger";
126 rockchip,serial-id = <2>;
127 rockchip,signal-irq = <182>;
128 rockchip,wake-irq = <0>;
129 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
130 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
131 pinctrl-names = "default";
132 pinctrl-0 = <&uart2c_xfer>;
136 compatible = "gpio-keys";
137 #address-cells = <1>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pwrbtn>;
145 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146 linux,code = <KEY_POWER>;
147 label = "GPIO Key Power";
148 linux,input-type = <1>;
149 gpio-key,wakeup = <1>;
150 debounce-interval = <100>;
155 compatible = "simple-audio-card";
156 simple-audio-card,format = "i2s";
157 simple-audio-card,name = "rockchip,rt5640-codec";
158 simple-audio-card,mclk-fs = <256>;
159 simple-audio-card,widgets =
160 "Microphone", "Mic Jack",
161 "Headphone", "Headphone Jack";
162 simple-audio-card,routing =
163 "Mic Jack", "MICBIAS1",
165 "Headphone Jack", "HPOL",
166 "Headphone Jack", "HPOR";
167 simple-audio-card,cpu {
170 simple-audio-card,codec {
171 sound-dai = <&rt5640>;
175 hdmi_sound: hdmi-sound {
177 compatible = "simple-audio-card";
178 simple-audio-card,format = "i2s";
179 simple-audio-card,mclk-fs = <256>;
180 simple-audio-card,name = "rockchip,hdmi";
182 simple-audio-card,cpu {
185 simple-audio-card,codec {
186 sound-dai = <&dw_hdmi_audio>;
190 hdmi_codec: hdmi-codec {
191 compatible = "simple-audio-card";
192 simple-audio-card,format = "i2s";
193 simple-audio-card,mclk-fs = <256>;
194 simple-audio-card,name = "HDMI-CODEC";
196 simple-audio-card,cpu {
200 simple-audio-card,codec {
207 compatible = "simple-audio-card";
208 simple-audio-card,name = "ROCKCHIP,SPDIF";
209 simple-audio-card,cpu {
210 sound-dai = <&spdif>;
212 simple-audio-card,codec {
213 sound-dai = <&spdif_out>;
217 spdif_out: spdif-out {
219 compatible = "linux,spdif-dit";
220 #sound-dai-cells = <0>;
223 sdio_pwrseq: sdio-pwrseq {
224 compatible = "mmc-pwrseq-simple";
226 clock-names = "ext_clock";
227 pinctrl-names = "default";
228 pinctrl-0 = <&wifi_enable_h>;
231 * On the module itself this is one of these (depending
232 * on the actual card populated):
233 * - SDIO_RESET_L_WL_REG_ON
234 * - PDN (power down when low)
236 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
239 vcc3v3_pcie: vcc3v3-pcie-regulator {
240 compatible = "regulator-fixed";
244 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pcie_drv>;
247 regulator-name = "vcc3v3_pcie";
250 vcc3v3_3g: vcc3v3-3g-regulator {
251 compatible = "regulator-fixed";
255 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pcie_3g_drv>;
258 regulator-name = "vcc3v3_3g";
261 vcc3v3_sys: vcc3v3-sys {
262 compatible = "regulator-fixed";
263 regulator-name = "vcc3v3_sys";
266 regulator-min-microvolt = <3300000>;
267 regulator-max-microvolt = <3300000>;
270 vcc5v0_host: vcc5v0-host-regulator {
271 compatible = "regulator-fixed";
273 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&host_vbus_drv>;
276 regulator-name = "vcc5v0_host";
280 vcc5v0_sys: vcc5v0-sys {
281 compatible = "regulator-fixed";
282 regulator-name = "vcc5v0_sys";
285 regulator-min-microvolt = <5000000>;
286 regulator-max-microvolt = <5000000>;
289 vcc_phy: vcc-phy-regulator {
290 compatible = "regulator-fixed";
291 regulator-name = "vcc_phy";
297 compatible = "pwm-regulator";
298 pwms = <&pwm2 0 25000 1>;
299 regulator-name = "vdd_log";
300 regulator-min-microvolt = <800000>;
301 regulator-max-microvolt = <1100000>;
305 /* for rockchip boot on */
306 rockchip,pwm_id= <2>;
307 rockchip,pwm_voltage = <1000000>;
310 vccadc_ref: vccadc-ref {
311 compatible = "regulator-fixed";
312 regulator-name = "vcc1v8_sys";
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
319 vcc_lcd: vcc-lcd-regulator {
320 compatible = "regulator-fixed";
324 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&lcd_en>;
327 regulator-name = "vcc_lcd";
331 compatible = "wlan-platdata";
332 rockchip,grf = <&grf>;
333 wifi_chip_type = "ap6354";
335 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
340 compatible = "bluetooth-platdata";
341 //wifi-bt-power-toggle;
343 clock-names = "ext_clock";
344 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
345 pinctrl-names = "default", "rts_gpio";
346 pinctrl-0 = <&uart0_rts>;
347 pinctrl-1 = <&uart0_gpios>;
348 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
349 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
350 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
351 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
356 compatible = "gpio-leds";
358 label = "firefly:blue:power";
359 linux,default-trigger = "ir-power-click";
360 default-state = "on";
361 gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&led_power>;
366 label = "firefly:yellow:user";
367 linux,default-trigger = "ir-user-click";
368 default-state = "off";
369 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&led_user>;
379 compatible ="simple-panel-dsi";
381 backlight = <&backlight>;
382 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
383 dsi,format = <MIPI_DSI_FMT_RGB888>;
384 //bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
390 delay,unprepare = <0>;
391 delay,disable = <20>;
397 panel-init-sequence = [
402 panel-exit-sequence = [
407 disp_timings: display-timings {
408 native-mode = <&timing0>;
410 clock-frequency = <64000000>;
413 hsync-len = <5>; //20, 50
414 hback-porch = <25>; //50, 56
415 hfront-porch = <150>;//50, 30
418 vfront-porch = <100>;
422 pixelclk-active = <0>;
429 cpu-supply = <&vdd_cpu_l>;
433 cpu-supply = <&vdd_cpu_l>;
437 cpu-supply = <&vdd_cpu_l>;
441 cpu-supply = <&vdd_cpu_l>;
445 cpu-supply = <&vdd_cpu_b>;
449 cpu-supply = <&vdd_cpu_b>;
462 #address-cells = <1>;
465 edp_out_panel: endpoint@0 {
467 remote-endpoint = <&panel_in_edp>;
478 phy-supply = <&vcc_phy>;
480 clock_in_out = "input";
481 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
482 snps,reset-active-low;
483 snps,reset-delays-us = <0 10000 50000>;
484 assigned-clocks = <&cru SCLK_RMII_SRC>;
485 assigned-clock-parents = <&clkin_gmac>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&rgmii_pins>;
495 mali-supply = <&vdd_gpu>;
499 #address-cells = <1>;
501 #sound-dai-cells = <0>;
507 i2c-scl-rising-time-ns = <168>;
508 i2c-scl-falling-time-ns = <4>;
509 clock-frequency = <400000>;
511 vdd_cpu_b: syr827@40 {
512 compatible = "silergy,syr827";
514 vin-supply = <&vcc5v0_sys>;
515 regulator-compatible = "fan53555-reg";
516 regulator-name = "vdd_cpu_b";
517 regulator-min-microvolt = <712500>;
518 regulator-max-microvolt = <1500000>;
519 regulator-ramp-delay = <1000>;
520 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
521 fcs,suspend-voltage-selector = <1>;
524 regulator-initial-state = <3>;
525 regulator-state-mem {
526 regulator-off-in-suspend;
531 compatible = "silergy,syr828";
533 vin-supply = <&vcc5v0_sys>;
534 regulator-compatible = "fan53555-reg";
535 regulator-name = "vdd_gpu";
536 regulator-min-microvolt = <712500>;
537 regulator-max-microvolt = <1500000>;
538 regulator-ramp-delay = <1000>;
539 fcs,suspend-voltage-selector = <1>;
542 regulator-initial-state = <3>;
543 regulator-state-mem {
544 regulator-off-in-suspend;
549 compatible = "rockchip,rk808";
551 interrupt-parent = <&gpio1>;
552 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
553 pinctrl-names = "default";
554 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
555 rockchip,system-power-controller;
558 clock-output-names = "xin32k", "rk808-clkout2";
560 vcc1-supply = <&vcc3v3_sys>;
561 vcc2-supply = <&vcc3v3_sys>;
562 vcc3-supply = <&vcc3v3_sys>;
563 vcc4-supply = <&vcc3v3_sys>;
564 vcc6-supply = <&vcc3v3_sys>;
565 vcc7-supply = <&vcc3v3_sys>;
566 vcc8-supply = <&vcc3v3_sys>;
567 vcc9-supply = <&vcc3v3_sys>;
568 vcc10-supply = <&vcc3v3_sys>;
569 vcc11-supply = <&vcc3v3_sys>;
570 vcc12-supply = <&vcc3v3_sys>;
571 vddio-supply = <&vcc1v8_pmu>;
574 vdd_center: DCDC_REG1 {
577 regulator-min-microvolt = <750000>;
578 regulator-max-microvolt = <1350000>;
579 regulator-ramp-delay = <6001>;
580 regulator-name = "vdd_center";
581 regulator-state-mem {
582 regulator-off-in-suspend;
586 vdd_cpu_l: DCDC_REG2 {
589 regulator-min-microvolt = <750000>;
590 regulator-max-microvolt = <1350000>;
591 regulator-ramp-delay = <6001>;
592 regulator-name = "vdd_cpu_l";
593 regulator-state-mem {
594 regulator-off-in-suspend;
601 regulator-name = "vcc_ddr";
602 regulator-state-mem {
603 regulator-on-in-suspend;
610 regulator-min-microvolt = <1800000>;
611 regulator-max-microvolt = <1800000>;
612 regulator-name = "vcc_1v8";
613 regulator-state-mem {
614 regulator-on-in-suspend;
615 regulator-suspend-microvolt = <1800000>;
619 vcc1v8_dvp: LDO_REG1 {
622 regulator-min-microvolt = <1800000>;
623 regulator-max-microvolt = <1800000>;
624 regulator-name = "vcc1v8_dvp";
625 regulator-state-mem {
626 regulator-off-in-suspend;
630 vcc3v0_tp: LDO_REG2 {
633 regulator-min-microvolt = <3000000>;
634 regulator-max-microvolt = <3000000>;
635 regulator-name = "vcc3v0_tp";
636 regulator-state-mem {
637 regulator-off-in-suspend;
641 vcc1v8_pmu: LDO_REG3 {
644 regulator-min-microvolt = <1800000>;
645 regulator-max-microvolt = <1800000>;
646 regulator-name = "vcc1v8_pmu";
647 regulator-state-mem {
648 regulator-on-in-suspend;
649 regulator-suspend-microvolt = <1800000>;
656 regulator-min-microvolt = <1800000>;
657 regulator-max-microvolt = <3300000>;
658 regulator-name = "vcc_sd";
659 regulator-state-mem {
660 regulator-on-in-suspend;
661 regulator-suspend-microvolt = <3300000>;
665 vcca3v0_codec: LDO_REG5 {
668 regulator-min-microvolt = <3000000>;
669 regulator-max-microvolt = <3000000>;
670 regulator-name = "vcca3v0_codec";
671 regulator-state-mem {
672 regulator-off-in-suspend;
679 regulator-min-microvolt = <1500000>;
680 regulator-max-microvolt = <1500000>;
681 regulator-name = "vcc_1v5";
682 regulator-state-mem {
683 regulator-on-in-suspend;
684 regulator-suspend-microvolt = <1500000>;
688 vcca1v8_codec: LDO_REG7 {
691 regulator-min-microvolt = <1800000>;
692 regulator-max-microvolt = <1800000>;
693 regulator-name = "vcca1v8_codec";
694 regulator-state-mem {
695 regulator-off-in-suspend;
702 regulator-min-microvolt = <3000000>;
703 regulator-max-microvolt = <3000000>;
704 regulator-name = "vcc_3v0";
705 regulator-state-mem {
706 regulator-on-in-suspend;
707 regulator-suspend-microvolt = <3000000>;
711 vcc3v3_s3: SWITCH_REG1 {
714 regulator-name = "vcc3v3_s3";
715 regulator-state-mem {
716 regulator-off-in-suspend;
720 vcc3v3_s0: SWITCH_REG2 {
723 regulator-name = "vcc3v3_s0";
724 regulator-state-mem {
725 regulator-off-in-suspend;
734 i2c-scl-rising-time-ns = <300>;
735 i2c-scl-falling-time-ns = <15>;
738 #sound-dai-cells = <0>;
739 compatible = "realtek,rt5640";
741 clocks = <&cru SCLK_I2S_8CH_OUT>;
742 clock-names = "mclk";
743 realtek,in1-differential;
744 pinctrl-names = "default";
745 pinctrl-0 = <&rt5640_hpcon>;
746 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
747 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
748 io-channels = <&saradc 4>;
749 hp-det-adc-value = <500>;
755 i2c-scl-rising-time-ns = <450>;
756 i2c-scl-falling-time-ns = <15>;
761 i2c-scl-rising-time-ns = <475>;
762 i2c-scl-falling-time-ns = <26>;
765 compatible = "fairchild,fusb302";
767 pinctrl-names = "default";
768 pinctrl-0 = <&fusb0_int>;
769 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
770 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
774 gsl3680: gsl3680@40 {
776 compatible = "gslX680";
778 screen_max_x = <1536>;
779 screen_max_y = <2048>;
780 touch-gpio = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
781 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
786 compatible = "invensense,mpu6050";
788 mpu-int_config = <0x10>;
789 mpu-level_shifter = <0>;
790 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
794 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
801 rockchip,i2s-broken-burst-len;
802 rockchip,playback-channels = <8>;
803 rockchip,capture-channels = <8>;
804 assigned-clocks = <&cru SCLK_I2S0_DIV>, <&cru SCLK_I2S_8CH>;
805 assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S0_8CH>;
806 #sound-dai-cells = <0>;
811 rockchip,i2s-broken-burst-len;
812 rockchip,playback-channels = <2>;
813 rockchip,capture-channels = <2>;
814 assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
815 assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
816 #sound-dai-cells = <0>;
820 #sound-dai-cells = <0>;
827 bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
828 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
829 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
830 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
838 ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
840 pinctrl-names = "default";
841 pinctrl-0 = <&pcie_clkreqn_cpm>;
847 pmu1830-supply = <&vcc_3v0>;
853 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
857 lcd_panel_reset: lcd-panel-reset {
858 rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
862 rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
868 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
870 pcie_3g_drv: pcie-3g-drv {
872 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
878 vsel1_gpio: vsel1-gpio {
880 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
883 vsel2_gpio: vsel2-gpio {
885 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
890 wifi_enable_h: wifi-enable-h {
892 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
897 uart0_gpios: uart0-gpios {
899 <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
904 led_power: led-power {
905 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
909 rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
914 rt5640_hpcon: rt5640-hpcon {
915 rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
920 pmic_int_l: pmic-int-l {
922 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
925 pmic_dvs2: pmic-dvs2 {
927 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
932 host_vbus_drv: host-vbus-drv {
934 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
939 fusb0_int: fusb0-int {
940 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
962 rockchip,power-ctrl =
963 <&gpio1 18 GPIO_ACTIVE_LOW>,
964 <&gpio1 14 GPIO_ACTIVE_HIGH>;
973 logo,mode = "center";
1000 vref-supply = <&vccadc_ref>;
1005 keep-power-in-suspend;
1007 mmc-hs400-enhanced-strobe;
1014 max-frequency = <150000000>;
1021 vqmmc-supply = <&vcc_sd>;
1022 pinctrl-names = "default";
1023 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
1028 max-frequency = <50000000>;
1033 keep-power-in-suspend;
1034 mmc-pwrseq = <&sdio_pwrseq>;
1037 pinctrl-names = "default";
1038 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
1045 pinctrl-0 = <&spdif_bus_1>;
1046 i2c-scl-rising-time-ns = <450>;
1047 i2c-scl-falling-time-ns = <15>;
1048 #sound-dai-cells = <0>;
1061 /* tshut mode 0:CRU 1:GPIO */
1062 rockchip,hw-tshut-mode = <1>;
1063 /* tshut polarity 0:LOW 1:HIGH */
1064 rockchip,hw-tshut-polarity = <1>;
1072 u2phy0_otg: otg-port {
1076 u2phy0_host: host-port {
1077 phy-supply = <&vcc5v0_host>;
1085 u2phy1_otg: otg-port {
1089 u2phy1_host: host-port {
1090 phy-supply = <&vcc5v0_host>;
1097 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1098 compatible = "rockchip,remotectl-pwm";
1099 remote_pwm_id = <3>;
1100 handle_cpu_id = <0>;
1103 rockchip,usercode = <0xff00>;
1104 rockchip,key_table =
1110 <0xf4 KEY_VOLUMEUP>,
1111 <0xa7 KEY_VOLUMEDOWN>,
1121 pinctrl-names = "default";
1122 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1131 current-speed = <9600>;
1188 /* 0 means ion, 1 means drm */