2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "dt-bindings/pwm/pwm.h"
46 #include "rk3399.dtsi"
47 #include "rk3399-opp.dtsi"
48 #include "rk3399-linux.dtsi"
49 #include <dt-bindings/input/input.h>
52 model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
53 compatible = "rockchip,rk3399-firefly-mini-linux", "rockchip,rk3399";
55 backlight: backlight {
57 compatible = "pwm-backlight";
58 pwms = <&pwm0 0 25000 0>;
62 16 17 18 19 20 21 22 23
63 24 25 26 27 28 29 30 31
64 32 33 34 35 36 37 38 39
65 40 41 42 43 44 45 46 47
66 48 49 50 51 52 53 54 55
67 56 57 58 59 60 61 62 63
68 64 65 66 67 68 69 70 71
69 72 73 74 75 76 77 78 79
70 80 81 82 83 84 85 86 87
71 88 89 90 91 92 93 94 95
72 96 97 98 99 100 101 102 103
73 104 105 106 107 108 109 110 111
74 112 113 114 115 116 117 118 119
75 120 121 122 123 124 125 126 127
76 128 129 130 131 132 133 134 135
77 136 137 138 139 140 141 142 143
78 144 145 146 147 148 149 150 151
79 152 153 154 155 156 157 158 159
80 160 161 162 163 164 165 166 167
81 168 169 170 171 172 173 174 175
82 176 177 178 179 180 181 182 183
83 184 185 186 187 188 189 190 191
84 192 193 194 195 196 197 198 199
85 200 201 202 203 204 205 206 207
86 208 209 210 211 212 213 214 215
87 216 217 218 219 220 221 222 223
88 224 225 226 227 228 229 230 231
89 232 233 234 235 236 237 238 239
90 240 241 242 243 244 245 246 247
91 248 249 250 251 252 253 254 255>;
92 default-brightness-level = <200>;
95 clkin_gmac: external-gmac-clock {
96 compatible = "fixed-clock";
97 clock-frequency = <125000000>;
98 clock-output-names = "clkin_gmac";
102 dw_hdmi_audio: dw-hdmi-audio {
104 compatible = "rockchip,dw-hdmi-audio";
105 #sound-dai-cells = <0>;
108 edp_panel: edp-panel {
110 compatible = "sharp,lcd-f402", "panel-simple";
111 backlight = <&backlight>;
112 power-supply = <&vcc_lcd>;
113 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&lcd_panel_reset>;
118 panel_in_edp: endpoint {
119 remote-endpoint = <&edp_out_panel>;
124 fiq_debugger: fiq-debugger {
125 compatible = "rockchip,fiq-debugger";
126 rockchip,serial-id = <2>;
127 rockchip,signal-irq = <182>;
128 rockchip,wake-irq = <0>;
129 rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
130 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
131 pinctrl-names = "default";
132 pinctrl-0 = <&uart2c_xfer>;
136 compatible = "gpio-keys";
137 #address-cells = <1>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&pwrbtn>;
145 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
146 linux,code = <KEY_POWER>;
147 label = "GPIO Key Power";
148 linux,input-type = <1>;
149 gpio-key,wakeup = <1>;
150 debounce-interval = <100>;
156 compatible = "simple-audio-card";
157 simple-audio-card,format = "i2s";
158 simple-audio-card,name = "rockchip,rt5640-codec";
159 simple-audio-card,mclk-fs = <256>;
160 simple-audio-card,widgets =
161 "Microphone", "Mic Jack",
162 "Headphone", "Headphone Jack";
163 simple-audio-card,routing =
164 "Mic Jack", "MICBIAS1",
166 "Headphone Jack", "HPOL",
167 "Headphone Jack", "HPOR";
168 simple-audio-card,cpu {
171 simple-audio-card,codec {
172 sound-dai = <&rt5640>;
177 compatible = "simple-audio-card";
178 simple-audio-card,format = "i2s";
179 simple-audio-card,name = "rockchip,es8323-codec";
180 simple-audio-card,mclk-fs = <256>;
181 simple-audio-card,widgets =
182 "Microphone","Mic Jack",
183 "Headphone","Headphone Jack";
184 simple-audio-card,routing =
185 "Mic Jack","MICBIAS1",
187 "Headphone Jack","HPOL",
188 "Headphone Jack","HPOR";
189 simple-audio-card,cpu {
192 simple-audio-card,codec {
193 sound-dai = <&es8323>;
198 hdmi_sound: hdmi-sound {
200 compatible = "simple-audio-card";
201 simple-audio-card,format = "i2s";
202 simple-audio-card,mclk-fs = <256>;
203 simple-audio-card,name = "rockchip,hdmi";
205 simple-audio-card,cpu {
208 simple-audio-card,codec {
209 sound-dai = <&dw_hdmi_audio>;
213 hdmi_codec: hdmi-codec {
214 compatible = "simple-audio-card";
215 simple-audio-card,format = "i2s";
216 simple-audio-card,mclk-fs = <256>;
217 simple-audio-card,name = "HDMI-CODEC";
219 simple-audio-card,cpu {
223 simple-audio-card,codec {
228 sdio_pwrseq: sdio-pwrseq {
229 compatible = "mmc-pwrseq-simple";
231 clock-names = "ext_clock";
232 pinctrl-names = "default";
233 pinctrl-0 = <&wifi_enable_h>;
236 * On the module itself this is one of these (depending
237 * on the actual card populated):
238 * - SDIO_RESET_L_WL_REG_ON
239 * - PDN (power down when low)
241 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
244 vcc3v3_pcie: vcc3v3-pcie-regulator {
246 compatible = "regulator-fixed";
250 gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&pcie_drv>;
253 regulator-name = "vcc3v3_pcie";
256 vcc3v3_sys: vcc3v3-sys {
257 compatible = "regulator-fixed";
258 regulator-name = "vcc3v3_sys";
261 regulator-min-microvolt = <3300000>;
262 regulator-max-microvolt = <3300000>;
265 vcc5v0_host: vcc5v0-host-regulator {
266 compatible = "regulator-fixed";
268 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&host_vbus_drv>;
271 regulator-name = "vcc5v0_host";
275 vbus_5v: vbus-5v-regulator {
276 compatible = "regulator-fixed";
280 gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&vbus_5v_drv>;
283 regulator-name = "vbus_5v";
286 vcc5v0_sys: vcc5v0-sys {
287 compatible = "regulator-fixed";
288 regulator-name = "vcc5v0_sys";
291 regulator-min-microvolt = <5000000>;
292 regulator-max-microvolt = <5000000>;
295 vcc_phy: vcc-phy-regulator {
296 compatible = "regulator-fixed";
297 regulator-name = "vcc_phy";
303 compatible = "pwm-regulator";
304 pwms = <&pwm2 0 25000 1>;
305 regulator-name = "vdd_log";
306 regulator-min-microvolt = <800000>;
307 regulator-max-microvolt = <1400000>;
311 /* for rockchip boot on */
312 rockchip,pwm_id= <2>;
313 rockchip,pwm_voltage = <1000000>;
316 vccadc_ref: vccadc-ref {
317 compatible = "regulator-fixed";
318 regulator-name = "vcc1v8_sys";
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <1800000>;
325 vcc_lcd: vcc-lcd-regulator {
326 compatible = "regulator-fixed";
330 gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&lcd_en>;
333 regulator-name = "vcc_lcd";
337 compatible = "wlan-platdata";
338 rockchip,grf = <&grf>;
339 wifi_chip_type = "ap6212";
341 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
346 compatible = "bluetooth-platdata";
347 //wifi-bt-power-toggle;
349 clock-names = "ext_clock";
350 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
351 pinctrl-names = "default", "rts_gpio";
352 pinctrl-0 = <&uart0_rts>;
353 pinctrl-1 = <&uart0_gpios>;
354 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
355 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
356 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
357 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
362 compatible = "gpio-leds";
364 label = "firefly:blue:power";
365 linux,default-trigger = "ir-power-click";
366 default-state = "on";
367 gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&led_power>;
372 label = "firefly:yellow:user";
373 linux,default-trigger = "ir-user-click";
374 default-state = "off";
375 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&led_user>;
383 cpu-supply = <&vdd_cpu_l>;
387 cpu-supply = <&vdd_cpu_l>;
391 cpu-supply = <&vdd_cpu_l>;
395 cpu-supply = <&vdd_cpu_l>;
399 cpu-supply = <&vdd_cpu_b>;
403 cpu-supply = <&vdd_cpu_b>;
416 #address-cells = <1>;
419 edp_out_panel: endpoint@0 {
421 remote-endpoint = <&panel_in_edp>;
432 phy-supply = <&vcc_phy>;
434 clock_in_out = "input";
435 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
436 snps,reset-active-low;
437 snps,reset-delays-us = <0 10000 50000>;
438 assigned-clocks = <&cru SCLK_RMII_SRC>;
439 assigned-clock-parents = <&clkin_gmac>;
440 pinctrl-names = "default";
441 pinctrl-0 = <&rgmii_pins>;
449 mali-supply = <&vdd_gpu>;
453 #address-cells = <1>;
455 #sound-dai-cells = <0>;
461 i2c-scl-rising-time-ns = <168>;
462 i2c-scl-falling-time-ns = <4>;
463 clock-frequency = <400000>;
465 vdd_cpu_b: syr827@40 {
466 compatible = "silergy,syr827";
468 vin-supply = <&vcc5v0_sys>;
469 regulator-compatible = "fan53555-reg";
470 regulator-name = "vdd_cpu_b";
471 regulator-min-microvolt = <712500>;
472 regulator-max-microvolt = <1500000>;
473 regulator-ramp-delay = <1000>;
474 vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
475 fcs,suspend-voltage-selector = <1>;
478 regulator-initial-state = <3>;
479 regulator-state-mem {
480 regulator-off-in-suspend;
485 compatible = "silergy,syr828";
487 vin-supply = <&vcc5v0_sys>;
488 regulator-compatible = "fan53555-reg";
489 regulator-name = "vdd_gpu";
490 regulator-min-microvolt = <712500>;
491 regulator-max-microvolt = <1500000>;
492 regulator-ramp-delay = <1000>;
493 fcs,suspend-voltage-selector = <1>;
496 regulator-initial-state = <3>;
497 regulator-state-mem {
498 regulator-off-in-suspend;
503 compatible = "rockchip,rk808";
505 interrupt-parent = <&gpio1>;
506 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
509 rockchip,system-power-controller;
512 clock-output-names = "xin32k", "rk808-clkout2";
514 vcc1-supply = <&vcc3v3_sys>;
515 vcc2-supply = <&vcc3v3_sys>;
516 vcc3-supply = <&vcc3v3_sys>;
517 vcc4-supply = <&vcc3v3_sys>;
518 vcc6-supply = <&vcc3v3_sys>;
519 vcc7-supply = <&vcc3v3_sys>;
520 vcc8-supply = <&vcc3v3_sys>;
521 vcc9-supply = <&vcc3v3_sys>;
522 vcc10-supply = <&vcc3v3_sys>;
523 vcc11-supply = <&vcc3v3_sys>;
524 vcc12-supply = <&vcc3v3_sys>;
525 vddio-supply = <&vcc1v8_pmu>;
528 vdd_center: DCDC_REG1 {
531 regulator-min-microvolt = <750000>;
532 regulator-max-microvolt = <1350000>;
533 regulator-ramp-delay = <6001>;
534 regulator-name = "vdd_center";
535 regulator-state-mem {
536 regulator-off-in-suspend;
540 vdd_cpu_l: DCDC_REG2 {
543 regulator-min-microvolt = <750000>;
544 regulator-max-microvolt = <1350000>;
545 regulator-ramp-delay = <6001>;
546 regulator-name = "vdd_cpu_l";
547 regulator-state-mem {
548 regulator-off-in-suspend;
555 regulator-name = "vcc_ddr";
556 regulator-state-mem {
557 regulator-on-in-suspend;
564 regulator-min-microvolt = <1800000>;
565 regulator-max-microvolt = <1800000>;
566 regulator-name = "vcc_1v8";
567 regulator-state-mem {
568 regulator-on-in-suspend;
569 regulator-suspend-microvolt = <1800000>;
573 vcc1v8_dvp: LDO_REG1 {
576 regulator-min-microvolt = <1800000>;
577 regulator-max-microvolt = <1800000>;
578 regulator-name = "vcc1v8_dvp";
579 regulator-state-mem {
580 regulator-off-in-suspend;
584 vcc2v8_dvp: LDO_REG2 {
585 //regulator-always-on;
587 regulator-min-microvolt = <2800000>;
588 regulator-max-microvolt = <2800000>;
589 regulator-name = "vcc2v8_dvp";
590 regulator-state-mem {
591 regulator-off-in-suspend;
595 vcc1v8_pmu: LDO_REG3 {
598 regulator-min-microvolt = <1800000>;
599 regulator-max-microvolt = <1800000>;
600 regulator-name = "vcc1v8_pmu";
601 regulator-state-mem {
602 regulator-on-in-suspend;
603 regulator-suspend-microvolt = <1800000>;
610 regulator-min-microvolt = <1800000>;
611 regulator-max-microvolt = <3300000>;
612 regulator-name = "vcc_sd";
613 regulator-state-mem {
614 regulator-on-in-suspend;
615 regulator-suspend-microvolt = <3300000>;
619 vcca3v0_codec: LDO_REG5 {
622 regulator-min-microvolt = <3000000>;
623 regulator-max-microvolt = <3000000>;
624 regulator-name = "vcca3v0_codec";
625 regulator-state-mem {
626 regulator-off-in-suspend;
633 regulator-min-microvolt = <1500000>;
634 regulator-max-microvolt = <1500000>;
635 regulator-name = "vcc_1v5";
636 regulator-state-mem {
637 regulator-on-in-suspend;
638 regulator-suspend-microvolt = <1500000>;
642 vcca1v8_codec: LDO_REG7 {
645 regulator-min-microvolt = <1800000>;
646 regulator-max-microvolt = <1800000>;
647 regulator-name = "vcca1v8_codec";
648 regulator-state-mem {
649 regulator-off-in-suspend;
656 regulator-min-microvolt = <3000000>;
657 regulator-max-microvolt = <3000000>;
658 regulator-name = "vcc_3v0";
659 regulator-state-mem {
660 regulator-on-in-suspend;
661 regulator-suspend-microvolt = <3000000>;
665 vcc3v3_s3: SWITCH_REG1 {
668 regulator-name = "vcc3v3_s3";
669 regulator-state-mem {
670 regulator-off-in-suspend;
674 vcc3v3_s0: SWITCH_REG2 {
677 regulator-name = "vcc3v3_s0";
678 regulator-state-mem {
679 regulator-off-in-suspend;
688 i2c-scl-rising-time-ns = <300>;
689 i2c-scl-falling-time-ns = <15>;
692 compatible = "everest,es8323";
694 ear-con-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
695 hp-det-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
697 #sound-dai-cells = <0>;
698 system-clock-frequency = <11289600>;
699 clocks = <&cru SCLK_I2S_8CH_OUT>;
700 clock-names = "mclk";
701 pinctrl-names = "default";
702 pinctrl-0 = <&es8323_earcon &es8323_hpdet>;
706 #sound-dai-cells = <0>;
707 compatible = "realtek,rt5640";
709 clocks = <&cru SCLK_I2S_8CH_OUT>;
710 clock-names = "mclk";
711 realtek,in1-differential;
712 pinctrl-names = "default";
713 pinctrl-0 = <&rt5640_hpcon>;
714 hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
715 //hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
716 io-channels = <&saradc 4>;
717 hp-det-adc-value = <500>;
723 i2c-scl-rising-time-ns = <450>;
724 i2c-scl-falling-time-ns = <15>;
729 i2c-scl-rising-time-ns = <475>;
730 i2c-scl-falling-time-ns = <26>;
733 compatible = "fairchild,fusb302";
735 pinctrl-names = "default";
736 pinctrl-0 = <&fusb0_int>;
737 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
738 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
742 gsl3680: gsl3680@41 {
744 compatible = "gslX680-pad";
746 screen_max_x = <1536>;
747 screen_max_y = <2048>;
748 touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
749 reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
754 compatible = "invensense,mpu6050";
756 mpu-int_config = <0x10>;
757 mpu-level_shifter = <0>;
758 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
762 irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
769 rockchip,i2s-broken-burst-len;
770 rockchip,playback-channels = <8>;
771 rockchip,capture-channels = <8>;
772 #sound-dai-cells = <0>;
777 rockchip,i2s-broken-burst-len;
778 rockchip,playback-channels = <2>;
779 rockchip,capture-channels = <2>;
780 #sound-dai-cells = <0>;
781 assigned-clocks = <&cru SCLK_I2S1_DIV>, <&cru SCLK_I2S_8CH>;
782 assigned-clock-parents = <&cru PLL_GPLL>, <&cru SCLK_I2S1_8CH>;
787 #sound-dai-cells = <0>;
794 bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */
795 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
796 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
797 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
805 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pcie_clkreqn_cpm>;
814 pmu1830-supply = <&vcc_3v0>;
820 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
825 lcd_panel_reset: lcd-panel-reset {
826 rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_up>;
830 rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
837 <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
839 pcie_3g_drv: pcie-3g-drv {
841 <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
847 vsel1_gpio: vsel1-gpio {
849 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
852 vsel2_gpio: vsel2-gpio {
854 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
859 wifi_enable_h: wifi-enable-h {
861 <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
866 uart0_gpios: uart0-gpios {
868 <2 19 RK_FUNC_GPIO &pcfg_pull_none>,
869 <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
874 led_power: led-power {
875 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
879 rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
884 rt5640_hpcon: rt5640-hpcon {
885 rockchip,pins = <4 21 RK_FUNC_GPIO &pcfg_pull_none>;
890 es8323_hpdet: es8323-hpdet {
891 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
893 es8323_earcon: es8323-earcon {
894 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
899 pmic_int_l: pmic-int-l {
901 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
904 pmic_dvs2: pmic-dvs2 {
906 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
912 host_vbus_drv: host-vbus-drv {
914 <1 0 RK_FUNC_GPIO &pcfg_pull_none>;
920 fusb0_int: fusb0-int {
921 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
926 vbus_5v_drv: vbus-5v-drv {
927 rockchip,pins = <1 3 RK_FUNC_GPIO &pcfg_pull_up>;
945 rockchip,power-ctrl =
946 <&gpio1 18 GPIO_ACTIVE_LOW>,
947 <&gpio1 14 GPIO_ACTIVE_HIGH>;
956 logo,mode = "center";
971 vref-supply = <&vccadc_ref>;
976 keep-power-in-suspend;
978 mmc-hs400-enhanced-strobe;
985 max-frequency = <150000000>;
992 vqmmc-supply = <&vcc_sd>;
993 pinctrl-names = "default";
994 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
999 max-frequency = <50000000>;
1004 keep-power-in-suspend;
1005 mmc-pwrseq = <&sdio_pwrseq>;
1008 pinctrl-names = "default";
1009 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
1015 //extcon = <&fusb0>;
1024 /* tshut mode 0:CRU 1:GPIO */
1025 rockchip,hw-tshut-mode = <1>;
1026 /* tshut polarity 0:LOW 1:HIGH */
1027 rockchip,hw-tshut-polarity = <1>;
1033 //extcon = <&fusb0>;
1035 u2phy0_otg: otg-port {
1039 u2phy0_host: host-port {
1040 phy-supply = <&vcc5v0_host>;
1048 u2phy1_otg: otg-port {
1052 u2phy1_host: host-port {
1053 phy-supply = <&vcc5v0_host>;
1060 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>;
1061 compatible = "rockchip,remotectl-pwm";
1062 remote_pwm_id = <3>;
1063 handle_cpu_id = <0>;
1066 rockchip,usercode = <0xff00>;
1067 rockchip,key_table =
1073 <0xf4 KEY_VOLUMEUP>,
1074 <0xa7 KEY_VOLUMEDOWN>,
1084 pinctrl-names = "default";
1085 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1094 current-speed = <9600>;
1101 //extcon = <&fusb0>;
1110 //dr_mode = "peripheral";
1153 /* 0 means ion, 1 means drm */