2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/display/drm_mipi_dsi.h>
44 #include "rk3399-vop-clk-set.dtsi"
47 compatible = "rockchip,linux", "rockchip,rk3399";
54 drm_logo: drm-logo@00000000 {
55 compatible = "rockchip,drm-logo";
56 reg = <0x0 0x0 0x0 0x0>;
60 cif_isp0: cif_isp@ff910000 {
61 compatible = "rockchip,rk3399-cif-isp";
62 rockchip,grf = <&grf>;
63 reg = <0x0 0xff910000 0x0 0x4000>, <0x0 0xff968000 0x0 0x8000>;
64 reg-names = "register", "dsihost-register";
66 <&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>,
67 <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru SCLK_MIPIDPHY_REF>,
68 <&cru ACLK_ISP0_NOC>, <&cru ACLK_ISP0_WRAPPER>,
69 <&cru HCLK_ISP0_NOC>, <&cru HCLK_ISP0_WRAPPER>,
70 <&cru SCLK_ISP0>, <&cru SCLK_DPHY_RX0_CFG>;
72 "clk_cif_out", "clk_cif_pll",
73 "pclk_dphytxrx", "pclk_dphy_ref",
74 "aclk_isp0_noc", "aclk_isp0_wrapper",
75 "hclk_isp0_noc", "hclk_isp0_wrapper",
76 "clk_isp0", "pclk_dphyrx";
77 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
78 interrupt-names = "cif_isp10_irq";
79 power-domains = <&power RK3399_PD_ISP0>;
80 rockchip,isp,iommu-enable = <1>;
89 ports = <&vopb_out>, <&vopl_out>;
90 memory-region = <&drm_logo>;
93 route_hdmi: route-hdmi {
95 logo,uboot = "logo.bmp";
96 logo,kernel = "logo_kernel.bmp";
97 logo,mode = "fullscreen";
98 charge_logo,mode = "center";
99 connect = <&vopl_out_hdmi>;
102 route_mipi: route-mipi {
104 logo,uboot = "logo.bmp";
105 logo,kernel = "logo_kernel.bmp";
106 logo,mode = "fullscreen";
107 charge_logo,mode = "center";
108 connect = <&vopb_out_mipi>;
111 route_edp: route-edp {
113 logo,uboot = "logo.bmp";
114 logo,kernel = "logo_kernel.bmp";
115 logo,mode = "fullscreen";
116 charge_logo,mode = "center";
117 connect = <&vopb_out_edp>;
124 cif_clkout: cif-clkout {
127 <2 11 RK_FUNC_3 &pcfg_pull_none>;
130 isp_dvp_d0d7: isp-dvp-d0d7 {
133 <2 0 RK_FUNC_3 &pcfg_pull_none>,
135 <2 1 RK_FUNC_3 &pcfg_pull_none>,
137 <2 2 RK_FUNC_3 &pcfg_pull_none>,
139 <2 3 RK_FUNC_3 &pcfg_pull_none>,
141 <2 4 RK_FUNC_3 &pcfg_pull_none>,
143 <2 5 RK_FUNC_3 &pcfg_pull_none>,
145 <2 6 RK_FUNC_3 &pcfg_pull_none>,
147 <2 7 RK_FUNC_3 &pcfg_pull_none>,
149 <2 8 RK_FUNC_3 &pcfg_pull_none>,
151 <2 9 RK_FUNC_3 &pcfg_pull_none>,
153 <2 10 RK_FUNC_3 &pcfg_pull_none>;
156 isp_shutter: isp-shutter {
159 <1 1 RK_FUNC_1 &pcfg_pull_none>,
161 <1 0 RK_FUNC_1 &pcfg_pull_none>;
164 isp_flash_trigger: isp-flash-trigger {
165 /* ISP_FLASHTRIGOU */
166 rockchip,pins = <1 3 RK_FUNC_1 &pcfg_pull_none>;
169 isp_prelight: isp-prelight {
170 /* ISP_PRELIGHTTRIG */
171 rockchip,pins = <1 4 RK_FUNC_1 &pcfg_pull_none>;
174 isp_flash_trigger_as_gpio: isp-flash-trigger-as-gpio {
175 /* ISP_FLASHTRIGOU */
176 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
181 cam0_default_pins: cam0-default-pins {
183 <4 27 RK_FUNC_GPIO &pcfg_pull_none>,
184 <2 11 RK_FUNC_3 &pcfg_pull_none>;
186 cam0_sleep_pins: cam0-sleep-pins {
188 <4 27 RK_FUNC_3 &pcfg_pull_none>,
189 <2 11 RK_FUNC_GPIO &pcfg_pull_none>;