2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
51 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
53 hall_sensor: hall-mh248 {
54 compatible = "hall-mh248";
55 pinctrl-names = "default";
56 pinctrl-0 = <&mh248_irq_gpio>;
57 irq-gpio = <&gpio1 2 IRQ_TYPE_EDGE_BOTH>;
63 compatible = "regulator-fixed";
64 regulator-name = "vcc_sys";
67 regulator-min-microvolt = <3900000>;
68 regulator-max-microvolt = <3900000>;
71 vcc3v3_sys: vcc3v3-sys {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc3v3_sys";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
80 vcc5v0_host: vcc5v0-host-regulator {
81 compatible = "regulator-fixed";
83 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&host_vbus_drv>;
86 regulator-name = "vcc5v0_host";
90 compatible = "pwm-regulator";
91 pwms = <&pwm2 0 25000 0>;
93 rockchip,pwm_voltage = <900000>;
94 regulator-name = "vdd_log";
95 regulator-min-microvolt = <750000>;
96 regulator-max-microvolt = <1350000>;
101 backlight: backlight {
102 compatible = "pwm-backlight";
103 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
104 brightness-levels = <
105 0 1 51 52 52 53 53 54
106 54 55 55 56 56 57 57 58
107 58 59 59 60 61 61 62 63
108 63 64 65 65 66 67 67 68
109 69 69 70 71 71 72 73 73
110 74 75 75 76 77 77 78 79
111 79 80 80 81 81 82 83 83
112 84 85 86 86 87 88 89 89
113 90 91 92 92 93 94 95 95
114 96 97 98 98 99 100 101 101
115 102 103 104 104 105 106 107 107
116 108 109 110 110 111 112 113 113
117 114 115 116 116 117 118 119 119
118 120 121 122 122 123 124 125 125
119 126 127 128 128 129 130 131 131
120 132 133 134 134 135 136 137 137
121 138 139 140 140 141 142 143 143
122 144 145 146 146 147 148 149 149
123 150 151 152 152 153 154 155 155
124 156 157 158 158 159 160 161 161
125 162 163 164 164 165 166 167 167
126 168 169 170 170 171 172 173 173
127 174 175 176 176 177 178 179 179
128 180 181 182 182 183 184 185 185
129 186 187 188 188 189 190 191 191
130 216 217 218 218 219 220 221 221
131 222 223 224 224 225 226 227 227
132 228 229 230 230 231 232 233 233
133 234 235 236 236 237 238 239 239
134 240 241 242 242 243 244 245 245
135 246 247 248 248 249 250 251 251
136 252 253 254 254 255 255 255 255>;
137 default-brightness-level = <200>;
138 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
141 vcc_phy: vcc-phy-regulator {
142 compatible = "regulator-fixed";
143 regulator-name = "vcc_phy";
149 compatible = "rockchip,rk3399-io-voltage-domain";
150 rockchip,grf = <&grf>;
152 bt656-supply = <&vcc1v8_dvp>;
153 audio-supply = <&vcca1v8_codec>;
154 sdmmc-supply = <&vcc_sd>;
155 gpio1830-supply = <&vcc_3v0>;
159 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
160 rockchip,grf = <&pmugrf>;
162 pmu1830-supply = <&vcc_1v8>;
166 compatible = "simple-audio-card";
167 simple-audio-card,format = "i2s";
168 simple-audio-card,name = "rockchip,es8316-codec";
169 simple-audio-card,mclk-fs = <256>;
170 simple-audio-card,widgets =
171 "Microphone", "Mic Jack",
172 "Headphone", "Headphone Jack";
173 simple-audio-card,routing =
174 "Mic Jack", "MICBIAS1",
176 "Headphone Jack", "HPOL",
177 "Headphone Jack", "HPOR";
178 simple-audio-card,cpu {
181 simple-audio-card,codec {
182 sound-dai = <&es8316>;
187 compatible = "simple-audio-card";
188 simple-audio-card,name = "rockchip,spdif";
189 simple-audio-card,cpu {
190 sound-dai = <&spdif>;
192 simple-audio-card,codec {
193 sound-dai = <&spdif_out>;
197 spdif_out: spdif-out {
198 compatible = "linux,spdif-dit";
199 #sound-dai-cells = <0>;
202 sdio_pwrseq: sdio-pwrseq {
203 compatible = "mmc-pwrseq-simple";
205 clock-names = "ext_clock";
206 pinctrl-names = "default";
207 pinctrl-0 = <&wifi_enable_h>;
210 * On the module itself this is one of these (depending
211 * on the actual card populated):
212 * - SDIO_RESET_L_WL_REG_ON
213 * - PDN (power down when low)
215 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
219 compatible = "wlan-platdata";
220 rockchip,grf = <&grf>;
221 wifi_chip_type = "ap6354";
223 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
228 compatible = "bluetooth-platdata";
230 clock-names = "ext_clock";
231 //wifi-bt-power-toggle;
232 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
233 pinctrl-names = "default", "rts_gpio";
234 pinctrl-0 = <&uart0_rts>;
235 pinctrl-1 = <&uart0_gpios>;
236 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
237 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
238 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
239 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
244 compatible = "rockchip,uboot-charge";
245 rockchip,uboot-charge-on = <0>;
246 rockchip,android-charge-on = <1>;
250 compatible = "rk-vibrator-gpio";
251 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
256 compatible = "rockchip_headset";
257 headset_gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&hp_det>;
260 io-channels = <&saradc 2>;
270 center-supply = <&vdd_center>;
272 downdifferential = <20>;
277 opp-hz = /bits/ 64 <300000000>;
278 opp-microvolt = <900000>;
281 opp-hz = /bits/ 64 <400000000>;
282 opp-microvolt = <900000>;
285 opp-hz = /bits/ 64 <528000000>;
286 opp-microvolt = <900000>;
289 opp-hz = /bits/ 64 <600000000>;
290 opp-microvolt = <900000>;
293 opp-hz = /bits/ 64 <666000000>;
294 opp-microvolt = <900000>;
301 opp-hz = /bits/ 64 <408000000>;
302 opp-microvolt = <800000>;
303 clock-latency-ns = <40000>;
306 opp-hz = /bits/ 64 <600000000>;
307 opp-microvolt = <800000>;
310 opp-hz = /bits/ 64 <816000000>;
311 opp-microvolt = <800000>;
314 opp-hz = /bits/ 64 <1008000000>;
315 opp-microvolt = <875000>;
318 opp-hz = /bits/ 64 <1200000000>;
319 opp-microvolt = <925000>;
322 opp-hz = /bits/ 64 <1416000000>;
323 opp-microvolt = <1050000>;
326 opp-hz = /bits/ 64 <1512000000>;
327 opp-microvolt = <1100000>;
334 opp-hz = /bits/ 64 <408000000>;
335 opp-microvolt = <800000>;
336 clock-latency-ns = <40000>;
339 opp-hz = /bits/ 64 <600000000>;
340 opp-microvolt = <800000>;
343 opp-hz = /bits/ 64 <816000000>;
344 opp-microvolt = <825000>;
347 opp-hz = /bits/ 64 <1008000000>;
348 opp-microvolt = <875000>;
351 opp-hz = /bits/ 64 <1200000000>;
352 opp-microvolt = <950000>;
355 opp-hz = /bits/ 64 <1416000000>;
356 opp-microvolt = <1025000>;
359 opp-hz = /bits/ 64 <1608000000>;
360 opp-microvolt = <1100000>;
363 opp-hz = /bits/ 64 <1800000000>;
364 opp-microvolt = <1175000>;
367 opp-hz = /bits/ 64 <1992000000>;
368 opp-microvolt = <1250000>;
377 518 335 /* 1008MHz */
378 617 428 /* 1200MHz */
379 728 573 /* 1416MHz */
380 827 724 /* 1608MHz */
381 925 900 /* 1800MHz */
382 1024 1108 /* 1992MHz */
413 518 335 /* 1008MHz */
414 617 428 /* 1200MHz */
415 728 573 /* 1416MHz */
416 827 724 /* 1608MHz */
417 925 900 /* 1800MHz */
418 1024 1108 /* 1992MHz */
445 compatible = "operating-points-v2";
448 opp-hz = /bits/ 64 <200000000>;
449 opp-microvolt = <825000>;
452 opp-hz = /bits/ 64 <300000000>;
453 opp-microvolt = <850000>;
456 opp-hz = /bits/ 64 <400000000>;
457 opp-microvolt = <875000>;
460 opp-hz = /bits/ 64 <500000000>;
461 opp-microvolt = <950000>;
464 opp-hz = /bits/ 64 <600000000>;
465 opp-microvolt = <1025000>;
468 opp-hz = /bits/ 64 <800000000>;
469 opp-microvolt = <1125000>;
474 compatible = "rockchip,key";
477 io-channels = <&saradc 1>;
482 rockchip,adc_value = <1>;
487 label = "volume down";
488 rockchip,adc_value = <170>;
492 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
501 rockchip,adc_value = <746>;
507 rockchip,adc_value = <355>;
513 rockchip,adc_value = <560>;
519 rockchip,adc_value = <450>;
524 clock-frequency = <50000000>;
525 clock-freq-min-max = <400000 150000000>;
533 vqmmc-supply = <&vcc_sd>;
534 pinctrl-names = "default";
535 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
540 clock-frequency = <150000000>;
541 clock-freq-min-max = <200000 150000000>;
547 keep-power-in-suspend;
548 mmc-pwrseq = <&sdio_pwrseq>;
551 pinctrl-names = "default";
552 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
566 keep-power-in-suspend;
567 mmc-hs400-enhanced-strobe;
573 rockchip,i2s-broken-burst-len;
574 rockchip,playback-channels = <8>;
575 rockchip,capture-channels = <8>;
576 #sound-dai-cells = <0>;
580 #sound-dai-cells = <0>;
585 #sound-dai-cells = <0>;
590 i2c-scl-rising-time-ns = <180>;
591 i2c-scl-falling-time-ns = <30>;
592 clock-frequency = <400000>;
594 vdd_cpu_b: syr837@40 {
595 compatible = "silergy,syr827";
597 vin-supply = <&vcc_sys>;
598 regulator-compatible = "fan53555-reg";
599 pinctrl-0 = <&vsel1_gpio>;
600 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
601 regulator-name = "vdd_cpu_b";
602 regulator-min-microvolt = <712500>;
603 regulator-max-microvolt = <1500000>;
604 regulator-ramp-delay = <1000>;
605 fcs,suspend-voltage-selector = <1>;
607 regulator-initial-state = <3>;
608 regulator-state-mem {
609 regulator-off-in-suspend;
614 compatible = "silergy,syr828";
617 vin-supply = <&vcc_sys>;
618 regulator-compatible = "fan53555-reg";
619 pinctrl-0 = <&vsel2_gpio>;
620 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
621 regulator-name = "vdd_gpu";
622 regulator-min-microvolt = <735000>;
623 regulator-max-microvolt = <1400000>;
624 regulator-ramp-delay = <1000>;
625 fcs,suspend-voltage-selector = <1>;
627 regulator-state-mem {
628 regulator-off-in-suspend;
633 compatible = "rockchip,rk818";
636 clock-output-names = "xin32k", "wifibt_32kin";
637 interrupt-parent = <&gpio1>;
638 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
639 pinctrl-names = "default";
640 pinctrl-0 = <&pmic_int_l>;
641 rockchip,system-power-controller;
642 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
647 vcc1-supply = <&vcc_sys>;
648 vcc2-supply = <&vcc_sys>;
649 vcc3-supply = <&vcc_sys>;
650 vcc4-supply = <&vcc_sys>;
651 vcc6-supply = <&vcc_sys>;
652 vcc7-supply = <&vcc3v3_sys>;
653 vcc8-supply = <&vcc_sys>;
654 vcc9-supply = <&vcc3v3_sys>;
657 vdd_cpu_l: DCDC_REG1 {
658 regulator-name = "vdd_cpu_l";
661 regulator-min-microvolt = <750000>;
662 regulator-max-microvolt = <1350000>;
663 regulator-ramp-delay = <6001>;
664 regulator-state-mem {
665 regulator-off-in-suspend;
669 vdd_center: DCDC_REG2 {
670 regulator-name = "vdd_center";
673 regulator-min-microvolt = <800000>;
674 regulator-max-microvolt = <1350000>;
675 regulator-ramp-delay = <6001>;
676 regulator-state-mem {
677 regulator-off-in-suspend;
682 regulator-name = "vcc_ddr";
685 regulator-state-mem {
686 regulator-on-in-suspend;
691 regulator-name = "vcc_1v8";
694 regulator-min-microvolt = <1800000>;
695 regulator-max-microvolt = <1800000>;
696 regulator-state-mem {
697 regulator-on-in-suspend;
698 regulator-suspend-microvolt = <1800000>;
702 vcca3v0_codec: LDO_REG1 {
705 regulator-min-microvolt = <3000000>;
706 regulator-max-microvolt = <3000000>;
707 regulator-name = "vcca3v0_codec";
708 regulator-state-mem {
709 regulator-off-in-suspend;
713 vcc3v0_tp: LDO_REG2 {
716 regulator-min-microvolt = <3000000>;
717 regulator-max-microvolt = <3000000>;
718 regulator-name = "vcc3v0_tp";
719 regulator-state-mem {
720 regulator-off-in-suspend;
724 vcca1v8_codec: LDO_REG3 {
727 regulator-min-microvolt = <1800000>;
728 regulator-max-microvolt = <1800000>;
729 regulator-name = "vcca1v8_codec";
730 regulator-state-mem {
731 regulator-off-in-suspend;
735 vcc_power_on: LDO_REG4 {
738 regulator-min-microvolt = <3300000>;
739 regulator-max-microvolt = <3300000>;
740 regulator-name = "vcc_power_on";
741 regulator-state-mem {
742 regulator-on-in-suspend;
743 regulator-suspend-microvolt = <3300000>;
750 regulator-min-microvolt = <3000000>;
751 regulator-max-microvolt = <3000000>;
752 regulator-name = "vcc_3v0";
753 regulator-state-mem {
754 regulator-on-in-suspend;
755 regulator-suspend-microvolt = <3000000>;
762 regulator-min-microvolt = <1500000>;
763 regulator-max-microvolt = <1500000>;
764 regulator-name = "vcc_1v5";
765 regulator-state-mem {
766 regulator-on-in-suspend;
767 regulator-suspend-microvolt = <1500000>;
771 vcc1v8_dvp: LDO_REG7 {
774 regulator-min-microvolt = <1800000>;
775 regulator-max-microvolt = <1800000>;
776 regulator-name = "vcc1v8_dvp";
777 regulator-state-mem {
778 regulator-off-in-suspend;
782 vcc3v3_s3: LDO_REG8 {
785 regulator-min-microvolt = <3300000>;
786 regulator-max-microvolt = <3300000>;
787 regulator-name = "vcc3v3_s3";
788 regulator-state-mem {
789 regulator-off-in-suspend;
796 regulator-min-microvolt = <1800000>;
797 regulator-max-microvolt = <3300000>;
798 regulator-name = "vcc_sd";
799 regulator-state-mem {
800 regulator-on-in-suspend;
801 regulator-suspend-microvolt = <3300000>;
805 vcc3v3_s0: SWITCH_REG {
808 regulator-name = "vcc3v3_s0";
809 regulator-state-mem {
810 regulator-on-in-suspend;
816 compatible = "rk818-battery";
817 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
818 3793 3807 3827 3853 3896 3937 3974 4007 4066
819 4110 4161 4217 4308>;
820 design_capacity = <7916>;
821 design_qmax = <8708>;
823 max_input_current = <3000>;
824 max_chrg_current = <3000>;
825 max_chrg_voltage = <4350>;
826 sleep_enter_current = <300>;
827 sleep_exit_current = <300>;
828 power_off_thresd = <3400>;
829 zero_algorithm_vol = <3950>;
830 fb_temperature = <105>;
832 max_soc_offset = <60>;
843 i2c-scl-rising-time-ns = <140>;
844 i2c-scl-falling-time-ns = <30>;
847 #sound-dai-cells = <0>;
848 compatible = "everest,es8316";
850 clocks = <&cru SCLK_I2S_8CH_OUT>;
851 clock-names = "mclk";
852 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
858 i2c-scl-rising-time-ns = <345>;
859 i2c-scl-falling-time-ns = <11>;
860 clock-frequency = <400000>;
864 compatible = "lsm330_acc";
865 pinctrl-names = "default";
866 pinctrl-0 = <&lsm330a_irq_gpio>;
868 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
869 type = <SENSOR_TYPE_ACCEL>;
871 poll_delay_ms = <30>;
872 power-off-in-suspend = <1>;
878 compatible = "lsm330_gyro";
879 pinctrl-names = "default";
880 pinctrl-0 = <&lsm330g_irq_gpio>;
882 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
883 type = <SENSOR_TYPE_GYROSCOPE>;
885 power-off-in-suspend = <1>;
886 poll_delay_ms = <30>;
891 compatible = "invensense,mpu6500";
892 pinctrl-names = "default";
893 pinctrl-0 = <&mpu6500_irq_gpio>;
895 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
896 mpu-int_config = <0x10>;
897 mpu-level_shifter = <0>;
898 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
902 support-hw-poweroff = <1>;
908 compatible = "ak8963";
909 pinctrl-names = "default";
910 pinctrl-0 = <&ak8963_irq_gpio>;
912 type = <SENSOR_TYPE_COMPASS>;
913 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
915 poll_delay_ms = <30>;
921 compatible = "capella,light_cm3218";
922 pinctrl-names = "default";
923 pinctrl-0 = <&cm3218_irq_gpio>;
925 type = <SENSOR_TYPE_LIGHT>;
926 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
928 poll_delay_ms = <30>;
932 compatible = "fairchild,fusb302";
934 pinctrl-names = "default";
935 pinctrl-0 = <&fusb0_int>;
936 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
943 i2c-scl-rising-time-ns = <150>;
944 i2c-scl-falling-time-ns = <30>;
945 clock-frequency = <400000>;
948 compatible = "goodix,gt9xx";
950 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
951 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
955 tp-supply = <&vcc3v0_tp>;
968 cpu-supply = <&vdd_cpu_l>;
972 cpu-supply = <&vdd_cpu_l>;
976 cpu-supply = <&vdd_cpu_l>;
980 cpu-supply = <&vdd_cpu_l>;
984 cpu-supply = <&vdd_cpu_b>;
988 cpu-supply = <&vdd_cpu_b>;
993 mali-supply = <&vdd_gpu>;
1001 status = "disabled";
1002 max-freq = <50000000>;
1004 status = "disabled";
1005 compatible = "inv-spi,mpu6500";
1006 pinctrl-names = "default";
1007 pinctrl-0 = <&mpu6500_irq_gpio>;
1008 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
1010 spi-max-frequency = <1000000>;
1013 mpu-int_config = <0x00>;
1014 mpu-level_shifter = <0>;
1015 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1019 support-hw-poweroff = <1>;
1030 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1031 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1039 u2phy0_otg: otg-port {
1043 u2phy0_host: host-port {
1044 phy-supply = <&vcc5v0_host>;
1050 pinctrl-names = "default";
1051 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1077 assigned-clocks = <&cru SCLK_VOP0_PWM>;
1078 assigned-clock-rates = <50000000>;
1092 wifi_enable_h: wifi-enable-h {
1093 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1097 wireless-bluetooth {
1098 uart0_gpios: uart0-gpios {
1099 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1104 pmic_int_l: pmic-int-l {
1106 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1109 pmic_dvs2: pmic-dvs2 {
1111 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1113 vsel1_gpio: vsel1-gpio {
1115 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1117 vsel2_gpio: vsel2-gpio {
1119 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1124 mh248_irq_gpio: mh248-irq-gpio {
1125 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
1131 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1136 lcdpwr_enable_h: lcdpwr-enable-h {
1137 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1142 lsm330a_irq_gpio: lsm330a-irq-gpio {
1143 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1148 lsm330g_irq_gpio: lsm330g-irq-gpio {
1149 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1154 mpu6500_irq_gpio: mpu6500-irq-gpio {
1155 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1160 ak8963_irq_gpio: ak8963-irq-gpio {
1161 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1166 cm3218_irq_gpio: cm3218-irq-gpio {
1167 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1172 host_vbus_drv: host-vbus-drv {
1174 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1179 fusb0_int: fusb0-int {
1181 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1187 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1197 phys = <&tcphy0_dp>;
1198 dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
1203 rockchip,cabc_mode = <1>;
1204 power_ctr: power_ctr {
1205 rockchip,debug = <0>;
1208 rockchip,power_type = <GPIO>;
1209 pinctrl-names = "default";
1210 pinctrl-0 = <&lcdpwr_enable_h>;
1211 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1212 rockchip,delay = <10>;