2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
48 #include <dt-bindings/pwm/pwm.h>
51 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
54 compatible = "regulator-fixed";
55 regulator-name = "vcc_sys";
58 regulator-min-microvolt = <3900000>;
59 regulator-max-microvolt = <3900000>;
62 vcc3v3_sys: vcc3v3-sys {
63 compatible = "regulator-fixed";
64 regulator-name = "vcc3v3_sys";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
71 vcc5v0_host: vcc5v0-host-regulator {
72 compatible = "regulator-fixed";
74 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&host_vbus_drv>;
77 regulator-name = "vcc5v0_host";
81 compatible = "pwm-regulator";
82 pwms = <&pwm2 0 25000 0>;
84 rockchip,pwm_voltage = <900000>;
85 regulator-name = "vdd_log";
86 regulator-min-microvolt = <750000>;
87 regulator-max-microvolt = <1350000>;
92 backlight: backlight {
93 compatible = "pwm-backlight";
94 pwms = <&vop0_pwm 0 25000 PWM_POLARITY_INVERTED>;
96 0 255 51 51 52 53 53 54
97 54 55 56 56 57 57 58 59
98 59 60 60 61 62 62 63 63
99 64 65 65 66 66 67 68 68
100 69 69 70 71 71 72 72 73
101 74 74 75 75 76 77 77 78
102 78 79 80 80 81 81 82 83
103 83 84 85 85 86 86 87 88
104 88 89 89 90 91 91 92 92
105 93 94 94 95 95 96 97 97
106 98 98 99 100 100 101 101 102
107 103 103 104 104 105 106 106 107
108 107 108 109 109 110 110 111 112
109 112 113 113 114 114 115 116 116
110 117 118 118 119 119 120 120 121
111 122 122 123 123 124 125 125 126
112 126 127 128 128 129 129 130 131
113 131 132 132 133 133 134 135 135
114 136 137 138 138 139 140 140 141
115 141 142 143 143 144 144 145 146
116 146 147 148 148 149 149 149 150
117 150 151 151 151 152 152 152 153
118 153 153 154 154 155 156 156 157
119 157 158 159 159 160 160 161 161
120 162 163 163 164 165 165 166 166
121 167 168 168 169 169 170 171 171
122 172 172 173 174 174 175 175 176
123 176 177 178 178 179 179 180 181
124 181 182 183 183 184 185 185 186
125 186 187 188 188 189 189 190 190
126 191 191 192 193 193 194 194 195
127 196 197 197 198 199 199 200 200>;
128 default-brightness-level = <200>;
129 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
132 vcc_phy: vcc-phy-regulator {
133 compatible = "regulator-fixed";
134 regulator-name = "vcc_phy";
140 compatible = "rockchip,rk3399-io-voltage-domain";
141 rockchip,grf = <&grf>;
143 bt656-supply = <&vcc1v8_dvp>;
144 audio-supply = <&vcca1v8_codec>;
145 sdmmc-supply = <&vcc_sd>;
146 gpio1830-supply = <&vcc_3v0>;
150 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
151 rockchip,grf = <&pmugrf>;
153 pmu1830-supply = <&vcc_1v8>;
157 compatible = "simple-audio-card";
158 simple-audio-card,format = "i2s";
159 simple-audio-card,name = "rockchip,es8316-codec";
160 simple-audio-card,mclk-fs = <256>;
161 simple-audio-card,widgets =
162 "Microphone", "Mic Jack",
163 "Headphone", "Headphone Jack";
164 simple-audio-card,routing =
165 "Mic Jack", "MICBIAS1",
167 "Headphone Jack", "HPOL",
168 "Headphone Jack", "HPOR";
169 simple-audio-card,cpu {
172 simple-audio-card,codec {
173 sound-dai = <&es8316>;
178 compatible = "simple-audio-card";
179 simple-audio-card,name = "rockchip,spdif";
180 simple-audio-card,cpu {
181 sound-dai = <&spdif>;
183 simple-audio-card,codec {
184 sound-dai = <&spdif_out>;
188 spdif_out: spdif-out {
189 compatible = "linux,spdif-dit";
190 #sound-dai-cells = <0>;
193 sdio_pwrseq: sdio-pwrseq {
194 compatible = "mmc-pwrseq-simple";
196 clock-names = "ext_clock";
197 pinctrl-names = "default";
198 pinctrl-0 = <&wifi_enable_h>;
201 * On the module itself this is one of these (depending
202 * on the actual card populated):
203 * - SDIO_RESET_L_WL_REG_ON
204 * - PDN (power down when low)
206 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
210 compatible = "wlan-platdata";
211 rockchip,grf = <&grf>;
212 wifi_chip_type = "ap6354";
214 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
219 compatible = "bluetooth-platdata";
221 clock-names = "ext_clock";
222 //wifi-bt-power-toggle;
223 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
224 pinctrl-names = "default", "rts_gpio";
225 pinctrl-0 = <&uart0_rts>;
226 pinctrl-1 = <&uart0_gpios>;
227 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
228 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
229 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
230 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
235 compatible = "rockchip,uboot-charge";
236 rockchip,uboot-charge-on = <0>;
237 rockchip,android-charge-on = <1>;
247 center-supply = <&vdd_center>;
249 downdifferential = <20>;
254 opp-hz = /bits/ 64 <300000000>;
255 opp-microvolt = <900000>;
258 opp-hz = /bits/ 64 <400000000>;
259 opp-microvolt = <900000>;
262 opp-hz = /bits/ 64 <528000000>;
263 opp-microvolt = <900000>;
266 opp-hz = /bits/ 64 <600000000>;
267 opp-microvolt = <900000>;
270 opp-hz = /bits/ 64 <666000000>;
271 opp-microvolt = <900000>;
276 compatible = "rk-vibrator-gpio";
277 vibrator-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;
284 opp-hz = /bits/ 64 <408000000>;
285 opp-microvolt = <800000>;
286 clock-latency-ns = <40000>;
289 opp-hz = /bits/ 64 <600000000>;
290 opp-microvolt = <800000>;
293 opp-hz = /bits/ 64 <816000000>;
294 opp-microvolt = <800000>;
297 opp-hz = /bits/ 64 <1008000000>;
298 opp-microvolt = <875000>;
301 opp-hz = /bits/ 64 <1200000000>;
302 opp-microvolt = <925000>;
305 opp-hz = /bits/ 64 <1416000000>;
306 opp-microvolt = <1050000>;
309 opp-hz = /bits/ 64 <1512000000>;
310 opp-microvolt = <1100000>;
317 opp-hz = /bits/ 64 <408000000>;
318 opp-microvolt = <800000>;
319 clock-latency-ns = <40000>;
322 opp-hz = /bits/ 64 <600000000>;
323 opp-microvolt = <800000>;
326 opp-hz = /bits/ 64 <816000000>;
327 opp-microvolt = <825000>;
330 opp-hz = /bits/ 64 <1008000000>;
331 opp-microvolt = <875000>;
334 opp-hz = /bits/ 64 <1200000000>;
335 opp-microvolt = <950000>;
338 opp-hz = /bits/ 64 <1416000000>;
339 opp-microvolt = <1025000>;
342 opp-hz = /bits/ 64 <1608000000>;
343 opp-microvolt = <1100000>;
346 opp-hz = /bits/ 64 <1800000000>;
347 opp-microvolt = <1175000>;
350 opp-hz = /bits/ 64 <1992000000>;
351 opp-microvolt = <1250000>;
360 518 335 /* 1008MHz */
361 617 428 /* 1200MHz */
362 728 573 /* 1416MHz */
363 827 724 /* 1608MHz */
364 925 900 /* 1800MHz */
365 1024 1108 /* 1992MHz */
396 518 335 /* 1008MHz */
397 617 428 /* 1200MHz */
398 728 573 /* 1416MHz */
399 827 724 /* 1608MHz */
400 925 900 /* 1800MHz */
401 1024 1108 /* 1992MHz */
428 compatible = "operating-points-v2";
431 opp-hz = /bits/ 64 <200000000>;
432 opp-microvolt = <825000>;
435 opp-hz = /bits/ 64 <300000000>;
436 opp-microvolt = <850000>;
439 opp-hz = /bits/ 64 <400000000>;
440 opp-microvolt = <875000>;
443 opp-hz = /bits/ 64 <500000000>;
444 opp-microvolt = <950000>;
447 opp-hz = /bits/ 64 <600000000>;
448 opp-microvolt = <1025000>;
451 opp-hz = /bits/ 64 <800000000>;
452 opp-microvolt = <1125000>;
457 compatible = "rockchip,key";
460 io-channels = <&saradc 1>;
465 rockchip,adc_value = <1>;
470 label = "volume down";
471 rockchip,adc_value = <170>;
475 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
484 rockchip,adc_value = <746>;
490 rockchip,adc_value = <355>;
496 rockchip,adc_value = <560>;
502 rockchip,adc_value = <450>;
507 clock-frequency = <50000000>;
508 clock-freq-min-max = <400000 150000000>;
516 vqmmc-supply = <&vcc_sd>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
523 clock-frequency = <150000000>;
524 clock-freq-min-max = <200000 150000000>;
530 keep-power-in-suspend;
531 mmc-pwrseq = <&sdio_pwrseq>;
534 pinctrl-names = "default";
535 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
541 freq-sel = <200000000>;
552 mmc-hs400-enhanced-strobe;
558 rockchip,i2s-broken-burst-len;
559 rockchip,playback-channels = <8>;
560 rockchip,capture-channels = <8>;
561 #sound-dai-cells = <0>;
565 #sound-dai-cells = <0>;
570 #sound-dai-cells = <0>;
575 i2c-scl-rising-time-ns = <180>;
576 i2c-scl-falling-time-ns = <30>;
577 clock-frequency = <400000>;
579 vdd_cpu_b: syr837@40 {
580 compatible = "silergy,syr827";
582 vin-supply = <&vcc_sys>;
583 regulator-compatible = "fan53555-reg";
584 pinctrl-0 = <&vsel1_gpio>;
585 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
586 regulator-name = "vdd_cpu_b";
587 regulator-min-microvolt = <712500>;
588 regulator-max-microvolt = <1500000>;
589 regulator-ramp-delay = <1000>;
590 fcs,suspend-voltage-selector = <1>;
592 regulator-initial-state = <3>;
593 regulator-state-mem {
594 regulator-off-in-suspend;
599 compatible = "silergy,syr828";
602 vin-supply = <&vcc_sys>;
603 regulator-compatible = "fan53555-reg";
604 pinctrl-0 = <&vsel2_gpio>;
605 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
606 regulator-name = "vdd_gpu";
607 regulator-min-microvolt = <735000>;
608 regulator-max-microvolt = <1400000>;
609 regulator-ramp-delay = <1000>;
610 fcs,suspend-voltage-selector = <1>;
613 regulator-state-mem {
614 regulator-off-in-suspend;
619 compatible = "rockchip,rk818";
622 clock-output-names = "xin32k", "wifibt_32kin";
623 interrupt-parent = <&gpio1>;
624 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
625 pinctrl-names = "default";
626 pinctrl-0 = <&pmic_int_l>;
627 rockchip,system-power-controller;
628 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
633 vcc1-supply = <&vcc_sys>;
634 vcc2-supply = <&vcc_sys>;
635 vcc3-supply = <&vcc_sys>;
636 vcc4-supply = <&vcc_sys>;
637 vcc6-supply = <&vcc_sys>;
638 vcc7-supply = <&vcc3v3_sys>;
639 vcc8-supply = <&vcc_sys>;
640 vcc9-supply = <&vcc3v3_sys>;
643 vdd_cpu_l: DCDC_REG1 {
644 regulator-name = "vdd_cpu_l";
647 regulator-min-microvolt = <750000>;
648 regulator-max-microvolt = <1350000>;
649 regulator-ramp-delay = <6001>;
650 regulator-state-mem {
651 regulator-off-in-suspend;
655 vdd_center: DCDC_REG2 {
656 regulator-name = "vdd_center";
659 regulator-min-microvolt = <800000>;
660 regulator-max-microvolt = <1350000>;
661 regulator-ramp-delay = <6001>;
662 regulator-state-mem {
663 regulator-off-in-suspend;
668 regulator-name = "vcc_ddr";
671 regulator-state-mem {
672 regulator-on-in-suspend;
677 regulator-name = "vcc_1v8";
680 regulator-min-microvolt = <1800000>;
681 regulator-max-microvolt = <1800000>;
682 regulator-state-mem {
683 regulator-on-in-suspend;
684 regulator-suspend-microvolt = <1800000>;
688 vcca3v0_codec: LDO_REG1 {
691 regulator-min-microvolt = <3000000>;
692 regulator-max-microvolt = <3000000>;
693 regulator-name = "vcca3v0_codec";
694 regulator-state-mem {
695 regulator-off-in-suspend;
699 vcc3v0_tp: LDO_REG2 {
702 regulator-min-microvolt = <3000000>;
703 regulator-max-microvolt = <3000000>;
704 regulator-name = "vcc3v0_tp";
705 regulator-state-mem {
706 regulator-off-in-suspend;
710 vcca1v8_codec: LDO_REG3 {
713 regulator-min-microvolt = <1800000>;
714 regulator-max-microvolt = <1800000>;
715 regulator-name = "vcca1v8_codec";
716 regulator-state-mem {
717 regulator-off-in-suspend;
721 vcc_power_on: LDO_REG4 {
724 regulator-min-microvolt = <3300000>;
725 regulator-max-microvolt = <3300000>;
726 regulator-name = "vcc_power_on";
727 regulator-state-mem {
728 regulator-on-in-suspend;
729 regulator-suspend-microvolt = <3300000>;
736 regulator-min-microvolt = <3000000>;
737 regulator-max-microvolt = <3000000>;
738 regulator-name = "vcc_3v0";
739 regulator-state-mem {
740 regulator-off-in-suspend;
747 regulator-min-microvolt = <1500000>;
748 regulator-max-microvolt = <1500000>;
749 regulator-name = "vcc_1v5";
750 regulator-state-mem {
751 regulator-off-in-suspend;
755 vcc1v8_dvp: LDO_REG7 {
758 regulator-min-microvolt = <1800000>;
759 regulator-max-microvolt = <1800000>;
760 regulator-name = "vcc1v8_dvp";
761 regulator-state-mem {
762 regulator-off-in-suspend;
766 vcc3v3_s3: LDO_REG8 {
769 regulator-min-microvolt = <3300000>;
770 regulator-max-microvolt = <3300000>;
771 regulator-name = "vcc3v3_s3";
772 regulator-state-mem {
773 regulator-off-in-suspend;
780 regulator-min-microvolt = <1800000>;
781 regulator-max-microvolt = <3300000>;
782 regulator-name = "vcc_sd";
783 regulator-state-mem {
784 regulator-on-in-suspend;
785 regulator-suspend-microvolt = <3300000>;
789 vcc3v3_s0: SWITCH_REG {
792 regulator-name = "vcc3v3_s0";
793 regulator-state-mem {
794 regulator-on-in-suspend;
800 compatible = "rk818-battery";
801 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
802 3793 3807 3827 3853 3896 3937 3974 4007 4066
803 4110 4161 4217 4308>;
804 design_capacity = <7916>;
805 design_qmax = <8708>;
807 max_input_current = <3000>;
808 max_chrg_current = <3000>;
809 max_chrg_voltage = <4350>;
810 sleep_enter_current = <300>;
811 sleep_exit_current = <300>;
812 power_off_thresd = <3400>;
813 zero_algorithm_vol = <3950>;
814 fb_temperature = <105>;
816 max_soc_offset = <60>;
827 i2c-scl-rising-time-ns = <140>;
828 i2c-scl-falling-time-ns = <30>;
831 #sound-dai-cells = <0>;
832 compatible = "everest,es8316";
834 pinctrl-names = "default";
835 pinctrl-0 = <&hp_det>;
836 clocks = <&cru SCLK_I2S_8CH_OUT>;
837 clock-names = "mclk";
838 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
839 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
845 i2c-scl-rising-time-ns = <345>;
846 i2c-scl-falling-time-ns = <11>;
847 clock-frequency = <400000>;
851 compatible = "lsm330_acc";
852 pinctrl-names = "default";
853 pinctrl-0 = <&lsm330a_irq_gpio>;
855 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
856 type = <SENSOR_TYPE_ACCEL>;
858 poll_delay_ms = <30>;
864 compatible = "lsm330_gyro";
865 pinctrl-names = "default";
866 pinctrl-0 = <&lsm330g_irq_gpio>;
868 irq-gpio = <&gpio1 20 IRQ_TYPE_EDGE_RISING>;
869 type = <SENSOR_TYPE_GYROSCOPE>;
871 poll_delay_ms = <30>;
876 compatible = "invensense,mpu6500";
877 pinctrl-names = "default";
878 pinctrl-0 = <&mpu6500_irq_gpio>;
880 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
881 mpu-int_config = <0x10>;
882 mpu-level_shifter = <0>;
883 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
887 support-hw-poweroff = <1>;
893 compatible = "ak8963";
894 pinctrl-names = "default";
895 pinctrl-0 = <&ak8963_irq_gpio>;
897 type = <SENSOR_TYPE_COMPASS>;
898 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
900 poll_delay_ms = <30>;
906 compatible = "capella,light_cm3218";
907 pinctrl-names = "default";
908 pinctrl-0 = <&cm3218_irq_gpio>;
910 type = <SENSOR_TYPE_LIGHT>;
911 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_FALLING>;
913 poll_delay_ms = <30>;
917 compatible = "fairchild,fusb302";
919 pinctrl-names = "default";
920 pinctrl-0 = <&fusb0_int>;
921 int-n-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
928 i2c-scl-rising-time-ns = <150>;
929 i2c-scl-falling-time-ns = <30>;
930 clock-frequency = <400000>;
933 compatible = "goodix,gt9xx";
935 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
936 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
940 tp-supply = <&vcc3v0_tp>;
953 cpu-supply = <&vdd_cpu_l>;
957 cpu-supply = <&vdd_cpu_l>;
961 cpu-supply = <&vdd_cpu_l>;
965 cpu-supply = <&vdd_cpu_l>;
969 cpu-supply = <&vdd_cpu_b>;
973 cpu-supply = <&vdd_cpu_b>;
978 mali-supply = <&vdd_gpu>;
987 max-freq = <50000000>;
990 compatible = "inv-spi,mpu6500";
991 pinctrl-names = "default";
992 pinctrl-0 = <&mpu6500_irq_gpio>;
993 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
995 spi-max-frequency = <1000000>;
998 mpu-int_config = <0x00>;
999 mpu-level_shifter = <0>;
1000 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
1004 support-hw-poweroff = <1>;
1015 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
1016 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
1024 u2phy0_otg: otg-port {
1028 u2phy0_host: host-port {
1029 phy-supply = <&vcc5v0_host>;
1035 pinctrl-names = "default";
1036 pinctrl-0 = <&uart0_xfer &uart0_cts>;
1062 assigned-clocks = <&cru SCLK_VOP0_PWM>;
1063 assigned-clock-rates = <50000000>;
1077 wifi_enable_h: wifi-enable-h {
1078 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1082 wireless-bluetooth {
1083 uart0_gpios: uart0-gpios {
1084 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
1089 pmic_int_l: pmic-int-l {
1091 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
1094 pmic_dvs2: pmic-dvs2 {
1096 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
1098 vsel1_gpio: vsel1-gpio {
1100 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
1102 vsel2_gpio: vsel2-gpio {
1104 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
1110 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
1115 lcdpwr_enable_h: lcdpwr-enable-h {
1116 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
1121 lsm330a_irq_gpio: lsm330a-irq-gpio {
1122 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1127 lsm330g_irq_gpio: lsm330g-irq-gpio {
1128 rockchip,pins = <1 20 RK_FUNC_GPIO &pcfg_pull_none>;
1133 mpu6500_irq_gpio: mpu6500-irq-gpio {
1134 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
1139 ak8963_irq_gpio: ak8963-irq-gpio {
1140 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
1145 cm3218_irq_gpio: cm3218-irq-gpio {
1146 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_up>;
1151 host_vbus_drv: host-vbus-drv {
1153 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
1158 fusb0_int: fusb0-int {
1160 <1 1 RK_FUNC_GPIO &pcfg_pull_up>;
1166 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
1171 rockchip,cabc_mode = <1>;
1172 power_ctr: power_ctr {
1173 rockchip,debug = <0>;
1176 rockchip,power_type = <GPIO>;
1177 pinctrl-names = "default";
1178 pinctrl-0 = <&lcdpwr_enable_h>;
1179 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
1180 rockchip,delay = <10>;