2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include "rk3399.dtsi"
46 #include "rk3399-android.dtsi"
47 #include <dt-bindings/sensor-dev.h>
50 compatible = "rockchip,rk3399-mid", "rockchip,rk3399";
53 compatible = "regulator-fixed";
54 regulator-name = "vcc_sys";
57 regulator-min-microvolt = <3900000>;
58 regulator-max-microvolt = <3900000>;
61 vcc3v3_sys: vcc3v3-sys {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc3v3_sys";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
71 compatible = "pwm-regulator";
72 pwms = <&pwm2 0 25000 0>;
74 rockchip,pwm_voltage = <900000>;
75 regulator-name = "vdd_log";
76 regulator-min-microvolt = <750000>;
77 regulator-max-microvolt = <1350000>;
82 backlight: backlight {
83 compatible = "pwm-backlight";
84 pwms = <&pwm0 0 25000 0>;
86 255 254 253 252 251 250 249 248 247 246 245 244
87 243 242 241 240 239 238 237 236 235 234 233 232
88 231 230 229 228 227 226 225 224 223 222 221 220
89 219 218 217 216 215 214 213 212 211 210 209 208
90 207 206 205 204 203 202 201 200 199 198 197 196
91 195 194 193 192 191 190 189 188 187 186 185 184
92 183 182 181 180 179 178 177 176 175 174 173 172
93 171 170 169 168 167 166 165 164 163 162 161 160
94 159 158 157 156 155 154 153 152 151 150 149 148
95 147 146 145 144 143 142 141 140 139 138 137 136
96 135 134 133 132 131 130 129 128 127 126 125 124
97 123 122 121 120 119 118 117 116 115 114 113 112
98 111 110 109 108 107 106 105 104 103 102 101 100
99 99 98 97 96 95 94 93 92 91 90 89 88
100 87 86 85 84 83 82 81 80 79 78 77 76
101 75 74 73 72 71 70 69 68 67 66 65 64
102 63 62 61 60 59 58 57 56 55 54 53 52
103 51 50 49 48 47 46 45 44 43 42 41 40
104 39 38 37 36 35 34 33 32 31 30 29 28
105 27 26 25 24 23 22 21 20 19 18 17 16
106 15 14 13 12 11 10 9 8 7 6 5 4
108 default-brightness-level = <200>;
109 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
112 vcc_phy: vcc-phy-regulator {
113 compatible = "regulator-fixed";
114 regulator-name = "vcc_phy";
120 compatible = "rockchip,rk3399-io-voltage-domain";
121 rockchip,grf = <&grf>;
123 bt656-supply = <&vcc1v8_dvp>;
124 audio-supply = <&vcca1v8_codec>;
125 sdmmc-supply = <&vcc_sd>;
126 gpio1830-supply = <&vcc_3v0>;
130 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
131 rockchip,grf = <&pmugrf>;
133 pmu1830-supply = <&vcc_1v8>;
137 compatible = "simple-audio-card";
138 simple-audio-card,format = "i2s";
139 simple-audio-card,name = "rockchip,es8316-codec";
140 simple-audio-card,mclk-fs = <256>;
141 simple-audio-card,widgets =
142 "Microphone", "Mic Jack",
143 "Headphone", "Headphone Jack";
144 simple-audio-card,routing =
145 "Mic Jack", "MICBIAS1",
147 "Headphone Jack", "HPOL",
148 "Headphone Jack", "HPOR";
149 simple-audio-card,cpu {
152 simple-audio-card,codec {
153 sound-dai = <&es8316>;
158 compatible = "simple-audio-card";
159 simple-audio-card,name = "rockchip,spdif";
160 simple-audio-card,cpu {
161 sound-dai = <&spdif>;
163 simple-audio-card,codec {
164 sound-dai = <&spdif_out>;
168 spdif_out: spdif-out {
169 compatible = "linux,spdif-dit";
170 #sound-dai-cells = <0>;
173 sdio_pwrseq: sdio-pwrseq {
174 compatible = "mmc-pwrseq-simple";
176 clock-names = "ext_clock";
177 pinctrl-names = "default";
178 pinctrl-0 = <&wifi_enable_h>;
181 * On the module itself this is one of these (depending
182 * on the actual card populated):
183 * - SDIO_RESET_L_WL_REG_ON
184 * - PDN (power down when low)
186 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
190 compatible = "wlan-platdata";
191 rockchip,grf = <&grf>;
192 wifi_chip_type = "ap6354";
194 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
199 compatible = "bluetooth-platdata";
200 //wifi-bt-power-toggle;
201 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
202 pinctrl-names = "default", "rts_gpio";
203 pinctrl-0 = <&uart0_rts>;
204 pinctrl-1 = <&uart0_gpios>;
205 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
206 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
207 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
208 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
214 clock-frequency = <50000000>;
215 clock-freq-min-max = <400000 150000000>;
223 vqmmc-supply = <&vcc_sd>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
230 clock-frequency = <150000000>;
231 clock-freq-min-max = <200000 150000000>;
237 keep-power-in-suspend;
238 mmc-pwrseq = <&sdio_pwrseq>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
248 freq-sel = <200000000>;
259 mmc-hs400-enhanced-strobe;
265 rockchip,i2s-broken-burst-len;
266 rockchip,playback-channels = <8>;
267 rockchip,capture-channels = <8>;
268 #sound-dai-cells = <0>;
272 #sound-dai-cells = <0>;
277 #sound-dai-cells = <0>;
282 i2c-scl-rising-time-ns = <180>;
283 i2c-scl-falling-time-ns = <30>;
284 clock-frequency = <400000>;
287 compatible = "xz3216";
291 #address-cells = <1>;
293 vdd_cpu_b: regulator@0 {
295 vin-supply = <&vcc_sys>;
296 regulator-compatible = "xz_dcdc1";
297 regulator-name = "vdd_cpu_b";
298 regulator-min-microvolt = <712500>;
299 regulator-max-microvolt = <1500000>;
300 regulator-ramp-delay = <1000>;
301 fcs,suspend-voltage-selector = <1>;
304 regulator-state-mem {
305 regulator-off-in-suspend;
312 compatible = "silergy,syr828";
315 vin-supply = <&vcc_sys>;
316 regulator-compatible = "fan53555-reg";
317 regulator-name = "vdd_gpu";
318 regulator-min-microvolt = <735000>;
319 regulator-max-microvolt = <1400000>;
320 regulator-ramp-delay = <1000>;
321 fcs,suspend-voltage-selector = <1>;
324 regulator-state-mem {
325 regulator-off-in-suspend;
330 compatible = "rockchip,rk818";
333 clock-output-names = "xin32k", "wifibt_32kin";
334 interrupt-parent = <&gpio1>;
335 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&pmic_int_l>;
338 rockchip,system-power-controller;
339 rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/
343 vcc1-supply = <&vcc_sys>;
344 vcc2-supply = <&vcc_sys>;
345 vcc3-supply = <&vcc_sys>;
346 vcc4-supply = <&vcc_sys>;
347 vcc6-supply = <&vcc_sys>;
348 vcc7-supply = <&vcc3v3_sys>;
349 vcc8-supply = <&vcc_sys>;
350 vcc9-supply = <&vcc3v3_sys>;
353 vdd_cpu_l: DCDC_REG1 {
354 regulator-name = "vdd_cpu_l";
357 regulator-min-microvolt = <750000>;
358 regulator-max-microvolt = <1350000>;
359 regulator-ramp-delay = <6001>;
360 regulator-state-mem {
361 regulator-off-in-suspend;
365 vdd_center: DCDC_REG2 {
366 regulator-name = "vdd_center";
369 regulator-min-microvolt = <800000>;
370 regulator-max-microvolt = <1350000>;
371 regulator-ramp-delay = <6001>;
372 regulator-state-mem {
373 regulator-on-in-suspend;
374 regulator-suspend-microvolt = <1000000>;
379 regulator-name = "vcc_ddr";
382 regulator-state-mem {
383 regulator-on-in-suspend;
388 regulator-name = "vcc_1v8";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 regulator-state-mem {
394 regulator-on-in-suspend;
395 regulator-suspend-microvolt = <1800000>;
399 vcca3v0_codec: LDO_REG1 {
402 regulator-min-microvolt = <3000000>;
403 regulator-max-microvolt = <3000000>;
404 regulator-name = "vcca3v0_codec";
405 regulator-state-mem {
406 regulator-off-in-suspend;
410 vcc3v0_tp: LDO_REG2 {
413 regulator-min-microvolt = <3000000>;
414 regulator-max-microvolt = <3000000>;
415 regulator-name = "vcc3v0_tp";
416 regulator-state-mem {
417 regulator-off-in-suspend;
421 vcca1v8_codec: LDO_REG3 {
424 regulator-min-microvolt = <1800000>;
425 regulator-max-microvolt = <1800000>;
426 regulator-name = "vcca1v8_codec";
427 regulator-state-mem {
428 regulator-off-in-suspend;
432 vcc_power_on: LDO_REG4 {
435 regulator-min-microvolt = <3300000>;
436 regulator-max-microvolt = <3300000>;
437 regulator-name = "vcc_power_on";
438 regulator-state-mem {
439 regulator-on-in-suspend;
440 regulator-suspend-microvolt = <3300000>;
447 regulator-min-microvolt = <3000000>;
448 regulator-max-microvolt = <3000000>;
449 regulator-name = "vcc_3v0";
450 regulator-state-mem {
451 regulator-off-in-suspend;
458 regulator-min-microvolt = <1500000>;
459 regulator-max-microvolt = <1500000>;
460 regulator-name = "vcc_1v5";
461 regulator-state-mem {
462 regulator-off-in-suspend;
466 vcc1v8_dvp: LDO_REG7 {
469 regulator-min-microvolt = <1800000>;
470 regulator-max-microvolt = <1800000>;
471 regulator-name = "vcc1v8_dvp";
472 regulator-state-mem {
473 regulator-off-in-suspend;
477 vcc3v3_s3: LDO_REG8 {
480 regulator-min-microvolt = <3300000>;
481 regulator-max-microvolt = <3300000>;
482 regulator-name = "vcc3v3_s3";
483 regulator-state-mem {
484 regulator-on-in-suspend;
485 regulator-suspend-microvolt = <3300000>;
492 regulator-min-microvolt = <3000000>;
493 regulator-max-microvolt = <3000000>;
494 regulator-name = "vcc_sd";
495 regulator-state-mem {
496 regulator-on-in-suspend;
497 regulator-suspend-microvolt = <3000000>;
501 vcc3v3_s0: SWITCH_REG {
504 regulator-name = "vcc3v3_s0";
505 regulator-state-mem {
506 regulator-on-in-suspend;
512 ocv_table = <3400 3675 3689 3716 3740 3756 3768 3780
513 3793 3807 3827 3853 3896 3937 3974 4007 4066
514 4110 4161 4217 4308>;
515 design_capacity = <7916>;
516 design_qmax = <8708>;
518 max_input_current = <3000>;
519 max_chrg_current = <4500>;
520 max_chrg_voltage = <4350>;
521 sleep_enter_current = <300>;
522 sleep_exit_current = <300>;
523 power_off_thresd = <3400>;
524 zero_algorithm_vol = <3950>;
525 fb_temperature = <115>;
526 max_soc_offset = <60>;
538 i2c-scl-rising-time-ns = <140>;
539 i2c-scl-falling-time-ns = <30>;
542 #sound-dai-cells = <0>;
543 compatible = "everest,es8316";
545 pinctrl-names = "default";
546 pinctrl-0 = <&hp_det>;
547 clocks = <&cru SCLK_I2S_8CH_OUT>;
548 clock-names = "mclk";
549 spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
550 hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
556 i2c-scl-rising-time-ns = <345>;
557 i2c-scl-falling-time-ns = <11>;
558 clock-frequency = <400000>;
562 compatible = "invensense,mpu6500";
563 pinctrl-names = "default";
564 pinctrl-0 = <&mpu6500_irq_gpio>;
566 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
567 mpu-int_config = <0x10>;
568 mpu-level_shifter = <0>;
569 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
578 compatible = "ak8963";
579 pinctrl-names = "default";
580 pinctrl-0 = <&ak8963_irq_gpio>;
582 type = <SENSOR_TYPE_COMPASS>;
583 irq-gpio = <&gpio2 28 IRQ_TYPE_EDGE_RISING>;
585 poll_delay_ms = <30>;
591 compatible = "capella,light_cm3218";
592 pinctrl-names = "default";
593 pinctrl-0 = <&cm3218_irq_gpio>;
595 type = <SENSOR_TYPE_LIGHT>;
596 irq-gpio = <&gpio4 24 IRQ_TYPE_EDGE_RISING>;
598 poll_delay_ms = <30>;
604 i2c-scl-rising-time-ns = <150>;
605 i2c-scl-falling-time-ns = <30>;
606 clock-frequency = <400000>;
609 compatible = "goodix,gt9xx";
611 touch-gpio = <&gpio3 12 IRQ_TYPE_LEVEL_LOW>;
612 reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
616 tp-supply = <&vcc3v0_tp>;
629 cpu-supply = <&vdd_cpu_l>;
633 cpu-supply = <&vdd_cpu_l>;
637 cpu-supply = <&vdd_cpu_l>;
641 cpu-supply = <&vdd_cpu_l>;
645 cpu-supply = <&vdd_cpu_b>;
649 cpu-supply = <&vdd_cpu_b>;
654 mali-supply = <&vdd_gpu>;
663 max-freq = <50000000>;
666 compatible = "inv-spi,mpu6500";
667 pinctrl-names = "default";
668 pinctrl-0 = <&mpu6500_irq_gpio>;
669 irq-gpio = <&gpio2 27 IRQ_TYPE_EDGE_RISING>;
671 spi-max-frequency = <1000000>;
674 mpu-int_config = <0x00>;
675 mpu-level_shifter = <0>;
676 mpu-orientation = <1 0 0 0 1 0 0 0 1>;
685 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
686 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
691 pinctrl-names = "default";
692 pinctrl-0 = <&uart0_xfer &uart0_cts>;
701 vbus_drv-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
750 wifi_enable_h: wifi-enable-h {
751 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
756 uart0_gpios: uart0-gpios {
757 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
762 pmic_int_l: pmic-int-l {
764 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
767 pmic_dvs2: pmic-dvs2 {
769 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
775 rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
780 lcdpwr_enable_h: lcdpwr-enable-h {
781 rockchip,pins = <3 8 RK_FUNC_GPIO &pcfg_pull_up>;
786 mpu6500_irq_gpio: mpu6500-irq-gpio {
787 rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
792 ak8963_irq_gpio: ak8963-irq-gpio {
793 rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
798 cm3218_irq_gpio: cm3218-irq-gpio {
799 rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
805 #include <dt-bindings/display/screen-timing/lcd-LP097Qx2.dtsi>
810 power_ctr: power_ctr {
811 rockchip,debug = <0>;
814 rockchip,power_type = <GPIO>;
815 pinctrl-names = "default";
816 pinctrl-0 = <&lcdpwr_enable_h>;
817 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
818 rockchip,delay = <10>;