2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include <dt-bindings/sensor-dev.h>
46 #include "rk3399.dtsi"
47 #include "rk3399-android.dtsi"
50 model = "Rockchip RK3399 VR Board";
51 compatible = "rockchip,vr", "rockchip,rk3399";
54 compatible = "pwm-regulator";
55 pwms = <&pwm2 0 25000 0>;
57 rockchip,pwm_voltage = <900000>;
58 regulator-name = "vdd_log";
59 regulator-min-microvolt = <800000>;
60 regulator-max-microvolt = <1400000>;
66 compatible = "regulator-fixed";
67 regulator-name = "vcc_sys";
70 regulator-min-microvolt = <4000000>;
71 regulator-max-microvolt = <4000000>;
74 vcc3v3_sys: vcc3v3-sys {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc3v3_sys";
79 regulator-min-microvolt = <3300000>;
80 regulator-max-microvolt = <3300000>;
83 vcc_phy: vcc-phy-regulator {
84 compatible = "regulator-fixed";
85 regulator-name = "vcc_phy";
90 vcc1v8_s3: vcc1v8-s3-regulator {
91 compatible = "regulator-fixed";
92 regulator-name = "vcc1v8_s3";
96 regulator-off-in-suspend;
101 compatible = "rockchip,rk3399-io-voltage-domain";
102 rockchip,grf = <&grf>;
104 bt656-supply = <&vcc1v8_s3>;
105 audio-supply = <&vcc1v8_s3>;
106 sdmmc-supply = <&vcc_sd>;
107 gpio1830-supply = <&vcc1v8_s3>;
111 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
112 rockchip,grf = <&pmugrf>;
113 pmu1830-supply = <&vcc_1v8>;
116 dw_hdmi_audio: dw-hdmi-audio {
118 compatible = "rockchip,dw-hdmi-audio";
119 #sound-dai-cells = <0>;
122 hdmi_sound: hdmi-sound {
124 compatible = "simple-audio-card";
125 simple-audio-card,format = "i2s";
126 simple-audio-card,mclk-fs = <256>;
127 simple-audio-card,name = "rockchip,hdmi";
129 simple-audio-card,cpu {
132 simple-audio-card,codec {
133 sound-dai = <&dw_hdmi_audio>;
137 sdio_pwrseq: sdio-pwrseq {
138 compatible = "mmc-pwrseq-simple";
140 clock-names = "ext_clock";
141 pinctrl-names = "default";
142 pinctrl-0 = <&wifi_enable_h>;
145 * On the module itself this is one of these (depending
146 * on the actual card populated):
147 * - SDIO_RESET_L_WL_REG_ON
148 * - PDN (power down when low)
150 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
154 compatible = "wlan-platdata";
155 rockchip,grf = <&grf>;
156 wifi_chip_type = "ap6330";
158 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
163 compatible = "bluetooth-platdata";
165 clock-names = "ext_clock";
166 //wifi-bt-power-toggle;
167 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
168 pinctrl-names = "default", "rts_gpio";
169 pinctrl-0 = <&uart0_rts>;
170 pinctrl-1 = <&uart0_gpios>;
171 //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
172 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
173 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
174 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
179 compatible = "rockchip,uboot-charge";
180 rockchip,uboot-charge-on = <0>;
181 rockchip,android-charge-on = <1>;
186 compatible = "inv-hid,mpu6500";
192 opp-hz = /bits/ 64 <408000000>;
193 opp-microvolt = <800000>;
194 clock-latency-ns = <40000>;
197 opp-hz = /bits/ 64 <600000000>;
198 opp-microvolt = <800000>;
201 opp-hz = /bits/ 64 <816000000>;
202 opp-microvolt = <800000>;
205 opp-hz = /bits/ 64 <1008000000>;
206 opp-microvolt = <850000>;
209 opp-hz = /bits/ 64 <1200000000>;
210 opp-microvolt = <925000>;
213 opp-hz = /bits/ 64 <1416000000>;
214 opp-microvolt = <1075000>;
217 opp-hz = /bits/ 64 <1512000000>;
218 opp-microvolt = <1100000>;
225 opp-hz = /bits/ 64 <408000000>;
226 opp-microvolt = <800000>;
227 clock-latency-ns = <40000>;
230 opp-hz = /bits/ 64 <600000000>;
231 opp-microvolt = <800000>;
234 opp-hz = /bits/ 64 <816000000>;
235 opp-microvolt = <825000>;
238 opp-hz = /bits/ 64 <1008000000>;
239 opp-microvolt = <850000>;
242 opp-hz = /bits/ 64 <1200000000>;
243 opp-microvolt = <900000>;
246 opp-hz = /bits/ 64 <1416000000>;
247 opp-microvolt = <1000000>;
250 opp-hz = /bits/ 64 <1608000000>;
251 opp-microvolt = <1050000>;
254 opp-hz = /bits/ 64 <1800000000>;
255 opp-microvolt = <1150000>;
258 opp-hz = /bits/ 64 <1992000000>;
259 opp-microvolt = <1225000>;
268 518 335 /* 1008MHz */
269 617 428 /* 1200MHz */
270 728 573 /* 1416MHz */
271 827 724 /* 1608MHz */
272 925 900 /* 1800MHz */
273 1024 1108 /* 1992MHz */
304 518 335 /* 1008MHz */
305 617 428 /* 1200MHz */
306 728 573 /* 1416MHz */
307 827 724 /* 1608MHz */
308 925 900 /* 1800MHz */
309 1024 1108 /* 1992MHz */
336 compatible = "operating-points-v2";
339 opp-hz = /bits/ 64 <200000000>;
340 opp-microvolt = <825000>;
343 opp-hz = /bits/ 64 <300000000>;
344 opp-microvolt = <850000>;
347 opp-hz = /bits/ 64 <400000000>;
348 opp-microvolt = <875000>;
351 opp-hz = /bits/ 64 <500000000>;
352 opp-microvolt = <950000>;
355 opp-hz = /bits/ 64 <600000000>;
356 opp-microvolt = <1025000>;
359 opp-hz = /bits/ 64 <800000000>;
360 opp-microvolt = <1125000>;
365 clock-frequency = <150000000>;
366 clock-freq-min-max = <400000 150000000>;
374 vqmmc-supply = <&vcc_sd>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
381 clock-frequency = <50000000>;
382 clock-freq-min-max = <200000 50000000>;
388 keep-power-in-suspend;
389 mmc-pwrseq = <&sdio_pwrseq>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
407 keep-power-in-suspend;
408 mmc-hs400-enhanced-strobe;
414 i2c-scl-rising-time-ns = <219>;
415 i2c-scl-falling-time-ns = <15>;
416 /* clock-frequency = <400000>; */
419 compatible = "fairchild,fusb302";
421 pinctrl-names = "default";
422 pinctrl-0 = <&fusb1_int>;
423 vbus-5v-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
424 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
428 vdd_cpu_b: syr827@40 {
429 compatible = "silergy,syr827";
431 vin-supply = <&vcc_sys>;
432 regulator-compatible = "fan53555-reg";
433 pinctrl-0 = <&vsel1_gpio>;
434 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
435 regulator-name = "vdd_cpu_b";
436 regulator-min-microvolt = <712500>;
437 regulator-max-microvolt = <1500000>;
438 regulator-ramp-delay = <1000>;
439 fcs,suspend-voltage-selector = <1>;
441 regulator-initial-state = <3>;
442 regulator-state-mem {
443 regulator-off-in-suspend;
448 compatible = "silergy,syr828";
450 vin-supply = <&vcc_sys>;
451 regulator-compatible = "fan53555-reg";
452 pinctrl-0 = <&vsel2_gpio>;
453 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
454 regulator-name = "vdd_gpu";
455 regulator-min-microvolt = <712500>;
456 regulator-max-microvolt = <1500000>;
457 regulator-ramp-delay = <1000>;
458 fcs,suspend-voltage-selector = <1>;
460 regulator-initial-state = <3>;
461 regulator-initial-mode = <1>;/*1:pwm 2: auto mode*/
462 regulator-state-mem {
463 regulator-off-in-suspend;
468 compatible = "rockchip,rk818";
471 clock-output-names = "xin32k", "wifibt_32kin";
472 interrupt-parent = <&gpio1>;
473 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pmic_int_l>;
476 rockchip,system-power-controller;
481 vcc1-supply = <&vcc_sys>;
482 vcc2-supply = <&vcc_sys>;
483 vcc3-supply = <&vcc_sys>;
484 vcc4-supply = <&vcc_sys>;
485 vcc6-supply = <&vcc_sys>;
486 vcc7-supply = <&vcc3v3_sys>;
487 vcc8-supply = <&vcc_sys>;
488 vcc9-supply = <&vcc3v3_sys>;
491 vdd_cpu_l: DCDC_REG1 {
492 regulator-name = "vdd_cpu_l";
495 regulator-min-microvolt = <750000>;
496 regulator-max-microvolt = <1350000>;
497 regulator-ramp-delay = <6001>;
498 regulator-state-mem {
499 regulator-off-in-suspend;
503 vdd_center: DCDC_REG2 {
504 regulator-name = "vdd_center";
507 regulator-min-microvolt = <800000>;
508 regulator-max-microvolt = <1350000>;
509 regulator-ramp-delay = <6001>;
510 regulator-state-mem {
511 regulator-off-in-suspend;
516 regulator-name = "vcc_ddr";
519 regulator-state-mem {
520 regulator-on-in-suspend;
525 regulator-name = "vcc_1v8";
528 regulator-min-microvolt = <1800000>;
529 regulator-max-microvolt = <1800000>;
530 regulator-state-mem {
531 regulator-on-in-suspend;
532 regulator-suspend-microvolt = <1800000>;
536 vcc1v8_rk1608: LDO_REG1 {
537 //regulator-always-on;
539 regulator-min-microvolt = <1800000>;
540 regulator-max-microvolt = <1800000>;
541 regulator-name = "vcc1v8_rk1608";
542 regulator-state-mem {
543 regulator-off-in-suspend;
547 vdd1v8_rk1608: LDO_REG2 {
548 //regulator-always-on;
550 regulator-min-microvolt = <1800000>;
551 regulator-max-microvolt = <1800000>;
552 regulator-name = "vdd1v8_rk1608";
553 regulator-state-mem {
554 regulator-off-in-suspend;
558 vdd1v0_rk1608: LDO_REG3 {
559 //regulator-always-on;
561 regulator-min-microvolt = <1000000>;
562 regulator-max-microvolt = <1000000>;
563 regulator-name = "vdd1v0_rk1608";
564 regulator-state-mem {
565 regulator-off-in-suspend;
569 vcc_power_on: LDO_REG4 {
572 regulator-min-microvolt = <3300000>;
573 regulator-max-microvolt = <3300000>;
574 regulator-name = "vcc_power_on";
575 regulator-state-mem {
576 regulator-on-in-suspend;
577 regulator-suspend-microvolt = <3300000>;
582 //regulator-always-on;
584 regulator-min-microvolt = <2800000>;
585 regulator-max-microvolt = <2800000>;
586 regulator-name = "vdd_2v8";
587 regulator-state-mem {
588 regulator-on-in-suspend;
589 regulator-suspend-microvolt = <2800000>;
594 //regulator-always-on;
596 regulator-min-microvolt = <1500000>;
597 regulator-max-microvolt = <1500000>;
598 regulator-name = "vcc_1v5";
599 regulator-state-mem {
600 regulator-on-in-suspend;
601 regulator-suspend-microvolt = <1500000>;
605 vcc1v8_dvp: LDO_REG7 {
606 //regulator-always-on;
608 regulator-min-microvolt = <1800000>;
609 regulator-max-microvolt = <1800000>;
610 regulator-name = "vcc1v8_dvp";
611 regulator-state-mem {
612 regulator-on-in-suspend;
613 regulator-suspend-microvolt = <1800000>;
617 vcc3v3_s3: LDO_REG8 {
620 regulator-min-microvolt = <3300000>;
621 regulator-max-microvolt = <3300000>;
622 regulator-name = "vcc3v3_s3";
623 regulator-state-mem {
624 regulator-on-in-suspend;
625 regulator-suspend-microvolt = <3300000>;
632 regulator-min-microvolt = <1800000>;
633 regulator-max-microvolt = <3300000>;
634 regulator-name = "vcc_sd";
635 regulator-state-mem {
636 regulator-on-in-suspend;
637 regulator-suspend-microvolt = <3300000>;
641 vcc3v3_s0: SWITCH_REG {
644 regulator-name = "vcc3v3_s0";
645 regulator-state-mem {
646 regulator-on-in-suspend;
652 compatible = "rk818-battery";
654 3400 3599 3671 3701 3728 3746 3762
655 3772 3781 3792 3816 3836 3866 3910
656 3942 3971 4002 4050 4088 4132 4183>;
657 design_capacity = <4000>;
658 design_qmax = <4100>;
660 max_input_current = <2000>;
661 max_chrg_current = <1800>;
662 max_chrg_voltage = <4200>;
663 sleep_enter_current = <300>;
664 sleep_exit_current = <300>;
665 power_off_thresd = <3400>;
666 zero_algorithm_vol = <3850>;
667 fb_temperature = <115>;
669 max_soc_offset = <60>;
680 i2c-scl-rising-time-ns = <345>;
681 i2c-scl-falling-time-ns = <11>;
684 compatible = "fairchild,fusb302";
686 pinctrl-names = "default";
687 pinctrl-0 = <&fusb0_int>;
688 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
694 temperature = <85000>; /* millicelsius */
698 temperature = <100000>; /* millicelsius */
702 temperature = <105000>; /* millicelsius */
706 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
707 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
708 rockchip,hw-tshut-temp = <110000>;
717 compatible = "rockchip,key";
719 io-channels = <&saradc 1>;
722 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
733 u2phy0_otg: otg-port {
742 u2phy1_otg: otg-port {
748 pinctrl-names = "default";
749 pinctrl-0 = <&uart0_xfer &uart0_cts>;
790 #include <dt-bindings/display/screen-timing/lcd-box.dtsi>
794 native-mode = <&timing0>; /* 720p */
798 screen-width = <130>;
803 rockchip,uboot-logo-on = <1>;
804 rockchip,disp-mode = <NO_DUAL>;
805 //rockchip,disp-policy = <DISPLAY_POLICY_BOX>;
818 rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
823 extcon = <&fusb0>, <&fusb1>;
824 dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
832 cpu-supply = <&vdd_cpu_l>;
836 cpu-supply = <&vdd_cpu_l>;
840 cpu-supply = <&vdd_cpu_l>;
844 cpu-supply = <&vdd_cpu_l>;
848 cpu-supply = <&vdd_cpu_b>;
852 cpu-supply = <&vdd_cpu_b>;
857 mali-supply = <&vdd_gpu>;
862 wifi_enable_h: wifi-enable-h {
863 rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
868 uart0_gpios: uart0-gpios {
869 rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
874 pmic_int_l: pmic-int-l {
876 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
879 vsel1_gpio: vsel1-gpio {
881 <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
884 vsel2_gpio: vsel2-gpio {
886 <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
891 spi1_gpio: spi1-gpio {
893 <1 7 RK_FUNC_GPIO &pcfg_output_low>,
894 <1 8 RK_FUNC_GPIO &pcfg_output_low>,
895 <1 9 RK_FUNC_GPIO &pcfg_output_low>,
896 <1 10 RK_FUNC_GPIO &pcfg_output_low>;
901 fusb0_int: fusb0-int {
902 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;
905 fusb1_int: fusb1-int {
906 rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_up>;