arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi

   1 /*
   2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "dt-bindings/pwm/pwm.h"
  44 #include "rk3399.dtsi"
  45
  46 / {
  47         compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
  48
  49         vcc5v0_sys: vcc5v0-sys {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "vcc5v0_sys";
  52                 regulator-always-on;
  53                 regulator-boot-on;
  54                 regulator-min-microvolt = <5000000>;
  55                 regulator-max-microvolt = <5000000>;
  56         };
  57
  58         vcc3v3_sys: vcc3v3-sys {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vcc3v3_sys";
  61                 regulator-always-on;
  62                 regulator-boot-on;
  63                 regulator-min-microvolt = <3300000>;
  64                 regulator-max-microvolt = <3300000>;
  65         };
  66
  67         vcc5v0_host: vcc5v0-host-regulator {
  68                 compatible = "regulator-fixed";
  69                 enable-active-high;
  70                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  71                 pinctrl-names = "default";
  72                 pinctrl-0 = <&host_vbus_drv>;
  73                 regulator-name = "vcc5v0_host";
  74         };
  75
  76         vdd_log: vdd-log {
  77                 compatible = "pwm-regulator";
  78                 pwms = <&pwm2 0 25000 0>;
  79                 regulator-name = "vdd_log";
  80                 regulator-min-microvolt = <800000>;
  81                 regulator-max-microvolt = <1400000>;
  82                 regulator-always-on;
  83                 regulator-boot-on;
  84
  85                 /* for rockchip boot on */
  86                 rockchip,pwm_id= <2>;
  87                 rockchip,pwm_voltage = <1000000>;
  88         };
  89
  90         clkin_gmac: external-gmac-clock {
  91                 compatible = "fixed-clock";
  92                 clock-frequency = <125000000>;
  93                 clock-output-names = "clkin_gmac";
  94                 #clock-cells = <0>;
  95         };
  96
  97         vcc_phy: vcc-phy-regulator {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "vcc_phy";
 100                 regulator-always-on;
 101                 regulator-boot-on;
 102         };
 103
 104         io-domains {
 105                 compatible = "rockchip,rk3399-io-voltage-domain";
 106                 rockchip,grf = <&grf>;
 107
 108                 bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */
 109                 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
 110                 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
 111                 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
 112         };
 113
 114         pmu-io-domains {
 115                 compatible = "rockchip,rk3399-pmu-io-voltage-domain";
 116                 rockchip,grf = <&pmugrf>;
 117                 pmu1830-supply = <&vcc_3v0>;
 118         };
 119
 120         hdmi_sound: hdmi-sound {
 121                 status = "okay";
 122                 compatible = "simple-audio-card";
 123                 simple-audio-card,format = "i2s";
 124                 simple-audio-card,mclk-fs = <256>;
 125                 simple-audio-card,name = "rockchip,hdmi";
 126                 simple-audio-card,cpu {
 127                         sound-dai = <&i2s2>;
 128                 };
 129                 simple-audio-card,codec {
 130                         sound-dai = <&dw_hdmi_audio>;
 131                 };
 132         };
 133
 134         dw_hdmi_audio: dw-hdmi-audio {
 135                 status = "okay";
 136                 compatible = "rockchip,dw-hdmi-audio";
 137                 #sound-dai-cells = <0>;
 138         };
 139
 140         sdio_pwrseq: sdio-pwrseq {
 141                 compatible = "mmc-pwrseq-simple";
 142                 clocks = <&rk808 1>;
 143                 clock-names = "ext_clock";
 144                 pinctrl-names = "default";
 145                 pinctrl-0 = <&wifi_enable_h>;
 146
 147                 /*
 148                  * On the module itself this is one of these (depending
 149                  * on the actual card populated):
 150                  * - SDIO_RESET_L_WL_REG_ON
 151                  * - PDN (power down when low)
 152                  */
 153                 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
 154         };
 155 };
 156
 157 &cpu_l0 {
 158         cpu-supply = <&vdd_cpu_l>;
 159 };
 160
 161 &cpu_l1 {
 162         cpu-supply = <&vdd_cpu_l>;
 163 };
 164
 165 &cpu_l2 {
 166         cpu-supply = <&vdd_cpu_l>;
 167 };
 168
 169 &cpu_l3 {
 170         cpu-supply = <&vdd_cpu_l>;
 171 };
 172
 173 &cpu_b0 {
 174         cpu-supply = <&vdd_cpu_b>;
 175 };
 176
 177 &cpu_b1 {
 178         cpu-supply = <&vdd_cpu_b>;
 179 };
 180
 181 &gpu {
 182         status = "okay";
 183         mali-supply = <&vdd_gpu>;
 184 };
 185
 186 &sdmmc {
 187         clock-frequency = <150000000>;
 188         clock-freq-min-max = <100000 150000000>;
 189         supports-sd;
 190         bus-width = <4>;
 191         cap-mmc-highspeed;
 192         cap-sd-highspeed;
 193         disable-wp;
 194         num-slots = <1>;
 195         //sd-uhs-sdr104;
 196         vqmmc-supply = <&vcc_sd>;
 197         pinctrl-names = "default";
 198         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
 199         status = "okay";
 200 };
 201
 202 &sdio0 {
 203         clock-frequency = <50000000>;
 204         clock-freq-min-max = <200000 50000000>;
 205         supports-sdio;
 206         bus-width = <4>;
 207         disable-wp;
 208         cap-sd-highspeed;
 209         cap-sdio-irq;
 210         keep-power-in-suspend;
 211         mmc-pwrseq = <&sdio_pwrseq>;
 212         non-removable;
 213         num-slots = <1>;
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 216         sd-uhs-sdr104;
 217         status = "okay";
 218 };
 219
 220 &emmc_phy {
 221         freq-sel = <200000000>;
 222         dr-sel = <50>;
 223         opdelay = <4>;
 224         status = "okay";
 225 };
 226
 227 &sdhci {
 228         bus-width = <8>;
 229         mmc-hs400-1_8v;
 230         supports-emmc;
 231         non-removable;
 232         keep-power-in-suspend;
 233         mmc-hs400-enhanced-strobe;
 234         status = "okay";
 235 };
 236
 237 &i2s0 {
 238         status = "okay";
 239         rockchip,i2s-broken-burst-len;
 240         rockchip,playback-channels = <8>;
 241         rockchip,capture-channels = <8>;
 242         #sound-dai-cells = <0>;
 243 };
 244
 245 &i2s2 {
 246         #sound-dai-cells = <0>;
 247         status = "okay";
 248 };
 249
 250 &i2c0 {
 251         status = "okay";
 252         i2c-scl-rising-time-ns = <168>;
 253         i2c-scl-falling-time-ns = <4>;
 254         clock-frequency = <400000>;
 255
 256         vdd_cpu_b: syr827@40 {
 257                 compatible = "silergy,syr827";
 258                 reg = <0x40>;
 259                 vin-supply = <&vcc5v0_sys>;
 260                 regulator-compatible = "fan53555-reg";
 261                 regulator-name = "vdd_cpu_b";
 262                 regulator-min-microvolt = <712500>;
 263                 regulator-max-microvolt = <1500000>;
 264                 regulator-ramp-delay = <1000>;
 265                 fcs,suspend-voltage-selector = <1>;
 266                 regulator-always-on;
 267                 regulator-boot-on;
 268                 regulator-initial-state = <3>;
 269                         regulator-state-mem {
 270                         regulator-off-in-suspend;
 271                 };
 272         };
 273
 274         vdd_gpu: syr828@41 {
 275                 compatible = "silergy,syr828";
 276                 reg = <0x41>;
 277                 vin-supply = <&vcc5v0_sys>;
 278                 regulator-compatible = "fan53555-reg";
 279                 regulator-name = "vdd_gpu";
 280                 regulator-min-microvolt = <712500>;
 281                 regulator-max-microvolt = <1500000>;
 282                 regulator-ramp-delay = <1000>;
 283                 fcs,suspend-voltage-selector = <1>;
 284                 regulator-always-on;
 285                 regulator-boot-on;
 286                 regulator-initial-state = <3>;
 287                         regulator-state-mem {
 288                         regulator-off-in-suspend;
 289                 };
 290         };
 291
 292         rk808: pmic@1b {
 293                 compatible = "rockchip,rk808";
 294                 reg = <0x1b>;
 295                 interrupt-parent = <&gpio1>;
 296                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 297                 pinctrl-names = "default";
 298                 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
 299                 rockchip,system-power-controller;
 300                 wakeup-source;
 301                 #clock-cells = <1>;
 302                 clock-output-names = "xin32k", "rk808-clkout2";
 303
 304                 vcc1-supply = <&vcc3v3_sys>;
 305                 vcc2-supply = <&vcc3v3_sys>;
 306                 vcc3-supply = <&vcc3v3_sys>;
 307                 vcc4-supply = <&vcc3v3_sys>;
 308                 vcc6-supply = <&vcc3v3_sys>;
 309                 vcc7-supply = <&vcc3v3_sys>;
 310                 vcc8-supply = <&vcc3v3_sys>;
 311                 vcc9-supply = <&vcc3v3_sys>;
 312                 vcc10-supply = <&vcc3v3_sys>;
 313                 vcc11-supply = <&vcc3v3_sys>;
 314                 vcc12-supply = <&vcc3v3_sys>;
 315                 vddio-supply = <&vcc1v8_pmu>;
 316
 317                 regulators {
 318                         vdd_center: DCDC_REG1 {
 319                                 regulator-always-on;
 320                                 regulator-boot-on;
 321                                 regulator-min-microvolt = <750000>;
 322                                 regulator-max-microvolt = <1350000>;
 323                                 regulator-name = "vdd_center";
 324                                 regulator-state-mem {
 325                                         regulator-off-in-suspend;
 326                                 };
 327                         };
 328
 329                         vdd_cpu_l: DCDC_REG2 {
 330                                 regulator-always-on;
 331                                 regulator-boot-on;
 332                                 regulator-min-microvolt = <750000>;
 333                                 regulator-max-microvolt = <1350000>;
 334                                 regulator-name = "vdd_cpu_l";
 335                                 regulator-state-mem {
 336                                         regulator-off-in-suspend;
 337                                 };
 338                         };
 339
 340                         vcc_ddr: DCDC_REG3 {
 341                                 regulator-always-on;
 342                                 regulator-boot-on;
 343                                 regulator-name = "vcc_ddr";
 344                                 regulator-state-mem {
 345                                         regulator-on-in-suspend;
 346                                 };
 347                         };
 348
 349                         vcc_1v8: DCDC_REG4 {
 350                                 regulator-always-on;
 351                                 regulator-boot-on;
 352                                 regulator-min-microvolt = <1800000>;
 353                                 regulator-max-microvolt = <1800000>;
 354                                 regulator-name = "vcc_1v8";
 355                                 regulator-state-mem {
 356                                         regulator-on-in-suspend;
 357                                         regulator-suspend-microvolt = <1800000>;
 358                                 };
 359                         };
 360
 361                         vcc1v8_dvp: LDO_REG1 {
 362                                 regulator-always-on;
 363                                 regulator-boot-on;
 364                                 regulator-min-microvolt = <1800000>;
 365                                 regulator-max-microvolt = <1800000>;
 366                                 regulator-name = "vcc1v8_dvp";
 367                                 regulator-state-mem {
 368                                         regulator-off-in-suspend;
 369                                 };
 370                         };
 371
 372                         vcc3v0_tp: LDO_REG2 {
 373                                 regulator-always-on;
 374                                 regulator-boot-on;
 375                                 regulator-min-microvolt = <3000000>;
 376                                 regulator-max-microvolt = <3000000>;
 377                                 regulator-name = "vcc3v0_tp";
 378                                 regulator-state-mem {
 379                                         regulator-off-in-suspend;
 380                                 };
 381                         };
 382
 383                         vcc1v8_pmu: LDO_REG3 {
 384                                 regulator-always-on;
 385                                 regulator-boot-on;
 386                                 regulator-min-microvolt = <1800000>;
 387                                 regulator-max-microvolt = <1800000>;
 388                                 regulator-name = "vcc1v8_pmu";
 389                                 regulator-state-mem {
 390                                         regulator-on-in-suspend;
 391                                         regulator-suspend-microvolt = <1800000>;
 392                                 };
 393                         };
 394
 395                         vcc_sd: LDO_REG4 {
 396                                 regulator-always-on;
 397                                 regulator-boot-on;
 398                                 regulator-min-microvolt = <1800000>;
 399                                 regulator-max-microvolt = <3300000>;
 400                                 regulator-name = "vcc_sd";
 401                                 regulator-state-mem {
 402                                         regulator-on-in-suspend;
 403                                         regulator-suspend-microvolt = <3300000>;
 404                                 };
 405                         };
 406
 407                         vcca3v0_codec: LDO_REG5 {
 408                                 regulator-always-on;
 409                                 regulator-boot-on;
 410                                 regulator-min-microvolt = <3000000>;
 411                                 regulator-max-microvolt = <3000000>;
 412                                 regulator-name = "vcca3v0_codec";
 413                                 regulator-state-mem {
 414                                         regulator-off-in-suspend;
 415                                 };
 416                         };
 417
 418                         vcc_1v5: LDO_REG6 {
 419                                 regulator-always-on;
 420                                 regulator-boot-on;
 421                                 regulator-min-microvolt = <1500000>;
 422                                 regulator-max-microvolt = <1500000>;
 423                                 regulator-name = "vcc_1v5";
 424                                 regulator-state-mem {
 425                                         regulator-on-in-suspend;
 426                                         regulator-suspend-microvolt = <1500000>;
 427                                 };
 428                         };
 429
 430                         vcca1v8_codec: LDO_REG7 {
 431                                 regulator-always-on;
 432                                 regulator-boot-on;
 433                                 regulator-min-microvolt = <1800000>;
 434                                 regulator-max-microvolt = <1800000>;
 435                                 regulator-name = "vcca1v8_codec";
 436                                 regulator-state-mem {
 437                                         regulator-off-in-suspend;
 438                                 };
 439                         };
 440
 441                         vcc_3v0: LDO_REG8 {
 442                                 regulator-always-on;
 443                                 regulator-boot-on;
 444                                 regulator-min-microvolt = <3000000>;
 445                                 regulator-max-microvolt = <3000000>;
 446                                 regulator-name = "vcc_3v0";
 447                                 regulator-state-mem {
 448                                         regulator-on-in-suspend;
 449                                         regulator-suspend-microvolt = <3000000>;
 450                                 };
 451                         };
 452
 453                         vcc3v3_s3: SWITCH_REG1 {
 454                                 regulator-always-on;
 455                                 regulator-boot-on;
 456                                 regulator-name = "vcc3v3_s3";
 457                                 regulator-state-mem {
 458                                         regulator-off-in-suspend;
 459                                 };
 460                         };
 461
 462                         vcc3v3_s0: SWITCH_REG2 {
 463                                 regulator-always-on;
 464                                 regulator-boot-on;
 465                                 regulator-name = "vcc3v3_s0";
 466                                 regulator-state-mem {
 467                                         regulator-off-in-suspend;
 468                                 };
 469                         };
 470                 };
 471         };
 472 };
 473
 474 &pcie0 {
 475         assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 476         assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 477         assigned-clock-rates = <100000000>;
 478         ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 479         num-lanes = <4>;
 480         pinctrl-names = "default";
 481         pinctrl-0 = <&pcie_clkreqn>;
 482         status = "okay";
 483 };
 484
 485 &tsadc {
 486         /* tshut mode 0:CRU 1:GPIO */
 487         rockchip,hw-tshut-mode = <1>;
 488         /* tshut polarity 0:LOW 1:HIGH */
 489         rockchip,hw-tshut-polarity = <1>;
 490         status = "okay";
 491 };
 492
 493 &u2phy0 {
 494         status = "okay";
 495
 496         u2phy0_otg: otg-port {
 497                 status = "okay";
 498         };
 499
 500         u2phy0_host: host-port {
 501                 phy-supply = <&vcc5v0_host>;
 502                 status = "okay";
 503         };
 504 };
 505
 506 &u2phy1 {
 507         status = "okay";
 508
 509         u2phy1_otg: otg-port {
 510                 status = "okay";
 511         };
 512
 513         u2phy1_host: host-port {
 514                 phy-supply = <&vcc5v0_host>;
 515                 status = "okay";
 516         };
 517 };
 518
 519 &usb_host0_ehci {
 520         status = "okay";
 521 };
 522
 523 &usb_host0_ohci {
 524         status = "okay";
 525 };
 526
 527 &usb_host1_ehci {
 528         status = "okay";
 529 };
 530
 531 &usb_host1_ohci {
 532         status = "okay";
 533 };
 534
 535 &usbdrd3_0 {
 536         status = "okay";
 537 };
 538
 539 &usbdrd_dwc3_0 {
 540         status = "okay";
 541 };
 542
 543 &usbdrd3_1 {
 544         status = "okay";
 545 };
 546
 547 &usbdrd_dwc3_1 {
 548         status = "okay";
 549         dr_mode = "host";
 550 };
 551
 552 &uart2 {
 553         status = "okay";
 554 };
 555
 556 &pwm0 {
 557         status = "okay";
 558 };
 559
 560 &pwm2 {
 561         status = "okay";
 562 };
 563
 564 &saradc {
 565         status = "okay";
 566 };
 567
 568 &gmac {
 569         phy-supply = <&vcc_phy>;
 570         phy-mode = "rgmii";
 571         clock_in_out = "input";
 572         snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
 573         snps,reset-active-low;
 574         snps,reset-delays-us = <0 10000 50000>;
 575         assigned-clocks = <&cru SCLK_RMII_SRC>;
 576         assigned-clock-parents = <&clkin_gmac>;
 577         pinctrl-names = "default";
 578         pinctrl-0 = <&rgmii_pins>;
 579         tx_delay = <0x28>;
 580         rx_delay = <0x11>;
 581         status = "okay";
 582 };
 583
 584 &cluster0_opp {
 585         opp@408000000 {
 586                 opp-hz = /bits/ 64 <408000000>;
 587                 opp-microvolt = <800000>;
 588                 clock-latency-ns = <40000>;
 589         };
 590         opp@600000000 {
 591                 opp-hz = /bits/ 64 <600000000>;
 592                 opp-microvolt = <800000>;
 593         };
 594         opp@816000000 {
 595                 opp-hz = /bits/ 64 <816000000>;
 596                 opp-microvolt = <800000>;
 597         };
 598         opp@1008000000 {
 599                 opp-hz = /bits/ 64 <1008000000>;
 600                 opp-microvolt = <875000>;
 601         };
 602         opp@1200000000 {
 603                 opp-hz = /bits/ 64 <1200000000>;
 604                 opp-microvolt = <925000>;
 605         };
 606         opp@1416000000 {
 607                 opp-hz = /bits/ 64 <1416000000>;
 608                 opp-microvolt = <1050000>;
 609         };
 610         opp@1512000000 {
 611                 opp-hz = /bits/ 64 <1512000000>;
 612                 opp-microvolt = <1075000>;
 613         };
 614 };
 615
 616 &cluster1_opp {
 617         opp@408000000 {
 618                 opp-hz = /bits/ 64 <408000000>;
 619                 opp-microvolt = <800000>;
 620                 clock-latency-ns = <40000>;
 621         };
 622         opp@600000000 {
 623                 opp-hz = /bits/ 64 <600000000>;
 624                 opp-microvolt = <800000>;
 625         };
 626         opp@816000000 {
 627                 opp-hz = /bits/ 64 <816000000>;
 628                 opp-microvolt = <825000>;
 629         };
 630         opp@1008000000 {
 631                 opp-hz = /bits/ 64 <1008000000>;
 632                 opp-microvolt = <875000>;
 633         };
 634         opp@1200000000 {
 635                 opp-hz = /bits/ 64 <1200000000>;
 636                 opp-microvolt = <950000>;
 637         };
 638         opp@1416000000 {
 639                 opp-hz = /bits/ 64 <1416000000>;
 640                 opp-microvolt = <1025000>;
 641         };
 642         opp@1608000000 {
 643                 opp-hz = /bits/ 64 <1608000000>;
 644                 opp-microvolt = <1100000>;
 645         };
 646         opp@1800000000 {
 647                 opp-hz = /bits/ 64 <1800000000>;
 648                 opp-microvolt = <1175000>;
 649         };
 650         opp@1992000000 {
 651                 opp-hz = /bits/ 64 <1992000000>;
 652                 opp-microvolt = <1250000>;
 653         };
 654 };
 655
 656 &CPU_COST_A72 {
 657         busy-cost-data = <
 658                 210   129       /*  408MHz */
 659                 308   184       /*  600MHz */
 660                 419   246       /*  816MHz */
 661                 518   335       /* 1008MHz */
 662                 617   428       /* 1200MHz */
 663                 728   573       /* 1416MHz */
 664                 827   724       /* 1608MHz */
 665                 925   900       /* 1800MHz */
 666                 1024  1108      /* 1992MHz */
 667         >;
 668         idle-cost-data = <
 669               15
 670               15
 671                0
 672         >;
 673 };
 674
 675 &CPU_COST_A53 {
 676         busy-cost-data = <
 677                 108    46       /*  408M */
 678                 159    67       /*  600M */
 679                 216    90       /*  816M */
 680                 267    120      /* 1008M */
 681                 318    153      /* 1200M */
 682                 375    198      /* 1416M */
 683                 401    222      /* 1512M */
 684         >;
 685         idle-cost-data = <
 686               6
 687               6
 688               0
 689         >;
 690 };
 691
 692 &CLUSTER_COST_A72 {
 693         busy-cost-data = <
 694                 210   129       /*  408MHz */
 695                 308   184       /*  600MHz */
 696                 419   246       /*  816MHz */
 697                 518   335       /* 1008MHz */
 698                 617   428       /* 1200MHz */
 699                 728   573       /* 1416MHz */
 700                 827   724       /* 1608MHz */
 701                 925   900       /* 1800MHz */
 702                 1024  1108      /* 1992MHz */
 703         >;
 704         idle-cost-data = <
 705                  65
 706                  65
 707                  65
 708         >;
 709 };
 710
 711 &CLUSTER_COST_A53 {
 712         busy-cost-data = <
 713                 108    46       /*  408M */
 714                 159    67       /*  600M */
 715                 216    90       /*  816M */
 716                 267    120      /* 1008M */
 717                 318    153      /* 1200M */
 718                 375    198      /* 1416M */
 719                 401    222      /* 1512M */
 720         >;
 721         idle-cost-data = <
 722                 56
 723                 56
 724                 56
 725         >;
 726 };
 727
 728 &gpu_opp_table {
 729         opp@200000000 {
 730                 opp-hz = /bits/ 64 <200000000>;
 731                 opp-microvolt = <800000>;
 732         };
 733         opp@300000000 {
 734                 opp-hz = /bits/ 64 <300000000>;
 735                 opp-microvolt = <800000>;
 736         };
 737         opp@400000000 {
 738                 opp-hz = /bits/ 64 <400000000>;
 739                 opp-microvolt = <800000>;
 740         };
 741         opp@500000000 {
 742                 opp-hz = /bits/ 64 <500000000>;
 743                 opp-microvolt = <900000>;
 744         };
 745         opp@600000000 {
 746                 opp-hz = /bits/ 64 <600000000>;
 747                 opp-microvolt = <900000>;
 748         };
 749         opp@800000000 {
 750                 opp-hz = /bits/ 64 <800000000>;
 751                 opp-microvolt = <1000000>;
 752         };
 753 };
 754
 755 &pinctrl {
 756         pmic {
 757                 pmic_int_l: pmic-int-l {
 758                         rockchip,pins =
 759                                 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
 760                 };
 761
 762                 pmic_dvs2: pmic-dvs2 {
 763                         rockchip,pins =
 764                                 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
 765                 };
 766         };
 767
 768         usb2 {
 769                 host_vbus_drv: host-vbus-drv {
 770                         rockchip,pins =
 771                                 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
 772                 };
 773         };
 774 };