2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
48 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
50 backlight: backlight {
52 compatible = "pwm-backlight";
53 pwms = <&pwm0 0 25000 0>;
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84 232 233 234 235 236 237 238 239
85 240 241 242 243 244 245 246 247
86 248 249 250 251 252 253 254 255>;
87 default-brightness-level = <200>;
90 clkin_gmac: external-gmac-clock {
91 compatible = "fixed-clock";
92 clock-frequency = <125000000>;
93 clock-output-names = "clkin_gmac";
97 dw_hdmi_audio: dw-hdmi-audio {
99 compatible = "rockchip,dw-hdmi-audio";
100 #sound-dai-cells = <0>;
103 hdmi_sound: hdmi-sound {
105 compatible = "simple-audio-card";
106 simple-audio-card,format = "i2s";
107 simple-audio-card,mclk-fs = <256>;
108 simple-audio-card,name = "rockchip,hdmi";
110 simple-audio-card,cpu {
113 simple-audio-card,codec {
114 sound-dai = <&dw_hdmi_audio>;
118 sdio_pwrseq: sdio-pwrseq {
119 compatible = "mmc-pwrseq-simple";
121 clock-names = "ext_clock";
122 pinctrl-names = "default";
123 pinctrl-0 = <&wifi_enable_h>;
126 * On the module itself this is one of these (depending
127 * on the actual card populated):
128 * - SDIO_RESET_L_WL_REG_ON
129 * - PDN (power down when low)
131 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
134 vcc3v3_sys: vcc3v3-sys {
135 compatible = "regulator-fixed";
136 regulator-name = "vcc3v3_sys";
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
143 vcc5v0_host: vcc5v0-host-regulator {
144 compatible = "regulator-fixed";
146 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&host_vbus_drv>;
149 regulator-name = "vcc5v0_host";
153 vcc5v0_sys: vcc5v0-sys {
154 compatible = "regulator-fixed";
155 regulator-name = "vcc5v0_sys";
158 regulator-min-microvolt = <5000000>;
159 regulator-max-microvolt = <5000000>;
162 vcc_phy: vcc-phy-regulator {
163 compatible = "regulator-fixed";
164 regulator-name = "vcc_phy";
170 compatible = "pwm-regulator";
171 pwms = <&pwm2 0 25000 0>;
172 regulator-name = "vdd_log";
173 regulator-min-microvolt = <800000>;
174 regulator-max-microvolt = <1400000>;
178 /* for rockchip boot on */
179 rockchip,pwm_id= <2>;
180 rockchip,pwm_voltage = <1000000>;
185 cpu-supply = <&vdd_cpu_l>;
189 cpu-supply = <&vdd_cpu_l>;
193 cpu-supply = <&vdd_cpu_l>;
197 cpu-supply = <&vdd_cpu_l>;
201 cpu-supply = <&vdd_cpu_b>;
205 cpu-supply = <&vdd_cpu_b>;
209 freq-sel = <200000000>;
216 phy-supply = <&vcc_phy>;
218 clock_in_out = "input";
219 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
220 snps,reset-active-low;
221 snps,reset-delays-us = <0 10000 50000>;
222 assigned-clocks = <&cru SCLK_RMII_SRC>;
223 assigned-clock-parents = <&clkin_gmac>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&rgmii_pins>;
233 mali-supply = <&vdd_gpu>;
238 i2c-scl-rising-time-ns = <168>;
239 i2c-scl-falling-time-ns = <4>;
240 clock-frequency = <400000>;
242 vdd_cpu_b: syr827@40 {
243 compatible = "silergy,syr827";
245 vin-supply = <&vcc5v0_sys>;
246 regulator-compatible = "fan53555-reg";
247 regulator-name = "vdd_cpu_b";
248 regulator-min-microvolt = <712500>;
249 regulator-max-microvolt = <1500000>;
250 regulator-ramp-delay = <1000>;
251 fcs,suspend-voltage-selector = <1>;
254 regulator-initial-state = <3>;
255 regulator-state-mem {
256 regulator-off-in-suspend;
261 compatible = "silergy,syr828";
263 vin-supply = <&vcc5v0_sys>;
264 regulator-compatible = "fan53555-reg";
265 regulator-name = "vdd_gpu";
266 regulator-min-microvolt = <712500>;
267 regulator-max-microvolt = <1500000>;
268 regulator-ramp-delay = <1000>;
269 fcs,suspend-voltage-selector = <1>;
272 regulator-initial-state = <3>;
273 regulator-state-mem {
274 regulator-off-in-suspend;
279 compatible = "rockchip,rk808";
281 interrupt-parent = <&gpio1>;
282 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
285 rockchip,system-power-controller;
288 clock-output-names = "xin32k", "rk808-clkout2";
290 vcc1-supply = <&vcc3v3_sys>;
291 vcc2-supply = <&vcc3v3_sys>;
292 vcc3-supply = <&vcc3v3_sys>;
293 vcc4-supply = <&vcc3v3_sys>;
294 vcc6-supply = <&vcc3v3_sys>;
295 vcc7-supply = <&vcc3v3_sys>;
296 vcc8-supply = <&vcc3v3_sys>;
297 vcc9-supply = <&vcc3v3_sys>;
298 vcc10-supply = <&vcc3v3_sys>;
299 vcc11-supply = <&vcc3v3_sys>;
300 vcc12-supply = <&vcc3v3_sys>;
301 vddio-supply = <&vcc1v8_pmu>;
304 vdd_center: DCDC_REG1 {
307 regulator-min-microvolt = <750000>;
308 regulator-max-microvolt = <1350000>;
309 regulator-ramp-delay = <6001>;
310 regulator-name = "vdd_center";
311 regulator-state-mem {
312 regulator-off-in-suspend;
316 vdd_cpu_l: DCDC_REG2 {
319 regulator-min-microvolt = <750000>;
320 regulator-max-microvolt = <1350000>;
321 regulator-ramp-delay = <6001>;
322 regulator-name = "vdd_cpu_l";
323 regulator-state-mem {
324 regulator-off-in-suspend;
331 regulator-name = "vcc_ddr";
332 regulator-state-mem {
333 regulator-on-in-suspend;
340 regulator-min-microvolt = <1800000>;
341 regulator-max-microvolt = <1800000>;
342 regulator-name = "vcc_1v8";
343 regulator-state-mem {
344 regulator-on-in-suspend;
345 regulator-suspend-microvolt = <1800000>;
349 vcc1v8_dvp: LDO_REG1 {
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
354 regulator-name = "vcc1v8_dvp";
355 regulator-state-mem {
356 regulator-off-in-suspend;
360 vcc3v0_tp: LDO_REG2 {
363 regulator-min-microvolt = <3000000>;
364 regulator-max-microvolt = <3000000>;
365 regulator-name = "vcc3v0_tp";
366 regulator-state-mem {
367 regulator-off-in-suspend;
371 vcc1v8_pmu: LDO_REG3 {
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-name = "vcc1v8_pmu";
377 regulator-state-mem {
378 regulator-on-in-suspend;
379 regulator-suspend-microvolt = <1800000>;
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <3300000>;
388 regulator-name = "vcc_sd";
389 regulator-state-mem {
390 regulator-on-in-suspend;
391 regulator-suspend-microvolt = <3300000>;
395 vcca3v0_codec: LDO_REG5 {
398 regulator-min-microvolt = <3000000>;
399 regulator-max-microvolt = <3000000>;
400 regulator-name = "vcca3v0_codec";
401 regulator-state-mem {
402 regulator-off-in-suspend;
409 regulator-min-microvolt = <1500000>;
410 regulator-max-microvolt = <1500000>;
411 regulator-name = "vcc_1v5";
412 regulator-state-mem {
413 regulator-on-in-suspend;
414 regulator-suspend-microvolt = <1500000>;
418 vcca1v8_codec: LDO_REG7 {
421 regulator-min-microvolt = <1800000>;
422 regulator-max-microvolt = <1800000>;
423 regulator-name = "vcca1v8_codec";
424 regulator-state-mem {
425 regulator-off-in-suspend;
432 regulator-min-microvolt = <3000000>;
433 regulator-max-microvolt = <3000000>;
434 regulator-name = "vcc_3v0";
435 regulator-state-mem {
436 regulator-on-in-suspend;
437 regulator-suspend-microvolt = <3000000>;
441 vcc3v3_s3: SWITCH_REG1 {
444 regulator-name = "vcc3v3_s3";
445 regulator-state-mem {
446 regulator-off-in-suspend;
450 vcc3v3_s0: SWITCH_REG2 {
453 regulator-name = "vcc3v3_s0";
454 regulator-state-mem {
455 regulator-off-in-suspend;
464 i2c-scl-rising-time-ns = <475>;
465 i2c-scl-falling-time-ns = <26>;
468 compatible = "fairchild,fusb302";
470 pinctrl-names = "default";
471 pinctrl-0 = <&fusb0_int>;
472 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
479 rockchip,i2s-broken-burst-len;
480 rockchip,playback-channels = <8>;
481 rockchip,capture-channels = <8>;
482 #sound-dai-cells = <0>;
486 #sound-dai-cells = <0>;
493 bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */
494 audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
495 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
496 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
500 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
501 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
502 assigned-clock-rates = <100000000>;
503 ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&pcie_clkreqn>;
512 pmu1830-supply = <&vcc_3v0>;
528 keep-power-in-suspend;
529 mmc-hs400-enhanced-strobe;
534 clock-frequency = <50000000>;
535 clock-freq-min-max = <200000 50000000>;
541 keep-power-in-suspend;
542 mmc-pwrseq = <&sdio_pwrseq>;
545 pinctrl-names = "default";
546 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
552 clock-frequency = <150000000>;
553 clock-freq-min-max = <100000 150000000>;
561 vqmmc-supply = <&vcc_sd>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
581 /* tshut mode 0:CRU 1:GPIO */
582 rockchip,hw-tshut-mode = <1>;
583 /* tshut polarity 0:LOW 1:HIGH */
584 rockchip,hw-tshut-polarity = <1>;
592 u2phy0_otg: otg-port {
596 u2phy0_host: host-port {
597 phy-supply = <&vcc5v0_host>;
605 u2phy1_otg: otg-port {
609 u2phy1_host: host-port {
610 phy-supply = <&vcc5v0_host>;
655 pmic_int_l: pmic-int-l {
657 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
660 pmic_dvs2: pmic-dvs2 {
662 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
667 host_vbus_drv: host-vbus-drv {
669 <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
674 fusb0_int: fusb0-int {
675 rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_up>;