arch/arm64/include/asm/cpufeature.h

   1 /*
   2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef __ASM_CPUFEATURE_H
  10 #define __ASM_CPUFEATURE_H
  11
  12 #include <asm/hwcap.h>
  13 #include <asm/sysreg.h>
  14
  15 /*
  16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
  17  * in the kernel and for user space to keep track of which optional features
  18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
  19  * Note that HWCAP_x constants are bit fields so we need to take the log.
  20  */
  21
  22 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
  23 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
  24
  25 #define ARM64_WORKAROUND_CLEAN_CACHE            0
  26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE    1
  27 #define ARM64_WORKAROUND_845719                 2
  28 #define ARM64_HAS_SYSREG_GIC_CPUIF              3
  29 #define ARM64_HAS_PAN                           4
  30 #define ARM64_HAS_LSE_ATOMICS                   5
  31 #define ARM64_WORKAROUND_CAVIUM_23154           6
  32 #define ARM64_WORKAROUND_834220                 7
  33 #define ARM64_HAS_NO_HW_PREFETCH                8
  34 #define ARM64_HAS_UAO                           9
  35 #define ARM64_ALT_PAN_NOT_UAO                   10
  36
  37 #define ARM64_WORKAROUND_CAVIUM_27456           11
  38 #define ARM64_HAS_VIRT_HOST_EXTN                12
  39 #define ARM64_NCAPS                             13
  40
  41 #ifndef __ASSEMBLY__
  42
  43 #include <linux/kernel.h>
  44
  45 /* CPU feature register tracking */
  46 enum ftr_type {
  47         FTR_EXACT,      /* Use a predefined safe value */
  48         FTR_LOWER_SAFE, /* Smaller value is safe */
  49         FTR_HIGHER_SAFE,/* Bigger value is safe */
  50 };
  51
  52 #define FTR_STRICT      true    /* SANITY check strict matching required */
  53 #define FTR_NONSTRICT   false   /* SANITY check ignored */
  54
  55 #define FTR_SIGNED      true    /* Value should be treated as signed */
  56 #define FTR_UNSIGNED    false   /* Value should be treated as unsigned */
  57
  58 struct arm64_ftr_bits {
  59         bool            sign;   /* Value is signed ? */
  60         bool            strict; /* CPU Sanity check: strict matching required ? */
  61         enum ftr_type   type;
  62         u8              shift;
  63         u8              width;
  64         s64             safe_val; /* safe value for discrete features */
  65 };
  66
  67 /*
  68  * @arm64_ftr_reg - Feature register
  69  * @strict_mask         Bits which should match across all CPUs for sanity.
  70  * @sys_val             Safe value across the CPUs (system view)
  71  */
  72 struct arm64_ftr_reg {
  73         u32                     sys_id;
  74         const char              *name;
  75         u64                     strict_mask;
  76         u64                     sys_val;
  77         struct arm64_ftr_bits   *ftr_bits;
  78 };
  79
  80 struct arm64_cpu_capabilities {
  81         const char *desc;
  82         u16 capability;
  83         bool (*matches)(const struct arm64_cpu_capabilities *);
  84         void (*enable)(void *);         /* Called on all active CPUs */
  85         union {
  86                 struct {        /* To be used for erratum handling only */
  87                         u32 midr_model;
  88                         u32 midr_range_min, midr_range_max;
  89                 };
  90
  91                 struct {        /* Feature register checking */
  92                         u32 sys_reg;
  93                         int field_pos;
  94                         int min_field_value;
  95                         int hwcap_type;
  96                         unsigned long hwcap;
  97                 };
  98         };
  99 };
 100
 101 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
 102
 103 static inline bool cpu_have_feature(unsigned int num)
 104 {
 105         return elf_hwcap & (1UL << num);
 106 }
 107
 108 static inline bool cpus_have_cap(unsigned int num)
 109 {
 110         if (num >= ARM64_NCAPS)
 111                 return false;
 112         return test_bit(num, cpu_hwcaps);
 113 }
 114
 115 static inline void cpus_set_cap(unsigned int num)
 116 {
 117         if (num >= ARM64_NCAPS)
 118                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
 119                         num, ARM64_NCAPS);
 120         else
 121                 __set_bit(num, cpu_hwcaps);
 122 }
 123
 124 static inline int __attribute_const__
 125 cpuid_feature_extract_field_width(u64 features, int field, int width)
 126 {
 127         return (s64)(features << (64 - width - field)) >> (64 - width);
 128 }
 129
 130 static inline int __attribute_const__
 131 cpuid_feature_extract_field(u64 features, int field)
 132 {
 133         return cpuid_feature_extract_field_width(features, field, 4);
 134 }
 135
 136 static inline unsigned int __attribute_const__
 137 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
 138 {
 139         return (u64)(features << (64 - width - field)) >> (64 - width);
 140 }
 141
 142 static inline unsigned int __attribute_const__
 143 cpuid_feature_extract_unsigned_field(u64 features, int field)
 144 {
 145         return cpuid_feature_extract_unsigned_field_width(features, field, 4);
 146 }
 147
 148 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
 149 {
 150         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 151 }
 152
 153 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
 154 {
 155         return ftrp->sign ?
 156                 cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) :
 157                 cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width);
 158 }
 159
 160 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 161 {
 162         return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
 163                 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 164 }
 165
 166 void __init setup_cpu_features(void);
 167
 168 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
 169                             const char *info);
 170 void check_local_cpu_errata(void);
 171
 172 #ifdef CONFIG_HOTPLUG_CPU
 173 void verify_local_cpu_capabilities(void);
 174 #else
 175 static inline void verify_local_cpu_capabilities(void)
 176 {
 177 }
 178 #endif
 179
 180 u64 read_system_reg(u32 id);
 181
 182 static inline bool cpu_supports_mixed_endian_el0(void)
 183 {
 184         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(SYS_ID_AA64MMFR0_EL1));
 185 }
 186
 187 static inline bool system_supports_mixed_endian_el0(void)
 188 {
 189         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
 190 }
 191
 192 static inline bool system_uses_ttbr0_pan(void)
 193 {
 194         return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) &&
 195                 !cpus_have_cap(ARM64_HAS_PAN);
 196 }
 197
 198 #endif /* __ASSEMBLY__ */
 199
 200 #endif