2 * Low-level exception handling code
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/init.h>
22 #include <linux/linkage.h>
24 #include <asm/alternative.h>
25 #include <asm/assembler.h>
26 #include <asm/asm-offsets.h>
27 #include <asm/cpufeature.h>
28 #include <asm/errno.h>
30 #include <asm/memory.h>
31 #include <asm/thread_info.h>
32 #include <asm/unistd.h>
35 * Context tracking subsystem. Used to instrument transitions
36 * between user and kernel mode.
38 .macro ct_user_exit, syscall = 0
39 #ifdef CONFIG_CONTEXT_TRACKING
40 bl context_tracking_user_exit
43 * Save/restore needed during syscalls. Restore syscall arguments from
44 * the values already saved on stack during kernel_entry.
47 ldp x2, x3, [sp, #S_X2]
48 ldp x4, x5, [sp, #S_X4]
49 ldp x6, x7, [sp, #S_X6]
55 #ifdef CONFIG_CONTEXT_TRACKING
56 bl context_tracking_user_enter
69 .macro kernel_entry, el, regsize = 64
70 sub sp, sp, #S_FRAME_SIZE
72 mov w0, w0 // zero upper 32 bits of x0
74 stp x0, x1, [sp, #16 * 0]
75 stp x2, x3, [sp, #16 * 1]
76 stp x4, x5, [sp, #16 * 2]
77 stp x6, x7, [sp, #16 * 3]
78 stp x8, x9, [sp, #16 * 4]
79 stp x10, x11, [sp, #16 * 5]
80 stp x12, x13, [sp, #16 * 6]
81 stp x14, x15, [sp, #16 * 7]
82 stp x16, x17, [sp, #16 * 8]
83 stp x18, x19, [sp, #16 * 9]
84 stp x20, x21, [sp, #16 * 10]
85 stp x22, x23, [sp, #16 * 11]
86 stp x24, x25, [sp, #16 * 12]
87 stp x26, x27, [sp, #16 * 13]
88 stp x28, x29, [sp, #16 * 14]
92 get_thread_info tsk // Ensure MDSCR_EL1.SS is clear,
93 ldr x19, [tsk, #TI_FLAGS] // since we can unmask debug
94 disable_step_tsk x19, x20 // exceptions when scheduling.
96 add x21, sp, #S_FRAME_SIZE
98 /* Save the task's original addr_limit and set USER_DS (TASK_SIZE_64) */
99 ldr x20, [tsk, #TI_ADDR_LIMIT]
100 str x20, [sp, #S_ORIG_ADDR_LIMIT]
101 mov x20, #TASK_SIZE_64
102 str x20, [tsk, #TI_ADDR_LIMIT]
103 .endif /* \el == 0 */
106 stp lr, x21, [sp, #S_LR]
107 stp x22, x23, [sp, #S_PC]
110 * Set syscallno to -1 by default (overridden later if real syscall).
114 str x21, [sp, #S_SYSCALLNO]
118 * Registers that may be useful after this macro is invoked:
122 * x23 - aborted PSTATE
126 .macro kernel_exit, el
128 /* Restore the task's original addr_limit. */
129 ldr x20, [sp, #S_ORIG_ADDR_LIMIT]
130 str x20, [tsk, #TI_ADDR_LIMIT]
133 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
136 ldr x23, [sp, #S_SP] // load return stack pointer
138 #ifdef CONFIG_ARM64_ERRATUM_845719
139 alternative_if_not ARM64_WORKAROUND_845719
142 #ifdef CONFIG_PID_IN_CONTEXTIDR
147 #ifdef CONFIG_PID_IN_CONTEXTIDR
148 mrs x29, contextidr_el1
149 msr contextidr_el1, x29
151 msr contextidr_el1, xzr
157 msr elr_el1, x21 // set up the return data
159 ldp x0, x1, [sp, #16 * 0]
160 ldp x2, x3, [sp, #16 * 1]
161 ldp x4, x5, [sp, #16 * 2]
162 ldp x6, x7, [sp, #16 * 3]
163 ldp x8, x9, [sp, #16 * 4]
164 ldp x10, x11, [sp, #16 * 5]
165 ldp x12, x13, [sp, #16 * 6]
166 ldp x14, x15, [sp, #16 * 7]
167 ldp x16, x17, [sp, #16 * 8]
168 ldp x18, x19, [sp, #16 * 9]
169 ldp x20, x21, [sp, #16 * 10]
170 ldp x22, x23, [sp, #16 * 11]
171 ldp x24, x25, [sp, #16 * 12]
172 ldp x26, x27, [sp, #16 * 13]
173 ldp x28, x29, [sp, #16 * 14]
175 add sp, sp, #S_FRAME_SIZE // restore sp
176 eret // return to kernel
179 .macro get_thread_info, rd
181 and \rd, \rd, #~(THREAD_SIZE - 1) // top of stack
185 * These are the registers used in the syscall handler, and allow us to
186 * have in theory up to 7 arguments to a function - x0 to x6.
188 * x7 is reserved for the system call number in 32-bit mode.
190 sc_nr .req x25 // number of system calls
191 scno .req x26 // syscall number
192 stbl .req x27 // syscall table pointer
193 tsk .req x28 // current thread_info
196 * Interrupt handling.
199 adrp x1, handle_arch_irq
200 ldr x1, [x1, #:lo12:handle_arch_irq]
210 .pushsection ".entry.text", "ax"
214 ventry el1_sync_invalid // Synchronous EL1t
215 ventry el1_irq_invalid // IRQ EL1t
216 ventry el1_fiq_invalid // FIQ EL1t
217 ventry el1_error_invalid // Error EL1t
219 ventry el1_sync // Synchronous EL1h
220 ventry el1_irq // IRQ EL1h
221 ventry el1_fiq_invalid // FIQ EL1h
222 ventry el1_error_invalid // Error EL1h
224 ventry el0_sync // Synchronous 64-bit EL0
225 ventry el0_irq // IRQ 64-bit EL0
226 ventry el0_fiq_invalid // FIQ 64-bit EL0
227 ventry el0_error_invalid // Error 64-bit EL0
230 ventry el0_sync_compat // Synchronous 32-bit EL0
231 ventry el0_irq_compat // IRQ 32-bit EL0
232 ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
233 ventry el0_error_invalid_compat // Error 32-bit EL0
235 ventry el0_sync_invalid // Synchronous 32-bit EL0
236 ventry el0_irq_invalid // IRQ 32-bit EL0
237 ventry el0_fiq_invalid // FIQ 32-bit EL0
238 ventry el0_error_invalid // Error 32-bit EL0
243 * Invalid mode handlers
245 .macro inv_entry, el, reason, regsize = 64
246 kernel_entry el, \regsize
254 inv_entry 0, BAD_SYNC
255 ENDPROC(el0_sync_invalid)
259 ENDPROC(el0_irq_invalid)
263 ENDPROC(el0_fiq_invalid)
266 inv_entry 0, BAD_ERROR
267 ENDPROC(el0_error_invalid)
270 el0_fiq_invalid_compat:
271 inv_entry 0, BAD_FIQ, 32
272 ENDPROC(el0_fiq_invalid_compat)
274 el0_error_invalid_compat:
275 inv_entry 0, BAD_ERROR, 32
276 ENDPROC(el0_error_invalid_compat)
280 inv_entry 1, BAD_SYNC
281 ENDPROC(el1_sync_invalid)
285 ENDPROC(el1_irq_invalid)
289 ENDPROC(el1_fiq_invalid)
292 inv_entry 1, BAD_ERROR
293 ENDPROC(el1_error_invalid)
301 mrs x1, esr_el1 // read the syndrome register
302 lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
303 cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
305 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
307 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
309 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
311 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1
313 cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1
318 * Data abort handling
322 // re-enable interrupts if they were enabled in the aborted context
323 tbnz x23, #7, 1f // PSR_I_BIT
326 mov x2, sp // struct pt_regs
329 // disable interrupts before pulling preserved data off the stack
334 * Stack or PC alignment exception handling
342 * Undefined instruction
349 * Debug exception handling
351 cmp x24, #ESR_ELx_EC_BRK64 // if BRK64
352 cinc x24, x24, eq // set bit '0'
353 tbz x24, #0, el1_inv // EL1 only
355 mov x2, sp // struct pt_regs
356 bl do_debug_exception
359 // TODO: add support for undefined instructions in kernel mode
371 #ifdef CONFIG_TRACE_IRQFLAGS
372 bl trace_hardirqs_off
377 #ifdef CONFIG_PREEMPT
379 ldr w24, [tsk, #TI_PREEMPT] // get preempt count
380 cbnz w24, 1f // preempt count != 0
381 ldr x0, [tsk, #TI_FLAGS] // get flags
382 tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling?
386 #ifdef CONFIG_TRACE_IRQFLAGS
392 #ifdef CONFIG_PREEMPT
395 1: bl preempt_schedule_irq // irq en/disable is done inside
396 ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS
397 tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling?
407 mrs x25, esr_el1 // read the syndrome register
408 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
409 cmp x24, #ESR_ELx_EC_SVC64 // SVC in 64-bit state
411 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
413 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
415 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
417 cmp x24, #ESR_ELx_EC_FP_EXC64 // FP/ASIMD exception
419 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
421 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
423 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
425 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
427 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
435 mrs x25, esr_el1 // read the syndrome register
436 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
437 cmp x24, #ESR_ELx_EC_SVC32 // SVC in 32-bit state
439 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
441 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
443 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
445 cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
447 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
449 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
451 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
453 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
455 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
457 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
459 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
461 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
466 * AArch32 syscall handling
468 adrp stbl, compat_sys_call_table // load compat syscall table pointer
469 uxtw scno, w7 // syscall number in w7 (r7)
470 mov sc_nr, #__NR_compat_syscalls
481 * Data abort handling
484 // enable interrupts before calling the main handler
487 bic x0, x26, #(0xff << 56)
494 * Instruction abort handling
497 // enable interrupts before calling the main handler
501 orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
507 * Floating Point or Advanced SIMD access
517 * Floating Point or Advanced SIMD exception
527 * Stack or PC alignment exception handling
530 // enable interrupts before calling the main handler
540 * Undefined instruction
542 // enable interrupts before calling the main handler
550 * Debug exception handling
552 tbnz x24, #0, el0_inv // EL0 only
556 bl do_debug_exception
575 #ifdef CONFIG_TRACE_IRQFLAGS
576 bl trace_hardirqs_off
582 #ifdef CONFIG_TRACE_IRQFLAGS
589 * Register switch for AArch64. The callee-saved registers need to be saved
590 * and restored. On entry:
591 * x0 = previous task_struct (must be preserved across the switch)
592 * x1 = next task_struct
593 * Previous and next are guaranteed not to be the same.
597 mov x10, #THREAD_CPU_CONTEXT
600 stp x19, x20, [x8], #16 // store callee-saved registers
601 stp x21, x22, [x8], #16
602 stp x23, x24, [x8], #16
603 stp x25, x26, [x8], #16
604 stp x27, x28, [x8], #16
605 stp x29, x9, [x8], #16
608 ldp x19, x20, [x8], #16 // restore callee-saved registers
609 ldp x21, x22, [x8], #16
610 ldp x23, x24, [x8], #16
611 ldp x25, x26, [x8], #16
612 ldp x27, x28, [x8], #16
613 ldp x29, x9, [x8], #16
617 ENDPROC(cpu_switch_to)
620 * This is the fast syscall return path. We do as little as possible here,
621 * and this includes saving x0 back into the kernel stack.
624 disable_irq // disable interrupts
625 str x0, [sp, #S_X0] // returned x0
626 ldr x1, [tsk, #TI_FLAGS] // re-check for syscall tracing
627 and x2, x1, #_TIF_SYSCALL_WORK
628 cbnz x2, ret_fast_syscall_trace
629 and x2, x1, #_TIF_WORK_MASK
630 cbnz x2, work_pending
631 enable_step_tsk x1, x2
633 ret_fast_syscall_trace:
634 enable_irq // enable interrupts
635 b __sys_trace_return_skipped // we already saved x0
638 * Ok, we need to do extra processing, enter the slow path.
641 tbnz x1, #TIF_NEED_RESCHED, work_resched
642 /* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */
643 ldr x2, [sp, #S_PSTATE]
645 tst x2, #PSR_MODE_MASK // user mode regs?
646 b.ne no_work_pending // returning to kernel
647 enable_irq // enable interrupts for do_notify_resume()
654 * "slow" syscall return path.
657 disable_irq // disable interrupts
658 ldr x1, [tsk, #TI_FLAGS]
659 and x2, x1, #_TIF_WORK_MASK
660 cbnz x2, work_pending
661 enable_step_tsk x1, x2
667 * This is how we return from a fork.
671 cbz x19, 1f // not a kernel thread
674 1: get_thread_info tsk
676 ENDPROC(ret_from_fork)
683 adrp stbl, sys_call_table // load syscall table pointer
684 uxtw scno, w8 // syscall number in w8
685 mov sc_nr, #__NR_syscalls
686 el0_svc_naked: // compat entry point
687 stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
691 ldr x16, [tsk, #TI_FLAGS] // check for syscall hooks
692 tst x16, #_TIF_SYSCALL_WORK
694 cmp scno, sc_nr // check upper syscall limit
696 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
697 blr x16 // call sys_* routine
706 * This is the really slow path. We're going to be doing context
707 * switches, and waiting for our parent to respond.
710 mov w0, #-1 // set default errno for
711 cmp scno, x0 // user-issued syscall(-1)
716 bl syscall_trace_enter
717 cmp w0, #-1 // skip the syscall?
718 b.eq __sys_trace_return_skipped
719 uxtw scno, w0 // syscall number (possibly new)
720 mov x1, sp // pointer to regs
721 cmp scno, sc_nr // check upper syscall limit
723 ldp x0, x1, [sp] // restore the syscall args
724 ldp x2, x3, [sp, #S_X2]
725 ldp x4, x5, [sp, #S_X4]
726 ldp x6, x7, [sp, #S_X6]
727 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
728 blr x16 // call sys_* routine
731 str x0, [sp, #S_X0] // save returned x0
732 __sys_trace_return_skipped:
734 bl syscall_trace_exit
742 .popsection // .entry.text
745 * Special system call wrappers.
747 ENTRY(sys_rt_sigreturn_wrapper)
750 ENDPROC(sys_rt_sigreturn_wrapper)