2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched.h>
25 #include <linux/interrupt.h>
26 #include <linux/cache.h>
27 #include <linux/profile.h>
28 #include <linux/errno.h>
30 #include <linux/err.h>
31 #include <linux/cpu.h>
32 #include <linux/smp.h>
33 #include <linux/seq_file.h>
34 #include <linux/irq.h>
35 #include <linux/percpu.h>
36 #include <linux/clockchips.h>
37 #include <linux/completion.h>
39 #include <linux/irq_work.h>
41 #include <asm/alternative.h>
42 #include <asm/atomic.h>
43 #include <asm/cacheflush.h>
45 #include <asm/cputype.h>
46 #include <asm/cpu_ops.h>
47 #include <asm/mmu_context.h>
48 #include <asm/pgtable.h>
49 #include <asm/pgalloc.h>
50 #include <asm/processor.h>
51 #include <asm/smp_plat.h>
52 #include <asm/sections.h>
53 #include <asm/tlbflush.h>
54 #include <asm/ptrace.h>
57 #define CREATE_TRACE_POINTS
58 #include <trace/events/ipi.h>
61 * as from 2.5, kernels no longer have an init_tasks structure
62 * so we need some other way of telling a new secondary core
63 * where to place its SVC stack
65 struct secondary_data secondary_data;
76 * Boot a secondary CPU, and assign it the specified idle task.
77 * This also gives us the initial stack to use for this CPU.
79 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
81 if (cpu_ops[cpu]->cpu_boot)
82 return cpu_ops[cpu]->cpu_boot(cpu);
87 static DECLARE_COMPLETION(cpu_running);
89 int __cpu_up(unsigned int cpu, struct task_struct *idle)
94 * We need to tell the secondary core where to find its stack and the
97 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
98 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
101 * Now bring the CPU into our world.
103 ret = boot_secondary(cpu, idle);
106 * CPU was successfully started, wait for it to come online or
109 wait_for_completion_timeout(&cpu_running,
110 msecs_to_jiffies(1000));
112 if (!cpu_online(cpu)) {
113 pr_crit("CPU%u: failed to come online\n", cpu);
117 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
120 secondary_data.stack = NULL;
125 static void smp_store_cpu_info(unsigned int cpuid)
127 store_cpu_topology(cpuid);
131 * This is the secondary CPU boot entry. We're using this CPUs
132 * idle thread stack, but a set of temporary page tables.
134 asmlinkage void secondary_start_kernel(void)
136 struct mm_struct *mm = &init_mm;
137 unsigned int cpu = smp_processor_id();
140 * All kernel threads share the same mm context; grab a
141 * reference and switch to it.
143 atomic_inc(&mm->mm_count);
144 current->active_mm = mm;
146 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
149 * TTBR0 is only used for the identity mapping at this stage. Make it
150 * point to zero page to avoid speculatively fetching new entries.
152 cpu_uninstall_idmap();
155 trace_hardirqs_off();
158 * If the system has established the capabilities, make sure
159 * this CPU ticks all of those. If it doesn't, the CPU will
160 * fail to come online.
162 verify_local_cpu_capabilities();
164 if (cpu_ops[cpu]->cpu_postboot)
165 cpu_ops[cpu]->cpu_postboot();
168 * Log the CPU info before it is marked online and might get read.
173 * Enable GIC and timers.
175 notify_cpu_starting(cpu);
177 smp_store_cpu_info(cpu);
180 * OK, now it's safe to let the boot CPU continue. Wait for
181 * the CPU migration code to notice that the CPU is online
182 * before we continue.
184 pr_info("CPU%u: Booted secondary processor [%08x]\n",
185 cpu, read_cpuid_id());
186 set_cpu_online(cpu, true);
187 complete(&cpu_running);
190 local_async_enable();
193 * OK, it's off to the idle thread for us
195 cpu_startup_entry(CPUHP_ONLINE);
198 #ifdef CONFIG_HOTPLUG_CPU
199 static int op_cpu_disable(unsigned int cpu)
202 * If we don't have a cpu_die method, abort before we reach the point
203 * of no return. CPU0 may not have an cpu_ops, so test for it.
205 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
209 * We may need to abort a hot unplug for some other mechanism-specific
212 if (cpu_ops[cpu]->cpu_disable)
213 return cpu_ops[cpu]->cpu_disable(cpu);
219 * __cpu_disable runs on the processor to be shutdown.
221 int __cpu_disable(void)
223 unsigned int cpu = smp_processor_id();
226 ret = op_cpu_disable(cpu);
231 * Take this CPU offline. Once we clear this, we can't return,
232 * and we must not schedule until we're ready to give up the cpu.
234 set_cpu_online(cpu, false);
237 * OK - migrate IRQs away from this CPU
239 irq_migrate_all_off_this_cpu();
244 static int op_cpu_kill(unsigned int cpu)
247 * If we have no means of synchronising with the dying CPU, then assume
248 * that it is really dead. We can only wait for an arbitrary length of
249 * time and hope that it's dead, so let's skip the wait and just hope.
251 if (!cpu_ops[cpu]->cpu_kill)
254 return cpu_ops[cpu]->cpu_kill(cpu);
258 * called on the thread which is asking for a CPU to be shutdown -
259 * waits until shutdown has completed, or it is timed out.
261 void __cpu_die(unsigned int cpu)
265 if (!cpu_wait_death(cpu, 5)) {
266 pr_crit("CPU%u: cpu didn't die\n", cpu);
269 pr_notice("CPU%u: shutdown\n", cpu);
272 * Now that the dying CPU is beyond the point of no return w.r.t.
273 * in-kernel synchronisation, try to get the firwmare to help us to
274 * verify that it has really left the kernel before we consider
275 * clobbering anything it might still be using.
277 err = op_cpu_kill(cpu);
279 pr_warn("CPU%d may not have shut down cleanly: %d\n",
284 * Called from the idle thread for the CPU which has been shutdown.
286 * Note that we disable IRQs here, but do not re-enable them
287 * before returning to the caller. This is also the behaviour
288 * of the other hotplug-cpu capable cores, so presumably coming
289 * out of idle fixes this.
293 unsigned int cpu = smp_processor_id();
299 /* Tell __cpu_die() that this CPU is now safe to dispose of */
300 (void)cpu_report_death();
303 * Actually shutdown the CPU. This must never fail. The specific hotplug
304 * mechanism must perform all required cache maintenance to ensure that
305 * no dirty lines are lost in the process of shutting down the CPU.
307 cpu_ops[cpu]->cpu_die(cpu);
313 static void __init hyp_mode_check(void)
315 if (is_hyp_mode_available())
316 pr_info("CPU: All CPU(s) started at EL2\n");
317 else if (is_hyp_mode_mismatched())
318 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
319 "CPU: CPUs started in inconsistent modes");
321 pr_info("CPU: All CPU(s) started at EL1\n");
324 void __init smp_cpus_done(unsigned int max_cpus)
326 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
327 setup_cpu_features();
329 apply_alternatives_all();
332 void __init smp_prepare_boot_cpu(void)
334 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
335 cpuinfo_store_boot_cpu();
338 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
344 * A cpu node with missing "reg" property is
345 * considered invalid to build a cpu_logical_map
348 cell = of_get_property(dn, "reg", NULL);
350 pr_err("%s: missing reg property\n", dn->full_name);
354 hwid = of_read_number(cell, of_n_addr_cells(dn));
356 * Non affinity bits must be set to 0 in the DT
358 if (hwid & ~MPIDR_HWID_BITMASK) {
359 pr_err("%s: invalid reg property\n", dn->full_name);
366 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
367 * entries and check for duplicates. If any is found just ignore the
368 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
369 * matching valid MPIDR values.
371 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
375 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
376 if (cpu_logical_map(i) == hwid)
382 * Initialize cpu operations for a logical cpu and
383 * set it in the possible mask on success
385 static int __init smp_cpu_setup(int cpu)
387 if (cpu_read_ops(cpu))
390 if (cpu_ops[cpu]->cpu_init(cpu))
393 set_cpu_possible(cpu, true);
398 static bool bootcpu_valid __initdata;
399 static unsigned int cpu_count = 1;
403 * acpi_map_gic_cpu_interface - parse processor MADT entry
405 * Carry out sanity checks on MADT processor entry and initialize
406 * cpu_logical_map on success
409 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
411 u64 hwid = processor->arm_mpidr;
413 if (!(processor->flags & ACPI_MADT_ENABLED)) {
414 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
418 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
419 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
423 if (is_mpidr_duplicate(cpu_count, hwid)) {
424 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
428 /* Check if GICC structure of boot CPU is available in the MADT */
429 if (cpu_logical_map(0) == hwid) {
431 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
435 bootcpu_valid = true;
439 if (cpu_count >= NR_CPUS)
442 /* map the logical cpu id to cpu MPIDR */
443 cpu_logical_map(cpu_count) = hwid;
449 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
450 const unsigned long end)
452 struct acpi_madt_generic_interrupt *processor;
454 processor = (struct acpi_madt_generic_interrupt *)header;
455 if (BAD_MADT_GICC_ENTRY(processor, end))
458 acpi_table_print_madt_entry(header);
460 acpi_map_gic_cpu_interface(processor);
465 #define acpi_table_parse_madt(...) do { } while (0)
469 * Enumerate the possible CPU set from the device tree and build the
470 * cpu logical map array containing MPIDR values related to logical
471 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
473 static void __init of_parse_and_init_cpus(void)
475 struct device_node *dn = NULL;
477 while ((dn = of_find_node_by_type(dn, "cpu"))) {
478 u64 hwid = of_get_cpu_mpidr(dn);
480 if (hwid == INVALID_HWID)
483 if (is_mpidr_duplicate(cpu_count, hwid)) {
484 pr_err("%s: duplicate cpu reg properties in the DT\n",
490 * The numbering scheme requires that the boot CPU
491 * must be assigned logical id 0. Record it so that
492 * the logical map built from DT is validated and can
495 if (hwid == cpu_logical_map(0)) {
497 pr_err("%s: duplicate boot cpu reg property in DT\n",
502 bootcpu_valid = true;
505 * cpu_logical_map has already been
506 * initialized and the boot cpu doesn't need
507 * the enable-method so continue without
513 if (cpu_count >= NR_CPUS)
516 pr_debug("cpu logical map 0x%llx\n", hwid);
517 cpu_logical_map(cpu_count) = hwid;
524 * Enumerate the possible CPU set from the device tree or ACPI and build the
525 * cpu logical map array containing MPIDR values related to logical
526 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
528 void __init smp_init_cpus(void)
533 of_parse_and_init_cpus();
536 * do a walk of MADT to determine how many CPUs
537 * we have including disabled CPUs, and get information
538 * we need for SMP init
540 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
541 acpi_parse_gic_cpu_interface, 0);
543 if (cpu_count > NR_CPUS)
544 pr_warn("no. of cores (%d) greater than configured maximum of %d - clipping\n",
547 if (!bootcpu_valid) {
548 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
553 * We need to set the cpu_logical_map entries before enabling
554 * the cpus so that cpu processor description entries (DT cpu nodes
555 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
556 * with entries in cpu_logical_map while initializing the cpus.
557 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
559 for (i = 1; i < NR_CPUS; i++) {
560 if (cpu_logical_map(i) != INVALID_HWID) {
561 if (smp_cpu_setup(i))
562 cpu_logical_map(i) = INVALID_HWID;
567 void __init smp_prepare_cpus(unsigned int max_cpus)
570 unsigned int cpu, ncores = num_possible_cpus();
574 smp_store_cpu_info(smp_processor_id());
577 * are we trying to boot more cores than exist?
579 if (max_cpus > ncores)
582 /* Don't bother if we're effectively UP */
587 * Initialise the present map (which describes the set of CPUs
588 * actually populated at the present time) and release the
589 * secondaries from the bootloader.
591 * Make sure we online at most (max_cpus - 1) additional CPUs.
594 for_each_possible_cpu(cpu) {
598 if (cpu == smp_processor_id())
604 err = cpu_ops[cpu]->cpu_prepare(cpu);
608 set_cpu_present(cpu, true);
613 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
615 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
617 __smp_cross_call = fn;
620 static const char *ipi_types[NR_IPI] __tracepoint_string = {
621 #define S(x,s) [x] = s
622 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
623 S(IPI_CALL_FUNC, "Function call interrupts"),
624 S(IPI_CPU_STOP, "CPU stop interrupts"),
625 S(IPI_TIMER, "Timer broadcast interrupts"),
626 S(IPI_IRQ_WORK, "IRQ work interrupts"),
629 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
631 trace_ipi_raise(target, ipi_types[ipinr]);
632 __smp_cross_call(target, ipinr);
635 void show_ipi_list(struct seq_file *p, int prec)
639 for (i = 0; i < NR_IPI; i++) {
640 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
641 prec >= 4 ? " " : "");
642 for_each_online_cpu(cpu)
643 seq_printf(p, "%10u ",
644 __get_irq_stat(cpu, ipi_irqs[i]));
645 seq_printf(p, " %s\n", ipi_types[i]);
649 u64 smp_irq_stat_cpu(unsigned int cpu)
654 for (i = 0; i < NR_IPI; i++)
655 sum += __get_irq_stat(cpu, ipi_irqs[i]);
660 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
662 smp_cross_call(mask, IPI_CALL_FUNC);
665 void arch_send_call_function_single_ipi(int cpu)
667 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
670 #ifdef CONFIG_IRQ_WORK
671 void arch_irq_work_raise(void)
673 if (__smp_cross_call)
674 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
678 static DEFINE_RAW_SPINLOCK(stop_lock);
681 * ipi_cpu_stop - handle IPI from smp_send_stop()
683 static void ipi_cpu_stop(unsigned int cpu)
685 if (system_state == SYSTEM_BOOTING ||
686 system_state == SYSTEM_RUNNING) {
687 raw_spin_lock(&stop_lock);
688 pr_crit("CPU%u: stopping\n", cpu);
690 raw_spin_unlock(&stop_lock);
693 set_cpu_online(cpu, false);
702 * Main handler for inter-processor interrupts
704 void handle_IPI(int ipinr, struct pt_regs *regs)
706 unsigned int cpu = smp_processor_id();
707 struct pt_regs *old_regs = set_irq_regs(regs);
709 if ((unsigned)ipinr < NR_IPI) {
710 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
711 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
721 generic_smp_call_function_interrupt();
731 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
734 tick_receive_broadcast();
739 #ifdef CONFIG_IRQ_WORK
748 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
752 if ((unsigned)ipinr < NR_IPI)
753 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
754 set_irq_regs(old_regs);
757 void smp_send_reschedule(int cpu)
759 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
762 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
763 void tick_broadcast(const struct cpumask *mask)
765 smp_cross_call(mask, IPI_TIMER);
769 void smp_send_stop(void)
771 unsigned long timeout;
773 if (num_online_cpus() > 1) {
776 cpumask_copy(&mask, cpu_online_mask);
777 cpumask_clear_cpu(smp_processor_id(), &mask);
779 smp_cross_call(&mask, IPI_CPU_STOP);
782 /* Wait up to one second for other CPUs to stop */
783 timeout = USEC_PER_SEC;
784 while (num_online_cpus() > 1 && timeout--)
787 if (num_online_cpus() > 1)
788 pr_warning("SMP: failed to stop secondary CPUs\n");
794 int setup_profiling_timer(unsigned int multiplier)