arch/arm64/mm/dma-mapping.c

   1 /*
   2  * SWIOTLB-based DMA API implementation
   3  *
   4  * Copyright (C) 2012 ARM Ltd.
   5  * Author: Catalin Marinas <catalin.marinas@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/gfp.h>
  21 #include <linux/acpi.h>
  22 #include <linux/export.h>
  23 #include <linux/slab.h>
  24 #include <linux/genalloc.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/dma-contiguous.h>
  27 #include <linux/dma-iommu.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/swiotlb.h>
  30
  31 #include <asm/cacheflush.h>
  32
  33 static struct gen_pool *atomic_pool;
  34
  35 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
  36 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
  37
  38 static int __init early_coherent_pool(char *p)
  39 {
  40         atomic_pool_size = memparse(p, &p);
  41         return 0;
  42 }
  43 early_param("coherent_pool", early_coherent_pool);
  44
  45 void *arch_alloc_from_atomic_pool(size_t size, struct page **ret_page, gfp_t flags)
  46 {
  47         unsigned long val;
  48         void *ptr = NULL;
  49
  50         if (!atomic_pool) {
  51                 WARN(1, "coherent pool not initialised!\n");
  52                 return NULL;
  53         }
  54
  55         val = gen_pool_alloc(atomic_pool, size);
  56         if (val) {
  57                 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
  58
  59                 *ret_page = phys_to_page(phys);
  60                 ptr = (void *)val;
  61                 memset(ptr, 0, size);
  62         }
  63
  64         return ptr;
  65 }
  66
  67 bool arch_in_atomic_pool(void *start, size_t size)
  68 {
  69         return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
  70 }
  71
  72 int arch_free_from_atomic_pool(void *start, size_t size)
  73 {
  74         if (!arch_in_atomic_pool(start, size))
  75                 return 0;
  76
  77         gen_pool_free(atomic_pool, (unsigned long)start, size);
  78
  79         return 1;
  80 }
  81
  82 static void *__dma_alloc_coherent(struct device *dev, size_t size,
  83                                   dma_addr_t *dma_handle, gfp_t flags,
  84                                   struct dma_attrs *attrs)
  85 {
  86         if (dev == NULL) {
  87                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  88                 return NULL;
  89         }
  90
  91         if (IS_ENABLED(CONFIG_ZONE_DMA) &&
  92             dev->coherent_dma_mask <= DMA_BIT_MASK(32))
  93                 flags |= GFP_DMA;
  94         if (dev_get_cma_area(dev) && gfpflags_allow_blocking(flags)) {
  95                 struct page *page;
  96                 void *addr;
  97
  98                 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
  99                                                         get_order(size));
 100                 if (!page)
 101                         return NULL;
 102
 103                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 104                 addr = page_address(page);
 105                 memset(addr, 0, size);
 106                 return addr;
 107         } else {
 108                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
 109         }
 110 }
 111
 112 static void __dma_free_coherent(struct device *dev, size_t size,
 113                                 void *vaddr, dma_addr_t dma_handle,
 114                                 struct dma_attrs *attrs)
 115 {
 116         bool freed;
 117         phys_addr_t paddr = dma_to_phys(dev, dma_handle);
 118
 119         if (dev == NULL) {
 120                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
 121                 return;
 122         }
 123
 124         freed = dma_release_from_contiguous(dev,
 125                                         phys_to_page(paddr),
 126                                         size >> PAGE_SHIFT);
 127         if (!freed)
 128                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
 129 }
 130
 131 static void *__dma_alloc(struct device *dev, size_t size,
 132                          dma_addr_t *dma_handle, gfp_t flags,
 133                          struct dma_attrs *attrs)
 134 {
 135         struct page *page;
 136         void *ptr, *coherent_ptr;
 137         bool coherent = is_device_dma_coherent(dev);
 138         pgprot_t prot = arch_get_dma_pgprot(attrs, PAGE_KERNEL, false);
 139
 140         size = PAGE_ALIGN(size);
 141
 142         if (!coherent && !gfpflags_allow_blocking(flags)) {
 143                 struct page *page = NULL;
 144                 void *addr = arch_alloc_from_atomic_pool(size, &page, flags);
 145
 146                 if (addr)
 147                         *dma_handle = phys_to_dma(dev, page_to_phys(page));
 148
 149                 return addr;
 150         }
 151
 152         ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
 153         if (!ptr)
 154                 goto no_mem;
 155
 156         /* no need for non-cacheable mapping if coherent */
 157         if (coherent)
 158                 return ptr;
 159
 160         /* remove any dirty cache lines on the kernel alias */
 161         __dma_flush_range(ptr, ptr + size);
 162
 163         /* create a coherent mapping */
 164         page = virt_to_page(ptr);
 165         coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
 166                                                    prot, __builtin_return_address(0));
 167         if (!coherent_ptr)
 168                 goto no_map;
 169
 170         return coherent_ptr;
 171
 172 no_map:
 173         __dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
 174 no_mem:
 175         *dma_handle = DMA_ERROR_CODE;
 176         return NULL;
 177 }
 178
 179 static void __dma_free(struct device *dev, size_t size,
 180                        void *vaddr, dma_addr_t dma_handle,
 181                        struct dma_attrs *attrs)
 182 {
 183         void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
 184
 185         size = PAGE_ALIGN(size);
 186
 187         if (!is_device_dma_coherent(dev)) {
 188                 if (arch_free_from_atomic_pool(vaddr, size))
 189                         return;
 190                 vunmap(vaddr);
 191         }
 192         __dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
 193 }
 194
 195 static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
 196                                      unsigned long offset, size_t size,
 197                                      enum dma_data_direction dir,
 198                                      struct dma_attrs *attrs)
 199 {
 200         dma_addr_t dev_addr;
 201
 202         dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
 203         if (!is_device_dma_coherent(dev))
 204                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 205
 206         return dev_addr;
 207 }
 208
 209
 210 static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
 211                                  size_t size, enum dma_data_direction dir,
 212                                  struct dma_attrs *attrs)
 213 {
 214         if (!is_device_dma_coherent(dev))
 215                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 216         swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
 217 }
 218
 219 static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 220                                   int nelems, enum dma_data_direction dir,
 221                                   struct dma_attrs *attrs)
 222 {
 223         struct scatterlist *sg;
 224         int i, ret;
 225
 226         ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
 227         if (!is_device_dma_coherent(dev))
 228                 for_each_sg(sgl, sg, ret, i)
 229                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 230                                        sg->length, dir);
 231
 232         return ret;
 233 }
 234
 235 static void __swiotlb_unmap_sg_attrs(struct device *dev,
 236                                      struct scatterlist *sgl, int nelems,
 237                                      enum dma_data_direction dir,
 238                                      struct dma_attrs *attrs)
 239 {
 240         struct scatterlist *sg;
 241         int i;
 242
 243         if (!is_device_dma_coherent(dev))
 244                 for_each_sg(sgl, sg, nelems, i)
 245                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 246                                          sg->length, dir);
 247         swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
 248 }
 249
 250 static void __swiotlb_sync_single_for_cpu(struct device *dev,
 251                                           dma_addr_t dev_addr, size_t size,
 252                                           enum dma_data_direction dir)
 253 {
 254         if (!is_device_dma_coherent(dev))
 255                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 256         swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
 257 }
 258
 259 static void __swiotlb_sync_single_for_device(struct device *dev,
 260                                              dma_addr_t dev_addr, size_t size,
 261                                              enum dma_data_direction dir)
 262 {
 263         swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
 264         if (!is_device_dma_coherent(dev))
 265                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 266 }
 267
 268 static void __swiotlb_sync_sg_for_cpu(struct device *dev,
 269                                       struct scatterlist *sgl, int nelems,
 270                                       enum dma_data_direction dir)
 271 {
 272         struct scatterlist *sg;
 273         int i;
 274
 275         if (!is_device_dma_coherent(dev))
 276                 for_each_sg(sgl, sg, nelems, i)
 277                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 278                                          sg->length, dir);
 279         swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
 280 }
 281
 282 static void __swiotlb_sync_sg_for_device(struct device *dev,
 283                                          struct scatterlist *sgl, int nelems,
 284                                          enum dma_data_direction dir)
 285 {
 286         struct scatterlist *sg;
 287         int i;
 288
 289         swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
 290         if (!is_device_dma_coherent(dev))
 291                 for_each_sg(sgl, sg, nelems, i)
 292                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 293                                        sg->length, dir);
 294 }
 295
 296 static int __swiotlb_mmap(struct device *dev,
 297                           struct vm_area_struct *vma,
 298                           void *cpu_addr, dma_addr_t dma_addr, size_t size,
 299                           struct dma_attrs *attrs)
 300 {
 301         int ret = -ENXIO;
 302         unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
 303                                         PAGE_SHIFT;
 304         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
 305         unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
 306         unsigned long off = vma->vm_pgoff;
 307
 308         vma->vm_page_prot = arch_get_dma_pgprot(attrs, vma->vm_page_prot,
 309                                              is_device_dma_coherent(dev));
 310
 311         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 312                 return ret;
 313
 314         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
 315                 ret = remap_pfn_range(vma, vma->vm_start,
 316                                       pfn + off,
 317                                       vma->vm_end - vma->vm_start,
 318                                       vma->vm_page_prot);
 319         }
 320
 321         return ret;
 322 }
 323
 324 static int __swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
 325                                  void *cpu_addr, dma_addr_t handle, size_t size,
 326                                  struct dma_attrs *attrs)
 327 {
 328         int ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 329
 330         if (!ret)
 331                 sg_set_page(sgt->sgl, phys_to_page(dma_to_phys(dev, handle)),
 332                             PAGE_ALIGN(size), 0);
 333
 334         return ret;
 335 }
 336
 337 struct dma_map_ops swiotlb_dma_ops = {
 338         .alloc = __dma_alloc,
 339         .free = __dma_free,
 340         .mmap = __swiotlb_mmap,
 341         .get_sgtable = __swiotlb_get_sgtable,
 342         .map_page = __swiotlb_map_page,
 343         .unmap_page = __swiotlb_unmap_page,
 344         .map_sg = __swiotlb_map_sg_attrs,
 345         .unmap_sg = __swiotlb_unmap_sg_attrs,
 346         .sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
 347         .sync_single_for_device = __swiotlb_sync_single_for_device,
 348         .sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
 349         .sync_sg_for_device = __swiotlb_sync_sg_for_device,
 350         .dma_supported = swiotlb_dma_supported,
 351         .mapping_error = swiotlb_dma_mapping_error,
 352 };
 353 EXPORT_SYMBOL(swiotlb_dma_ops);
 354
 355 static int __init atomic_pool_init(void)
 356 {
 357         pgprot_t prot = __pgprot(PROT_NORMAL_NC);
 358         unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
 359         struct page *page;
 360         void *addr;
 361         unsigned int pool_size_order = get_order(atomic_pool_size);
 362
 363         if (dev_get_cma_area(NULL))
 364                 page = dma_alloc_from_contiguous(NULL, nr_pages,
 365                                                         pool_size_order);
 366         else
 367                 page = alloc_pages(GFP_DMA, pool_size_order);
 368
 369         if (page) {
 370                 int ret;
 371                 void *page_addr = page_address(page);
 372
 373                 memset(page_addr, 0, atomic_pool_size);
 374                 __dma_flush_range(page_addr, page_addr + atomic_pool_size);
 375
 376                 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
 377                 if (!atomic_pool)
 378                         goto free_page;
 379
 380                 addr = dma_common_contiguous_remap(page, atomic_pool_size,
 381                                         VM_USERMAP, prot, atomic_pool_init);
 382
 383                 if (!addr)
 384                         goto destroy_genpool;
 385
 386                 ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
 387                                         page_to_phys(page),
 388                                         atomic_pool_size, -1);
 389                 if (ret)
 390                         goto remove_mapping;
 391
 392                 gen_pool_set_algo(atomic_pool,
 393                                   gen_pool_first_fit_order_align,
 394                                   (void *)PAGE_SHIFT);
 395
 396                 pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
 397                         atomic_pool_size / 1024);
 398                 return 0;
 399         }
 400         goto out;
 401
 402 remove_mapping:
 403         dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
 404 destroy_genpool:
 405         gen_pool_destroy(atomic_pool);
 406         atomic_pool = NULL;
 407 free_page:
 408         if (!dma_release_from_contiguous(NULL, page, nr_pages))
 409                 __free_pages(page, pool_size_order);
 410 out:
 411         pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
 412                 atomic_pool_size / 1024);
 413         return -ENOMEM;
 414 }
 415
 416 /********************************************
 417  * The following APIs are for dummy DMA ops *
 418  ********************************************/
 419
 420 static void *__dummy_alloc(struct device *dev, size_t size,
 421                            dma_addr_t *dma_handle, gfp_t flags,
 422                            struct dma_attrs *attrs)
 423 {
 424         return NULL;
 425 }
 426
 427 static void __dummy_free(struct device *dev, size_t size,
 428                          void *vaddr, dma_addr_t dma_handle,
 429                          struct dma_attrs *attrs)
 430 {
 431 }
 432
 433 static int __dummy_mmap(struct device *dev,
 434                         struct vm_area_struct *vma,
 435                         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 436                         struct dma_attrs *attrs)
 437 {
 438         return -ENXIO;
 439 }
 440
 441 static dma_addr_t __dummy_map_page(struct device *dev, struct page *page,
 442                                    unsigned long offset, size_t size,
 443                                    enum dma_data_direction dir,
 444                                    struct dma_attrs *attrs)
 445 {
 446         return DMA_ERROR_CODE;
 447 }
 448
 449 static void __dummy_unmap_page(struct device *dev, dma_addr_t dev_addr,
 450                                size_t size, enum dma_data_direction dir,
 451                                struct dma_attrs *attrs)
 452 {
 453 }
 454
 455 static int __dummy_map_sg(struct device *dev, struct scatterlist *sgl,
 456                           int nelems, enum dma_data_direction dir,
 457                           struct dma_attrs *attrs)
 458 {
 459         return 0;
 460 }
 461
 462 static void __dummy_unmap_sg(struct device *dev,
 463                              struct scatterlist *sgl, int nelems,
 464                              enum dma_data_direction dir,
 465                              struct dma_attrs *attrs)
 466 {
 467 }
 468
 469 static void __dummy_sync_single(struct device *dev,
 470                                 dma_addr_t dev_addr, size_t size,
 471                                 enum dma_data_direction dir)
 472 {
 473 }
 474
 475 static void __dummy_sync_sg(struct device *dev,
 476                             struct scatterlist *sgl, int nelems,
 477                             enum dma_data_direction dir)
 478 {
 479 }
 480
 481 static int __dummy_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
 482 {
 483         return 1;
 484 }
 485
 486 static int __dummy_dma_supported(struct device *hwdev, u64 mask)
 487 {
 488         return 0;
 489 }
 490
 491 struct dma_map_ops dummy_dma_ops = {
 492         .alloc                  = __dummy_alloc,
 493         .free                   = __dummy_free,
 494         .mmap                   = __dummy_mmap,
 495         .map_page               = __dummy_map_page,
 496         .unmap_page             = __dummy_unmap_page,
 497         .map_sg                 = __dummy_map_sg,
 498         .unmap_sg               = __dummy_unmap_sg,
 499         .sync_single_for_cpu    = __dummy_sync_single,
 500         .sync_single_for_device = __dummy_sync_single,
 501         .sync_sg_for_cpu        = __dummy_sync_sg,
 502         .sync_sg_for_device     = __dummy_sync_sg,
 503         .mapping_error          = __dummy_mapping_error,
 504         .dma_supported          = __dummy_dma_supported,
 505 };
 506 EXPORT_SYMBOL(dummy_dma_ops);
 507
 508 static int __init arm64_dma_init(void)
 509 {
 510         return atomic_pool_init();
 511 }
 512 arch_initcall(arm64_dma_init);
 513
 514 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
 515
 516 static int __init dma_debug_do_init(void)
 517 {
 518         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 519         return 0;
 520 }
 521 fs_initcall(dma_debug_do_init);
 522
 523 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 524                         struct iommu_ops *iommu, bool coherent)
 525 {
 526         dev->archdata.dma_coherent = coherent;
 527
 528         if (!common_iommu_setup_dma_ops(dev, dma_base, size, iommu))
 529                 arch_set_dma_ops(dev, &swiotlb_dma_ops);
 530 }
 531
 532 void arch_teardown_dma_ops(struct device *dev)
 533 {
 534         common_iommu_teardown_dma_ops(dev);
 535 }