2 * Favr-32 board-specific setup code.
4 * Copyright (C) 2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/bootmem.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/types.h>
17 #include <linux/linkage.h>
18 #include <linux/gpio.h>
19 #include <linux/leds.h>
20 #include <linux/atmel-mci.h>
21 #include <linux/pwm.h>
22 #include <linux/pwm_backlight.h>
23 #include <linux/regulator/fixed.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/ads7846.h>
28 #include <sound/atmel-abdac.h>
30 #include <video/atmel_lcdc.h>
32 #include <asm/setup.h>
34 #include <mach/at32ap700x.h>
35 #include <mach/init.h>
36 #include <mach/board.h>
37 #include <mach/portmux.h>
41 /* Oscillator frequencies. These are board-specific */
42 unsigned long at32_board_osc_rates[3] = {
43 [0] = 32768, /* 32.768 kHz on RTC osc */
44 [1] = 20000000, /* 20 MHz on osc0 */
45 [2] = 12000000, /* 12 MHz on osc1 */
48 /* Initialized by bootloader-specific startup code. */
49 struct tag *bootloader_tags __initdata;
51 static struct atmel_abdac_pdata __initdata abdac0_data = {
57 static struct eth_addr __initdata hw_addr[1];
58 static struct macb_platform_data __initdata eth_data[1] = {
60 .phy_mask = ~(1U << 1),
64 static int ads7843_get_pendown_state(void)
66 return !gpio_get_value(GPIO_PIN_PB(3));
69 static struct ads7846_platform_data ads7843_data = {
71 .get_pendown_state = ads7843_get_pendown_state,
74 * Values below are for debounce filtering, these can be experimented
82 .settle_delay_usecs = 500,
83 .penirq_recheck_delay_usecs = 100,
86 static struct spi_board_info __initdata spi1_board_info[] = {
88 /* ADS7843 touch controller */
89 .modalias = "ads7846",
90 .max_speed_hz = 2000000,
93 .platform_data = &ads7843_data,
97 static struct mci_platform_data __initdata mci0_data = {
100 .detect_pin = -ENODEV,
105 static struct fb_videomode __initdata lb104v03_modes[] = {
107 .name = "640x480 @ 50",
109 .xres = 640, .yres = 480,
110 .pixclock = KHZ2PICOS(25100),
112 .left_margin = 90, .right_margin = 70,
113 .upper_margin = 30, .lower_margin = 15,
114 .hsync_len = 12, .vsync_len = 2,
117 .vmode = FB_VMODE_NONINTERLACED,
121 static struct fb_monspecs __initdata favr32_default_monspecs = {
122 .manufacturer = "LG",
123 .monitor = "LB104V03",
124 .modedb = lb104v03_modes,
125 .modedb_len = ARRAY_SIZE(lb104v03_modes),
133 struct atmel_lcdfb_pdata __initdata favr32_lcdc_data = {
135 .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
136 .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
137 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
138 | ATMEL_LCDC_MEMOR_BIG),
139 .default_monspecs = &favr32_default_monspecs,
143 static struct gpio_led favr32_leds[] = {
146 .gpio = GPIO_PIN_PE(19),
147 .default_trigger = "heartbeat",
152 .gpio = GPIO_PIN_PE(20),
157 static struct gpio_led_platform_data favr32_led_data = {
158 .num_leds = ARRAY_SIZE(favr32_leds),
162 static struct platform_device favr32_led_dev = {
166 .platform_data = &favr32_led_data,
171 * The next two functions should go away as the boot loader is
172 * supposed to initialize the macb address registers with a valid
173 * ethernet address. But we need to keep it around for a while until
174 * we can be reasonably sure the boot loader does this.
176 * The phy_id is ignored as the driver will probe for it.
178 static int __init parse_tag_ethernet(struct tag *tag)
182 i = tag->u.ethernet.mac_index;
183 if (i < ARRAY_SIZE(hw_addr))
184 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
185 sizeof(hw_addr[i].addr));
189 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
191 static void __init set_hw_addr(struct platform_device *pdev)
193 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
200 if (pdev->id >= ARRAY_SIZE(hw_addr))
203 addr = hw_addr[pdev->id].addr;
204 if (!is_valid_ether_addr(addr))
208 * Since this is board-specific code, we'll cheat and use the
209 * physical address directly as we happen to know that it's
210 * the same as the virtual address.
212 regs = (void __iomem __force *)res->start;
213 pclk = clk_get(&pdev->dev, "pclk");
218 __raw_writel((addr[3] << 24) | (addr[2] << 16)
219 | (addr[1] << 8) | addr[0], regs + 0x98);
220 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
225 void __init favr32_setup_leds(void)
229 for (i = 0; i < ARRAY_SIZE(favr32_leds); i++)
230 at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT);
232 platform_device_register(&favr32_led_dev);
235 static struct pwm_lookup pwm_lookup[] = {
236 PWM_LOOKUP("at91sam9rl-pwm", PWM_BL_CH, "pwm-backlight.0", NULL,
237 5000, PWM_POLARITY_INVERSED),
240 static struct regulator_consumer_supply fixed_power_consumers[] = {
241 REGULATOR_SUPPLY("power", "pwm-backlight.0"),
244 static struct platform_pwm_backlight_data pwm_bl_data = {
245 .enable_gpio = GPIO_PIN_PA(28),
246 .max_brightness = 255,
247 .dft_brightness = 255,
248 .lth_brightness = 50,
251 static struct platform_device pwm_bl_device = {
252 .name = "pwm-backlight",
254 .platform_data = &pwm_bl_data,
258 static void __init favr32_setup_atmel_pwm_bl(void)
260 pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
261 regulator_register_always_on(0, "fixed", fixed_power_consumers,
262 ARRAY_SIZE(fixed_power_consumers), 3300000);
263 platform_device_register(&pwm_bl_device);
264 at32_select_gpio(pwm_bl_data.enable_gpio, 0);
267 void __init setup_board(void)
269 at32_map_usart(3, 0, 0); /* USART 3 => /dev/ttyS0 */
270 at32_setup_serial_console(0);
273 static int __init set_abdac_rate(struct platform_device *pdev)
283 osc1 = clk_get(NULL, "osc1");
285 retval = PTR_ERR(osc1);
289 pll1 = clk_get(NULL, "pll1");
291 retval = PTR_ERR(pll1);
295 abdac = clk_get(&pdev->dev, "sample_clk");
297 retval = PTR_ERR(abdac);
301 retval = clk_set_parent(pll1, osc1);
306 * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in
307 * power of 2, to a value above 80 MHz. Power of 2 so it is possible
308 * for the generic clock to divide it down again and 80 MHz is the
309 * lowest frequency for the PLL.
311 retval = clk_round_rate(pll1,
312 CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
318 retval = clk_set_rate(pll1, retval);
322 retval = clk_set_parent(abdac, pll1);
336 static int __init favr32_init(void)
339 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
340 * pins so that nobody messes with them.
342 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
344 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
346 at32_add_device_usart(0);
348 set_hw_addr(at32_add_device_eth(0, ð_data[0]));
350 spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
352 set_abdac_rate(at32_add_device_abdac(0, &abdac0_data));
354 at32_add_device_pwm(1 << PWM_BL_CH);
355 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
356 at32_add_device_mci(0, &mci0_data);
357 at32_add_device_usba(0, NULL);
358 at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);
362 favr32_setup_atmel_pwm_bl();
366 postcore_initcall(favr32_init);