2 * the simple DMA Implementation for Blackfin
4 * Copyright 2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
9 #include <linux/module.h>
11 #include <asm/blackfin.h>
14 struct dma_register * const dma_io_base_addr[MAX_DMA_CHANNELS] = {
15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
16 (struct dma_register *) DMA1_NEXT_DESC_PTR,
17 (struct dma_register *) DMA2_NEXT_DESC_PTR,
18 (struct dma_register *) DMA3_NEXT_DESC_PTR,
19 (struct dma_register *) DMA4_NEXT_DESC_PTR,
20 (struct dma_register *) DMA5_NEXT_DESC_PTR,
21 (struct dma_register *) DMA6_NEXT_DESC_PTR,
22 (struct dma_register *) DMA7_NEXT_DESC_PTR,
23 (struct dma_register *) DMA8_NEXT_DESC_PTR,
24 (struct dma_register *) DMA9_NEXT_DESC_PTR,
25 (struct dma_register *) DMA10_NEXT_DESC_PTR,
26 (struct dma_register *) DMA11_NEXT_DESC_PTR,
27 (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
28 (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
29 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
30 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
32 EXPORT_SYMBOL(dma_io_base_addr);
34 int channel2irq(unsigned int channel)
52 ret_irq = IRQ_UART1_RX;
56 ret_irq = IRQ_UART1_TX;
60 ret_irq = IRQ_SPORT0_RX;
64 ret_irq = IRQ_SPORT0_TX;
68 ret_irq = IRQ_SPORT1_RX;
72 ret_irq = IRQ_SPORT1_TX;
80 ret_irq = IRQ_UART0_RX;
84 ret_irq = IRQ_UART0_TX;
87 case CH_MEM_STREAM0_SRC:
88 case CH_MEM_STREAM0_DEST:
89 ret_irq = IRQ_MEM_DMA0;
92 case CH_MEM_STREAM1_SRC:
93 case CH_MEM_STREAM1_DEST:
94 ret_irq = IRQ_MEM_DMA1;