arch/blackfin/mach-bf609/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <asm/bfin6xx_spi.h>
  21 #include <asm/dma.h>
  22 #include <asm/gpio.h>
  23 #include <asm/nand.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/portmux.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/input.h>
  28 #include <linux/spi/ad7877.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF609-EZKIT";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40 #include <linux/usb/isp1760.h>
  41 static struct resource bfin_isp1760_resources[] = {
  42         [0] = {
  43                 .start  = 0x2C0C0000,
  44                 .end    = 0x2C0C0000 + 0xfffff,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = IRQ_PG7,
  49                 .end    = IRQ_PG7,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct isp1760_platform_data isp1760_priv = {
  55         .is_isp1761 = 0,
  56         .bus_width_16 = 1,
  57         .port1_otg = 0,
  58         .analog_oc = 0,
  59         .dack_polarity_high = 0,
  60         .dreq_polarity_high = 0,
  61 };
  62
  63 static struct platform_device bfin_isp1760_device = {
  64         .name           = "isp1760",
  65         .id             = 0,
  66         .dev = {
  67                 .platform_data = &isp1760_priv,
  68         },
  69         .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  70         .resource       = bfin_isp1760_resources,
  71 };
  72 #endif
  73
  74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  75 #include <asm/bfin_rotary.h>
  76
  77 static struct bfin_rotary_platform_data bfin_rotary_data = {
  78         /*.rotary_up_key     = KEY_UP,*/
  79         /*.rotary_down_key   = KEY_DOWN,*/
  80         .rotary_rel_code   = REL_WHEEL,
  81         .rotary_button_key = KEY_ENTER,
  82         .debounce          = 10,        /* 0..17 */
  83         .mode              = ROT_QUAD_ENC | ROT_DEBE,
  84 };
  85
  86 static struct resource bfin_rotary_resources[] = {
  87         {
  88                 .start = IRQ_CNT,
  89                 .end = IRQ_CNT,
  90                 .flags = IORESOURCE_IRQ,
  91         },
  92 };
  93
  94 static struct platform_device bfin_rotary_device = {
  95         .name           = "bfin-rotary",
  96         .id             = -1,
  97         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
  98         .resource       = bfin_rotary_resources,
  99         .dev            = {
 100                 .platform_data = &bfin_rotary_data,
 101         },
 102 };
 103 #endif
 104
 105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
 106 #include <linux/stmmac.h>
 107
 108 static struct stmmac_mdio_bus_data phy_private_data = {
 109         .bus_id = 0,
 110         .phy_mask = 1,
 111 };
 112
 113 static struct plat_stmmacenet_data eth_private_data = {
 114         .bus_id   = 0,
 115         .enh_desc = 1,
 116         .phy_addr = 1,
 117         .mdio_bus_data = &phy_private_data,
 118 };
 119
 120 static struct platform_device bfin_eth_device = {
 121         .name           = "stmmaceth",
 122         .id             = 0,
 123         .num_resources  = 2,
 124         .resource       = (struct resource[]) {
 125                 {
 126                         .start  = EMAC0_MACCFG,
 127                         .end    = EMAC0_MACCFG + 0x1274,
 128                         .flags  = IORESOURCE_MEM,
 129                 },
 130                 {
 131                         .name   = "macirq",
 132                         .start  = IRQ_EMAC0_STAT,
 133                         .end    = IRQ_EMAC0_STAT,
 134                         .flags  = IORESOURCE_IRQ,
 135                 },
 136         },
 137         .dev = {
 138                 .platform_data = &eth_private_data,
 139         }
 140 };
 141 #endif
 142
 143 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 144 #include <linux/input/adxl34x.h>
 145 static const struct adxl34x_platform_data adxl34x_info = {
 146         .x_axis_offset = 0,
 147         .y_axis_offset = 0,
 148         .z_axis_offset = 0,
 149         .tap_threshold = 0x31,
 150         .tap_duration = 0x10,
 151         .tap_latency = 0x60,
 152         .tap_window = 0xF0,
 153         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 154         .act_axis_control = 0xFF,
 155         .activity_threshold = 5,
 156         .inactivity_threshold = 3,
 157         .inactivity_time = 4,
 158         .free_fall_threshold = 0x7,
 159         .free_fall_time = 0x20,
 160         .data_rate = 0x8,
 161         .data_range = ADXL_FULL_RES,
 162
 163         .ev_type = EV_ABS,
 164         .ev_code_x = ABS_X,             /* EV_REL */
 165         .ev_code_y = ABS_Y,             /* EV_REL */
 166         .ev_code_z = ABS_Z,             /* EV_REL */
 167
 168         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 169
 170 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 171 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
 172         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 173         .fifo_mode = ADXL_FIFO_STREAM,
 174         .orientation_enable = ADXL_EN_ORIENTATION_3D,
 175         .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
 176         .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
 177         /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
 178         .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 179 };
 180 #endif
 181
 182 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 183 static struct platform_device rtc_device = {
 184         .name = "rtc-bfin",
 185         .id   = -1,
 186 };
 187 #endif
 188
 189 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 190 #ifdef CONFIG_SERIAL_BFIN_UART0
 191 static struct resource bfin_uart0_resources[] = {
 192         {
 193                 .start = UART0_REVID,
 194                 .end = UART0_RXDIV+4,
 195                 .flags = IORESOURCE_MEM,
 196         },
 197         {
 198                 .start = IRQ_UART0_TX,
 199                 .end = IRQ_UART0_TX,
 200                 .flags = IORESOURCE_IRQ,
 201         },
 202         {
 203                 .start = IRQ_UART0_RX,
 204                 .end = IRQ_UART0_RX,
 205                 .flags = IORESOURCE_IRQ,
 206         },
 207         {
 208                 .start = IRQ_UART0_STAT,
 209                 .end = IRQ_UART0_STAT,
 210                 .flags = IORESOURCE_IRQ,
 211         },
 212         {
 213                 .start = CH_UART0_TX,
 214                 .end = CH_UART0_TX,
 215                 .flags = IORESOURCE_DMA,
 216         },
 217         {
 218                 .start = CH_UART0_RX,
 219                 .end = CH_UART0_RX,
 220                 .flags = IORESOURCE_DMA,
 221         },
 222 #ifdef CONFIG_BFIN_UART0_CTSRTS
 223         {       /* CTS pin -- 0 means not supported */
 224                 .start = GPIO_PD10,
 225                 .end = GPIO_PD10,
 226                 .flags = IORESOURCE_IO,
 227         },
 228         {       /* RTS pin -- 0 means not supported */
 229                 .start = GPIO_PD9,
 230                 .end = GPIO_PD9,
 231                 .flags = IORESOURCE_IO,
 232         },
 233 #endif
 234 };
 235
 236 static unsigned short bfin_uart0_peripherals[] = {
 237         P_UART0_TX, P_UART0_RX,
 238 #ifdef CONFIG_BFIN_UART0_CTSRTS
 239         P_UART0_RTS, P_UART0_CTS,
 240 #endif
 241         0
 242 };
 243
 244 static struct platform_device bfin_uart0_device = {
 245         .name = "bfin-uart",
 246         .id = 0,
 247         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 248         .resource = bfin_uart0_resources,
 249         .dev = {
 250                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 251         },
 252 };
 253 #endif
 254 #ifdef CONFIG_SERIAL_BFIN_UART1
 255 static struct resource bfin_uart1_resources[] = {
 256         {
 257                 .start = UART1_REVID,
 258                 .end = UART1_RXDIV+4,
 259                 .flags = IORESOURCE_MEM,
 260         },
 261         {
 262                 .start = IRQ_UART1_TX,
 263                 .end = IRQ_UART1_TX,
 264                 .flags = IORESOURCE_IRQ,
 265         },
 266         {
 267                 .start = IRQ_UART1_RX,
 268                 .end = IRQ_UART1_RX,
 269                 .flags = IORESOURCE_IRQ,
 270         },
 271         {
 272                 .start = IRQ_UART1_STAT,
 273                 .end = IRQ_UART1_STAT,
 274                 .flags = IORESOURCE_IRQ,
 275         },
 276         {
 277                 .start = CH_UART1_TX,
 278                 .end = CH_UART1_TX,
 279                 .flags = IORESOURCE_DMA,
 280         },
 281         {
 282                 .start = CH_UART1_RX,
 283                 .end = CH_UART1_RX,
 284                 .flags = IORESOURCE_DMA,
 285         },
 286 #ifdef CONFIG_BFIN_UART1_CTSRTS
 287         {       /* CTS pin -- 0 means not supported */
 288                 .start = GPIO_PG13,
 289                 .end = GPIO_PG13,
 290                 .flags = IORESOURCE_IO,
 291         },
 292         {       /* RTS pin -- 0 means not supported */
 293                 .start = GPIO_PG10,
 294                 .end = GPIO_PG10,
 295                 .flags = IORESOURCE_IO,
 296         },
 297 #endif
 298 };
 299
 300 static unsigned short bfin_uart1_peripherals[] = {
 301         P_UART1_TX, P_UART1_RX,
 302 #ifdef CONFIG_BFIN_UART1_CTSRTS
 303         P_UART1_RTS, P_UART1_CTS,
 304 #endif
 305         0
 306 };
 307
 308 static struct platform_device bfin_uart1_device = {
 309         .name = "bfin-uart",
 310         .id = 1,
 311         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 312         .resource = bfin_uart1_resources,
 313         .dev = {
 314                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 315         },
 316 };
 317 #endif
 318 #endif
 319
 320 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 321 #ifdef CONFIG_BFIN_SIR0
 322 static struct resource bfin_sir0_resources[] = {
 323         {
 324                 .start = 0xFFC00400,
 325                 .end = 0xFFC004FF,
 326                 .flags = IORESOURCE_MEM,
 327         },
 328         {
 329                 .start = IRQ_UART0_TX,
 330                 .end = IRQ_UART0_TX+1,
 331                 .flags = IORESOURCE_IRQ,
 332         },
 333         {
 334                 .start = CH_UART0_TX,
 335                 .end = CH_UART0_TX+1,
 336                 .flags = IORESOURCE_DMA,
 337         },
 338 };
 339 static struct platform_device bfin_sir0_device = {
 340         .name = "bfin_sir",
 341         .id = 0,
 342         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 343         .resource = bfin_sir0_resources,
 344 };
 345 #endif
 346 #ifdef CONFIG_BFIN_SIR1
 347 static struct resource bfin_sir1_resources[] = {
 348         {
 349                 .start = 0xFFC02000,
 350                 .end = 0xFFC020FF,
 351                 .flags = IORESOURCE_MEM,
 352         },
 353         {
 354                 .start = IRQ_UART1_TX,
 355                 .end = IRQ_UART1_TX+1,
 356                 .flags = IORESOURCE_IRQ,
 357         },
 358         {
 359                 .start = CH_UART1_TX,
 360                 .end = CH_UART1_TX+1,
 361                 .flags = IORESOURCE_DMA,
 362         },
 363 };
 364 static struct platform_device bfin_sir1_device = {
 365         .name = "bfin_sir",
 366         .id = 1,
 367         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 368         .resource = bfin_sir1_resources,
 369 };
 370 #endif
 371 #endif
 372
 373 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 374 static struct resource musb_resources[] = {
 375         [0] = {
 376                 .start  = 0xFFCC1000,
 377                 .end    = 0xFFCC1398,
 378                 .flags  = IORESOURCE_MEM,
 379         },
 380         [1] = { /* general IRQ */
 381                 .start  = IRQ_USB_STAT,
 382                 .end    = IRQ_USB_STAT,
 383                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 384                 .name   = "mc"
 385         },
 386         [2] = { /* DMA IRQ */
 387                 .start  = IRQ_USB_DMA,
 388                 .end    = IRQ_USB_DMA,
 389                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 390                 .name   = "dma"
 391         },
 392 };
 393
 394 static struct musb_hdrc_config musb_config = {
 395         .multipoint     = 1,
 396         .dyn_fifo       = 0,
 397         .dma            = 1,
 398         .num_eps        = 16,
 399         .dma_channels   = 8,
 400         .clkin          = 48,           /* musb CLKIN in MHZ */
 401 };
 402
 403 static struct musb_hdrc_platform_data musb_plat = {
 404 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 405         .mode           = MUSB_OTG,
 406 #elif defined(CONFIG_USB_MUSB_HDRC)
 407         .mode           = MUSB_HOST,
 408 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 409         .mode           = MUSB_PERIPHERAL,
 410 #endif
 411         .config         = &musb_config,
 412 };
 413
 414 static u64 musb_dmamask = ~(u32)0;
 415
 416 static struct platform_device musb_device = {
 417         .name           = "musb-blackfin",
 418         .id             = 0,
 419         .dev = {
 420                 .dma_mask               = &musb_dmamask,
 421                 .coherent_dma_mask      = 0xffffffff,
 422                 .platform_data          = &musb_plat,
 423         },
 424         .num_resources  = ARRAY_SIZE(musb_resources),
 425         .resource       = musb_resources,
 426 };
 427 #endif
 428
 429 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 430 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 431 static struct resource bfin_sport0_uart_resources[] = {
 432         {
 433                 .start = SPORT0_TCR1,
 434                 .end = SPORT0_MRCS3+4,
 435                 .flags = IORESOURCE_MEM,
 436         },
 437         {
 438                 .start = IRQ_SPORT0_RX,
 439                 .end = IRQ_SPORT0_RX+1,
 440                 .flags = IORESOURCE_IRQ,
 441         },
 442         {
 443                 .start = IRQ_SPORT0_ERROR,
 444                 .end = IRQ_SPORT0_ERROR,
 445                 .flags = IORESOURCE_IRQ,
 446         },
 447 };
 448
 449 static unsigned short bfin_sport0_peripherals[] = {
 450         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 451         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 452 };
 453
 454 static struct platform_device bfin_sport0_uart_device = {
 455         .name = "bfin-sport-uart",
 456         .id = 0,
 457         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 458         .resource = bfin_sport0_uart_resources,
 459         .dev = {
 460                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 461         },
 462 };
 463 #endif
 464 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 465 static struct resource bfin_sport1_uart_resources[] = {
 466         {
 467                 .start = SPORT1_TCR1,
 468                 .end = SPORT1_MRCS3+4,
 469                 .flags = IORESOURCE_MEM,
 470         },
 471         {
 472                 .start = IRQ_SPORT1_RX,
 473                 .end = IRQ_SPORT1_RX+1,
 474                 .flags = IORESOURCE_IRQ,
 475         },
 476         {
 477                 .start = IRQ_SPORT1_ERROR,
 478                 .end = IRQ_SPORT1_ERROR,
 479                 .flags = IORESOURCE_IRQ,
 480         },
 481 };
 482
 483 static unsigned short bfin_sport1_peripherals[] = {
 484         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 485         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 486 };
 487
 488 static struct platform_device bfin_sport1_uart_device = {
 489         .name = "bfin-sport-uart",
 490         .id = 1,
 491         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 492         .resource = bfin_sport1_uart_resources,
 493         .dev = {
 494                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 495         },
 496 };
 497 #endif
 498 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 499 static struct resource bfin_sport2_uart_resources[] = {
 500         {
 501                 .start = SPORT2_TCR1,
 502                 .end = SPORT2_MRCS3+4,
 503                 .flags = IORESOURCE_MEM,
 504         },
 505         {
 506                 .start = IRQ_SPORT2_RX,
 507                 .end = IRQ_SPORT2_RX+1,
 508                 .flags = IORESOURCE_IRQ,
 509         },
 510         {
 511                 .start = IRQ_SPORT2_ERROR,
 512                 .end = IRQ_SPORT2_ERROR,
 513                 .flags = IORESOURCE_IRQ,
 514         },
 515 };
 516
 517 static unsigned short bfin_sport2_peripherals[] = {
 518         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 519         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 520 };
 521
 522 static struct platform_device bfin_sport2_uart_device = {
 523         .name = "bfin-sport-uart",
 524         .id = 2,
 525         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 526         .resource = bfin_sport2_uart_resources,
 527         .dev = {
 528                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 529         },
 530 };
 531 #endif
 532 #endif
 533
 534 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 535
 536 static unsigned short bfin_can0_peripherals[] = {
 537         P_CAN0_RX, P_CAN0_TX, 0
 538 };
 539
 540 static struct resource bfin_can0_resources[] = {
 541         {
 542                 .start = 0xFFC00A00,
 543                 .end = 0xFFC00FFF,
 544                 .flags = IORESOURCE_MEM,
 545         },
 546         {
 547                 .start = IRQ_CAN0_RX,
 548                 .end = IRQ_CAN0_RX,
 549                 .flags = IORESOURCE_IRQ,
 550         },
 551         {
 552                 .start = IRQ_CAN0_TX,
 553                 .end = IRQ_CAN0_TX,
 554                 .flags = IORESOURCE_IRQ,
 555         },
 556         {
 557                 .start = IRQ_CAN0_STAT,
 558                 .end = IRQ_CAN0_STAT,
 559                 .flags = IORESOURCE_IRQ,
 560         },
 561 };
 562
 563 static struct platform_device bfin_can0_device = {
 564         .name = "bfin_can",
 565         .id = 0,
 566         .num_resources = ARRAY_SIZE(bfin_can0_resources),
 567         .resource = bfin_can0_resources,
 568         .dev = {
 569                 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
 570         },
 571 };
 572
 573 #endif
 574
 575 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 576 static struct mtd_partition partition_info[] = {
 577         {
 578                 .name = "bootloader(nand)",
 579                 .offset = 0,
 580                 .size = 0x80000,
 581         }, {
 582                 .name = "linux kernel(nand)",
 583                 .offset = MTDPART_OFS_APPEND,
 584                 .size = 4 * 1024 * 1024,
 585         },
 586         {
 587                 .name = "file system(nand)",
 588                 .offset = MTDPART_OFS_APPEND,
 589                 .size = MTDPART_SIZ_FULL,
 590         },
 591 };
 592
 593 static struct bf5xx_nand_platform bfin_nand_platform = {
 594         .data_width = NFC_NWIDTH_8,
 595         .partitions = partition_info,
 596         .nr_partitions = ARRAY_SIZE(partition_info),
 597         .rd_dly = 3,
 598         .wr_dly = 3,
 599 };
 600
 601 static struct resource bfin_nand_resources[] = {
 602         {
 603                 .start = 0xFFC03B00,
 604                 .end = 0xFFC03B4F,
 605                 .flags = IORESOURCE_MEM,
 606         },
 607         {
 608                 .start = CH_NFC,
 609                 .end = CH_NFC,
 610                 .flags = IORESOURCE_IRQ,
 611         },
 612 };
 613
 614 static struct platform_device bfin_nand_device = {
 615         .name = "bfin-nand",
 616         .id = 0,
 617         .num_resources = ARRAY_SIZE(bfin_nand_resources),
 618         .resource = bfin_nand_resources,
 619         .dev = {
 620                 .platform_data = &bfin_nand_platform,
 621         },
 622 };
 623 #endif
 624
 625 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 626
 627 static struct bfin_sd_host bfin_sdh_data = {
 628         .dma_chan = CH_RSI,
 629         .irq_int0 = IRQ_RSI_INT0,
 630         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 631 };
 632
 633 static struct platform_device bfin_sdh_device = {
 634         .name = "bfin-sdh",
 635         .id = 0,
 636         .dev = {
 637                 .platform_data = &bfin_sdh_data,
 638         },
 639 };
 640 #endif
 641
 642 #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
 643 static struct mtd_partition ezkit_partitions[] = {
 644         {
 645                 .name       = "bootloader(nor)",
 646                 .size       = 0x80000,
 647                 .offset     = 0,
 648         }, {
 649                 .name       = "linux kernel(nor)",
 650                 .size       = 0x400000,
 651                 .offset     = MTDPART_OFS_APPEND,
 652         }, {
 653                 .name       = "file system(nor)",
 654                 .size       = 0x1000000 - 0x80000 - 0x400000,
 655                 .offset     = MTDPART_OFS_APPEND,
 656         },
 657 };
 658
 659 int bf609_nor_flash_init(struct platform_device *dev)
 660 {
 661 #define CONFIG_SMC_GCTL_VAL     0x00000010
 662         const unsigned short pins[] = {
 663                 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
 664                 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
 665                 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
 666         };
 667
 668         peripheral_request_list(pins, "smc0");
 669
 670         bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
 671         bfin_write32(SMC_B0CTL, 0x01002001);
 672         bfin_write32(SMC_B0TIM, 0x08170977);
 673         bfin_write32(SMC_B0ETIM, 0x00092231);
 674         return 0;
 675 }
 676
 677 static struct physmap_flash_data ezkit_flash_data = {
 678         .width      = 2,
 679         .parts      = ezkit_partitions,
 680         .init       = bf609_nor_flash_init,
 681         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 682 };
 683
 684 static struct resource ezkit_flash_resource = {
 685         .start = 0xb0000000,
 686         .end   = 0xb0ffffff,
 687         .flags = IORESOURCE_MEM,
 688 };
 689
 690 static struct platform_device ezkit_flash_device = {
 691         .name          = "bf60x-flash",
 692         .id            = 0,
 693         .dev = {
 694                 .platform_data = &ezkit_flash_data,
 695         },
 696         .num_resources = 1,
 697         .resource      = &ezkit_flash_resource,
 698 };
 699 #endif
 700
 701 #if defined(CONFIG_MTD_M25P80) \
 702         || defined(CONFIG_MTD_M25P80_MODULE)
 703 /* SPI flash chip (w25q32) */
 704 static struct mtd_partition bfin_spi_flash_partitions[] = {
 705         {
 706                 .name = "bootloader(spi)",
 707                 .size = 0x00080000,
 708                 .offset = 0,
 709                 .mask_flags = MTD_CAP_ROM
 710         }, {
 711                 .name = "linux kernel(spi)",
 712                 .size = 0x00180000,
 713                 .offset = MTDPART_OFS_APPEND,
 714         }, {
 715                 .name = "file system(spi)",
 716                 .size = MTDPART_SIZ_FULL,
 717                 .offset = MTDPART_OFS_APPEND,
 718         }
 719 };
 720
 721 static struct flash_platform_data bfin_spi_flash_data = {
 722         .name = "m25p80",
 723         .parts = bfin_spi_flash_partitions,
 724         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 725         .type = "w25q32",
 726 };
 727
 728 static struct bfin6xx_spi_chip spi_flash_chip_info = {
 729         .enable_dma = true,         /* use dma transfer with this chip*/
 730 };
 731 #endif
 732
 733 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 734 static struct bfin6xx_spi_chip spidev_chip_info = {
 735         .enable_dma = true,
 736 };
 737 #endif
 738
 739 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
 740 static struct platform_device bfin_i2s_pcm = {
 741         .name = "bfin-i2s-pcm-audio",
 742         .id = -1,
 743 };
 744 #endif
 745
 746 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
 747         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 748 #include <asm/bfin_sport3.h>
 749 static struct resource bfin_snd_resources[] = {
 750         {
 751                 .start = SPORT0_CTL_A,
 752                 .end = SPORT0_CTL_A,
 753                 .flags = IORESOURCE_MEM,
 754         },
 755         {
 756                 .start = SPORT0_CTL_B,
 757                 .end = SPORT0_CTL_B,
 758                 .flags = IORESOURCE_MEM,
 759         },
 760         {
 761                 .start = CH_SPORT0_TX,
 762                 .end = CH_SPORT0_TX,
 763                 .flags = IORESOURCE_DMA,
 764         },
 765         {
 766                 .start = CH_SPORT0_RX,
 767                 .end = CH_SPORT0_RX,
 768                 .flags = IORESOURCE_DMA,
 769         },
 770         {
 771                 .start = IRQ_SPORT0_TX_STAT,
 772                 .end = IRQ_SPORT0_TX_STAT,
 773                 .flags = IORESOURCE_IRQ,
 774         },
 775         {
 776                 .start = IRQ_SPORT0_RX_STAT,
 777                 .end = IRQ_SPORT0_RX_STAT,
 778                 .flags = IORESOURCE_IRQ,
 779         },
 780 };
 781
 782 static const unsigned short bfin_snd_pin[] = {
 783         P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
 784         P_SPORT0_BFS, P_SPORT0_BD0, 0,
 785 };
 786
 787 static struct bfin_snd_platform_data bfin_snd_data = {
 788         .pin_req = bfin_snd_pin,
 789 };
 790
 791 static struct platform_device bfin_i2s = {
 792         .name = "bfin-i2s",
 793         .num_resources = ARRAY_SIZE(bfin_snd_resources),
 794         .resource = bfin_snd_resources,
 795         .dev = {
 796                 .platform_data = &bfin_snd_data,
 797         },
 798 };
 799 #endif
 800
 801 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 802         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 803 static struct platform_device adau1761_device = {
 804         .name = "bfin-eval-adau1x61",
 805 };
 806 #endif
 807
 808 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
 809 #include <sound/adau17x1.h>
 810 static struct adau1761_platform_data adau1761_info = {
 811         .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
 812         .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
 813 };
 814 #endif
 815
 816 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
 817         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
 818 #include <linux/videodev2.h>
 819 #include <media/blackfin/bfin_capture.h>
 820 #include <media/blackfin/ppi.h>
 821
 822 static const unsigned short ppi_req[] = {
 823         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
 824         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
 825         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
 826         0,
 827 };
 828
 829 static const struct ppi_info ppi_info = {
 830         .type = PPI_TYPE_EPPI3,
 831         .dma_ch = CH_EPPI0_CH0,
 832         .irq_err = IRQ_EPPI0_STAT,
 833         .base = (void __iomem *)EPPI0_STAT,
 834         .pin_req = ppi_req,
 835 };
 836
 837 #if defined(CONFIG_VIDEO_VS6624) \
 838         || defined(CONFIG_VIDEO_VS6624_MODULE)
 839 static struct v4l2_input vs6624_inputs[] = {
 840         {
 841                 .index = 0,
 842                 .name = "Camera",
 843                 .type = V4L2_INPUT_TYPE_CAMERA,
 844                 .std = V4L2_STD_UNKNOWN,
 845         },
 846 };
 847
 848 static struct bcap_route vs6624_routes[] = {
 849         {
 850                 .input = 0,
 851                 .output = 0,
 852         },
 853 };
 854
 855 static const unsigned vs6624_ce_pin = GPIO_PD1;
 856
 857 static struct bfin_capture_config bfin_capture_data = {
 858         .card_name = "BF609",
 859         .inputs = vs6624_inputs,
 860         .num_inputs = ARRAY_SIZE(vs6624_inputs),
 861         .routes = vs6624_routes,
 862         .i2c_adapter_id = 0,
 863         .board_info = {
 864                 .type = "vs6624",
 865                 .addr = 0x10,
 866                 .platform_data = (void *)&vs6624_ce_pin,
 867         },
 868         .ppi_info = &ppi_info,
 869         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
 870                         | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 871         .blank_clocks = 8,
 872 };
 873 #endif
 874
 875 static struct platform_device bfin_capture_device = {
 876         .name = "bfin_capture",
 877         .dev = {
 878                 .platform_data = &bfin_capture_data,
 879         },
 880 };
 881 #endif
 882
 883 #if defined(CONFIG_BFIN_CRC)
 884 #define BFIN_CRC_NAME "bfin-crc"
 885
 886 static struct resource bfin_crc0_resources[] = {
 887         {
 888                 .start = REG_CRC0_CTL,
 889                 .end = REG_CRC0_REVID+4,
 890                 .flags = IORESOURCE_MEM,
 891         },
 892         {
 893                 .start = IRQ_CRC0_DCNTEXP,
 894                 .end = IRQ_CRC0_DCNTEXP,
 895                 .flags = IORESOURCE_IRQ,
 896         },
 897         {
 898                 .start = CH_MEM_STREAM0_SRC_CRC0,
 899                 .end = CH_MEM_STREAM0_SRC_CRC0,
 900                 .flags = IORESOURCE_DMA,
 901         },
 902         {
 903                 .start = CH_MEM_STREAM0_DEST_CRC0,
 904                 .end = CH_MEM_STREAM0_DEST_CRC0,
 905                 .flags = IORESOURCE_DMA,
 906         },
 907 };
 908
 909 static struct platform_device bfin_crc0_device = {
 910         .name = BFIN_CRC_NAME,
 911         .id = 0,
 912         .num_resources = ARRAY_SIZE(bfin_crc0_resources),
 913         .resource = bfin_crc0_resources,
 914 };
 915
 916 static struct resource bfin_crc1_resources[] = {
 917         {
 918                 .start = REG_CRC1_CTL,
 919                 .end = REG_CRC1_REVID+4,
 920                 .flags = IORESOURCE_MEM,
 921         },
 922         {
 923                 .start = IRQ_CRC1_DCNTEXP,
 924                 .end = IRQ_CRC1_DCNTEXP,
 925                 .flags = IORESOURCE_IRQ,
 926         },
 927         {
 928                 .start = CH_MEM_STREAM1_SRC_CRC1,
 929                 .end = CH_MEM_STREAM1_SRC_CRC1,
 930                 .flags = IORESOURCE_DMA,
 931         },
 932         {
 933                 .start = CH_MEM_STREAM1_DEST_CRC1,
 934                 .end = CH_MEM_STREAM1_DEST_CRC1,
 935                 .flags = IORESOURCE_DMA,
 936         },
 937 };
 938
 939 static struct platform_device bfin_crc1_device = {
 940         .name = BFIN_CRC_NAME,
 941         .id = 1,
 942         .num_resources = ARRAY_SIZE(bfin_crc1_resources),
 943         .resource = bfin_crc1_resources,
 944 };
 945 #endif
 946
 947 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 948 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 949         .model                  = 7877,
 950         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 951         .x_plate_ohms           = 419,
 952         .y_plate_ohms           = 486,
 953         .pressure_max           = 1000,
 954         .pressure_min           = 0,
 955         .stopacq_polarity       = 1,
 956         .first_conversion_delay = 3,
 957         .acquisition_time       = 1,
 958         .averaging              = 1,
 959         .pen_down_acc_interval  = 1,
 960 };
 961 #endif
 962
 963 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 964 #if defined(CONFIG_MTD_M25P80) \
 965         || defined(CONFIG_MTD_M25P80_MODULE)
 966         {
 967                 /* the modalias must be the same as spi device driver name */
 968                 .modalias = "m25p80", /* Name of spi_driver for this device */
 969                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 970                 .bus_num = 0, /* Framework bus number */
 971                 .chip_select = 1, /* SPI_SSEL1*/
 972                 .platform_data = &bfin_spi_flash_data,
 973                 .controller_data = &spi_flash_chip_info,
 974                 .mode = SPI_MODE_3,
 975         },
 976 #endif
 977 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 978         {
 979                 .modalias               = "ad7877",
 980                 .platform_data          = &bfin_ad7877_ts_info,
 981                 .irq                    = IRQ_PB4,      /* old boards (<=Rev 1.3) use IRQ_PJ11 */
 982                 .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 983                 .bus_num                = 0,
 984                 .chip_select            = 2,
 985         },
 986 #endif
 987 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 988         {
 989                 .modalias = "spidev",
 990                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 991                 .bus_num = 0,
 992                 .chip_select = 1,
 993                 .controller_data = &spidev_chip_info,
 994         },
 995 #endif
 996 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
 997         {
 998                 .modalias               = "adxl34x",
 999                 .platform_data          = &adxl34x_info,
1000                 .irq                    = IRQ_PC5,
1001                 .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
1002                 .bus_num                = 1,
1003                 .chip_select            = 2,
1004                 .mode = SPI_MODE_3,
1005         },
1006 #endif
1007 };
1008 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1009 /* SPI (0) */
1010 static struct resource bfin_spi0_resource[] = {
1011         {
1012                 .start = SPI0_REGBASE,
1013                 .end   = SPI0_REGBASE + 0xFF,
1014                 .flags = IORESOURCE_MEM,
1015         },
1016         {
1017                 .start = CH_SPI0_TX,
1018                 .end   = CH_SPI0_TX,
1019                 .flags = IORESOURCE_DMA,
1020         },
1021         {
1022                 .start = CH_SPI0_RX,
1023                 .end   = CH_SPI0_RX,
1024                 .flags = IORESOURCE_DMA,
1025         },
1026 };
1027
1028 /* SPI (1) */
1029 static struct resource bfin_spi1_resource[] = {
1030         {
1031                 .start = SPI1_REGBASE,
1032                 .end   = SPI1_REGBASE + 0xFF,
1033                 .flags = IORESOURCE_MEM,
1034         },
1035         {
1036                 .start = CH_SPI1_TX,
1037                 .end   = CH_SPI1_TX,
1038                 .flags = IORESOURCE_DMA,
1039         },
1040         {
1041                 .start = CH_SPI1_RX,
1042                 .end   = CH_SPI1_RX,
1043                 .flags = IORESOURCE_DMA,
1044         },
1045
1046 };
1047
1048 /* SPI controller data */
1049 static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1050         .num_chipselect = 4,
1051         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1052 };
1053
1054 static struct platform_device bf60x_spi_master0 = {
1055         .name = "bfin-spi",
1056         .id = 0, /* Bus number */
1057         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1058         .resource = bfin_spi0_resource,
1059         .dev = {
1060                 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1061         },
1062 };
1063
1064 static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1065         .num_chipselect = 4,
1066         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1067 };
1068
1069 static struct platform_device bf60x_spi_master1 = {
1070         .name = "bfin-spi",
1071         .id = 1, /* Bus number */
1072         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1073         .resource = bfin_spi1_resource,
1074         .dev = {
1075                 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1076         },
1077 };
1078 #endif  /* spi master and devices */
1079
1080 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1081 static struct resource bfin_twi0_resource[] = {
1082         [0] = {
1083                 .start = TWI0_CLKDIV,
1084                 .end   = TWI0_CLKDIV + 0xFF,
1085                 .flags = IORESOURCE_MEM,
1086         },
1087         [1] = {
1088                 .start = IRQ_TWI0,
1089                 .end   = IRQ_TWI0,
1090                 .flags = IORESOURCE_IRQ,
1091         },
1092 };
1093
1094 static struct platform_device i2c_bfin_twi0_device = {
1095         .name = "i2c-bfin-twi",
1096         .id = 0,
1097         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1098         .resource = bfin_twi0_resource,
1099 };
1100
1101 static struct resource bfin_twi1_resource[] = {
1102         [0] = {
1103                 .start = TWI1_CLKDIV,
1104                 .end   = TWI1_CLKDIV + 0xFF,
1105                 .flags = IORESOURCE_MEM,
1106         },
1107         [1] = {
1108                 .start = IRQ_TWI1,
1109                 .end   = IRQ_TWI1,
1110                 .flags = IORESOURCE_IRQ,
1111         },
1112 };
1113
1114 static struct platform_device i2c_bfin_twi1_device = {
1115         .name = "i2c-bfin-twi",
1116         .id = 1,
1117         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1118         .resource = bfin_twi1_resource,
1119 };
1120 #endif
1121
1122 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1123 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1124         {
1125                 I2C_BOARD_INFO("adxl34x", 0x53),
1126                 .irq = IRQ_PC5,
1127                 .platform_data = (void *)&adxl34x_info,
1128         },
1129 #endif
1130 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1131         {
1132                 I2C_BOARD_INFO("adau1761", 0x38),
1133                 .platform_data = (void *)&adau1761_info
1134         },
1135 #endif
1136 };
1137
1138 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1139 };
1140
1141 static const unsigned int cclk_vlev_datasheet[] =
1142 {
1143 /*
1144  * Internal VLEV BF54XSBBC1533
1145  ****temporarily using these values until data sheet is updated
1146  */
1147         VRPAIR(VLEV_085, 150000000),
1148         VRPAIR(VLEV_090, 250000000),
1149         VRPAIR(VLEV_110, 276000000),
1150         VRPAIR(VLEV_115, 301000000),
1151         VRPAIR(VLEV_120, 525000000),
1152         VRPAIR(VLEV_125, 550000000),
1153         VRPAIR(VLEV_130, 600000000),
1154 };
1155
1156 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1157         .tuple_tab = cclk_vlev_datasheet,
1158         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1159         .vr_settling_time = 25 /* us */,
1160 };
1161
1162 static struct platform_device bfin_dpmc = {
1163         .name = "bfin dpmc",
1164         .dev = {
1165                 .platform_data = &bfin_dmpc_vreg_data,
1166         },
1167 };
1168
1169 static struct platform_device *ezkit_devices[] __initdata = {
1170
1171         &bfin_dpmc,
1172
1173 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1174         &rtc_device,
1175 #endif
1176
1177 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1178 #ifdef CONFIG_SERIAL_BFIN_UART0
1179         &bfin_uart0_device,
1180 #endif
1181 #ifdef CONFIG_SERIAL_BFIN_UART1
1182         &bfin_uart1_device,
1183 #endif
1184 #endif
1185
1186 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1187 #ifdef CONFIG_BFIN_SIR0
1188         &bfin_sir0_device,
1189 #endif
1190 #ifdef CONFIG_BFIN_SIR1
1191         &bfin_sir1_device,
1192 #endif
1193 #endif
1194
1195 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1196         &bfin_eth_device,
1197 #endif
1198
1199 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1200         &musb_device,
1201 #endif
1202
1203 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1204         &bfin_isp1760_device,
1205 #endif
1206
1207 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1208 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1209         &bfin_sport0_uart_device,
1210 #endif
1211 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1212         &bfin_sport1_uart_device,
1213 #endif
1214 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1215         &bfin_sport2_uart_device,
1216 #endif
1217 #endif
1218
1219 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1220         &bfin_can0_device,
1221 #endif
1222
1223 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1224         &bfin_nand_device,
1225 #endif
1226
1227 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1228         &bfin_sdh_device,
1229 #endif
1230
1231 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1232         &bf60x_spi_master0,
1233         &bf60x_spi_master1,
1234 #endif
1235
1236 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1237         &bfin_rotary_device,
1238 #endif
1239
1240 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1241         &i2c_bfin_twi0_device,
1242 #if !defined(CONFIG_BF542)
1243         &i2c_bfin_twi1_device,
1244 #endif
1245 #endif
1246
1247 #if defined(CONFIG_BFIN_CRC)
1248         &bfin_crc0_device,
1249         &bfin_crc1_device,
1250 #endif
1251
1252 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1253         &bfin_device_gpiokeys,
1254 #endif
1255
1256 #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
1257         &ezkit_flash_device,
1258 #endif
1259 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
1260         &bfin_i2s_pcm,
1261 #endif
1262 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1263         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1264         &bfin_i2s,
1265 #endif
1266 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1267         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1268         &adau1761_device,
1269 #endif
1270 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1271         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1272         &bfin_capture_device,
1273 #endif
1274 };
1275
1276 static int __init ezkit_init(void)
1277 {
1278         printk(KERN_INFO "%s(): registering device resources\n", __func__);
1279
1280         i2c_register_board_info(0, bfin_i2c_board_info0,
1281                                 ARRAY_SIZE(bfin_i2c_board_info0));
1282         i2c_register_board_info(1, bfin_i2c_board_info1,
1283                                 ARRAY_SIZE(bfin_i2c_board_info1));
1284
1285 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1286         unsigned short pins[] = P_RMII0;
1287         if (!peripheral_request_list(pins, "emac0"))
1288                 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1289 #endif
1290
1291         platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1292
1293         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1294
1295         return 0;
1296 }
1297
1298 arch_initcall(ezkit_init);
1299
1300 static struct platform_device *ezkit_early_devices[] __initdata = {
1301 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1302 #ifdef CONFIG_SERIAL_BFIN_UART0
1303         &bfin_uart0_device,
1304 #endif
1305 #ifdef CONFIG_SERIAL_BFIN_UART1
1306         &bfin_uart1_device,
1307 #endif
1308 #endif
1309
1310 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1311 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1312         &bfin_sport0_uart_device,
1313 #endif
1314 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1315         &bfin_sport1_uart_device,
1316 #endif
1317 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1318         &bfin_sport2_uart_device,
1319 #endif
1320 #endif
1321 };
1322
1323 void __init native_machine_early_platform_add_devices(void)
1324 {
1325         printk(KERN_INFO "register early platform devices\n");
1326         early_platform_add_devices(ezkit_early_devices,
1327                 ARRAY_SIZE(ezkit_early_devices));
1328 }