arch/blackfin/mach-bf609/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <asm/bfin6xx_spi.h>
  21 #include <asm/dma.h>
  22 #include <asm/gpio.h>
  23 #include <asm/nand.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/portmux.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/input.h>
  28 #include <linux/spi/ad7877.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF609-EZKIT";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40 #include <linux/usb/isp1760.h>
  41 static struct resource bfin_isp1760_resources[] = {
  42         [0] = {
  43                 .start  = 0x2C0C0000,
  44                 .end    = 0x2C0C0000 + 0xfffff,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = IRQ_PG7,
  49                 .end    = IRQ_PG7,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct isp1760_platform_data isp1760_priv = {
  55         .is_isp1761 = 0,
  56         .bus_width_16 = 1,
  57         .port1_otg = 0,
  58         .analog_oc = 0,
  59         .dack_polarity_high = 0,
  60         .dreq_polarity_high = 0,
  61 };
  62
  63 static struct platform_device bfin_isp1760_device = {
  64         .name           = "isp1760",
  65         .id             = 0,
  66         .dev = {
  67                 .platform_data = &isp1760_priv,
  68         },
  69         .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  70         .resource       = bfin_isp1760_resources,
  71 };
  72 #endif
  73
  74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  75 #include <asm/bfin_rotary.h>
  76
  77 static struct bfin_rotary_platform_data bfin_rotary_data = {
  78         /*.rotary_up_key     = KEY_UP,*/
  79         /*.rotary_down_key   = KEY_DOWN,*/
  80         .rotary_rel_code   = REL_WHEEL,
  81         .rotary_button_key = KEY_ENTER,
  82         .debounce          = 10,        /* 0..17 */
  83         .mode              = ROT_QUAD_ENC | ROT_DEBE,
  84 };
  85
  86 static struct resource bfin_rotary_resources[] = {
  87         {
  88                 .start = IRQ_CNT,
  89                 .end = IRQ_CNT,
  90                 .flags = IORESOURCE_IRQ,
  91         },
  92 };
  93
  94 static struct platform_device bfin_rotary_device = {
  95         .name           = "bfin-rotary",
  96         .id             = -1,
  97         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
  98         .resource       = bfin_rotary_resources,
  99         .dev            = {
 100                 .platform_data = &bfin_rotary_data,
 101         },
 102 };
 103 #endif
 104
 105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
 106 #include <linux/stmmac.h>
 107
 108 static unsigned short pins[] = P_RMII0;
 109
 110 static struct stmmac_mdio_bus_data phy_private_data = {
 111         .bus_id = 0,
 112         .phy_mask = 1,
 113 };
 114
 115 static struct plat_stmmacenet_data eth_private_data = {
 116         .bus_id   = 0,
 117         .enh_desc = 1,
 118         .phy_addr = 1,
 119         .mdio_bus_data = &phy_private_data,
 120 };
 121
 122 static struct platform_device bfin_eth_device = {
 123         .name           = "stmmaceth",
 124         .id             = 0,
 125         .num_resources  = 2,
 126         .resource       = (struct resource[]) {
 127                 {
 128                         .start  = EMAC0_MACCFG,
 129                         .end    = EMAC0_MACCFG + 0x1274,
 130                         .flags  = IORESOURCE_MEM,
 131                 },
 132                 {
 133                         .name   = "macirq",
 134                         .start  = IRQ_EMAC0_STAT,
 135                         .end    = IRQ_EMAC0_STAT,
 136                         .flags  = IORESOURCE_IRQ,
 137                 },
 138         },
 139         .dev = {
 140                 .platform_data = &eth_private_data,
 141         }
 142 };
 143 #endif
 144
 145 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 146 #include <linux/input/adxl34x.h>
 147 static const struct adxl34x_platform_data adxl34x_info = {
 148         .x_axis_offset = 0,
 149         .y_axis_offset = 0,
 150         .z_axis_offset = 0,
 151         .tap_threshold = 0x31,
 152         .tap_duration = 0x10,
 153         .tap_latency = 0x60,
 154         .tap_window = 0xF0,
 155         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 156         .act_axis_control = 0xFF,
 157         .activity_threshold = 5,
 158         .inactivity_threshold = 3,
 159         .inactivity_time = 4,
 160         .free_fall_threshold = 0x7,
 161         .free_fall_time = 0x20,
 162         .data_rate = 0x8,
 163         .data_range = ADXL_FULL_RES,
 164
 165         .ev_type = EV_ABS,
 166         .ev_code_x = ABS_X,             /* EV_REL */
 167         .ev_code_y = ABS_Y,             /* EV_REL */
 168         .ev_code_z = ABS_Z,             /* EV_REL */
 169
 170         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 171
 172 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 173 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
 174         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 175         .fifo_mode = ADXL_FIFO_STREAM,
 176         .orientation_enable = ADXL_EN_ORIENTATION_3D,
 177         .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
 178         .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
 179         /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
 180         .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 181 };
 182 #endif
 183
 184 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 185 static struct platform_device rtc_device = {
 186         .name = "rtc-bfin",
 187         .id   = -1,
 188 };
 189 #endif
 190
 191 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 192 #ifdef CONFIG_SERIAL_BFIN_UART0
 193 static struct resource bfin_uart0_resources[] = {
 194         {
 195                 .start = UART0_REVID,
 196                 .end = UART0_RXDIV+4,
 197                 .flags = IORESOURCE_MEM,
 198         },
 199         {
 200                 .start = IRQ_UART0_TX,
 201                 .end = IRQ_UART0_TX,
 202                 .flags = IORESOURCE_IRQ,
 203         },
 204         {
 205                 .start = IRQ_UART0_RX,
 206                 .end = IRQ_UART0_RX,
 207                 .flags = IORESOURCE_IRQ,
 208         },
 209         {
 210                 .start = IRQ_UART0_STAT,
 211                 .end = IRQ_UART0_STAT,
 212                 .flags = IORESOURCE_IRQ,
 213         },
 214         {
 215                 .start = CH_UART0_TX,
 216                 .end = CH_UART0_TX,
 217                 .flags = IORESOURCE_DMA,
 218         },
 219         {
 220                 .start = CH_UART0_RX,
 221                 .end = CH_UART0_RX,
 222                 .flags = IORESOURCE_DMA,
 223         },
 224 #ifdef CONFIG_BFIN_UART0_CTSRTS
 225         {       /* CTS pin -- 0 means not supported */
 226                 .start = GPIO_PD10,
 227                 .end = GPIO_PD10,
 228                 .flags = IORESOURCE_IO,
 229         },
 230         {       /* RTS pin -- 0 means not supported */
 231                 .start = GPIO_PD9,
 232                 .end = GPIO_PD9,
 233                 .flags = IORESOURCE_IO,
 234         },
 235 #endif
 236 };
 237
 238 static unsigned short bfin_uart0_peripherals[] = {
 239         P_UART0_TX, P_UART0_RX,
 240 #ifdef CONFIG_BFIN_UART0_CTSRTS
 241         P_UART0_RTS, P_UART0_CTS,
 242 #endif
 243         0
 244 };
 245
 246 static struct platform_device bfin_uart0_device = {
 247         .name = "bfin-uart",
 248         .id = 0,
 249         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 250         .resource = bfin_uart0_resources,
 251         .dev = {
 252                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 253         },
 254 };
 255 #endif
 256 #ifdef CONFIG_SERIAL_BFIN_UART1
 257 static struct resource bfin_uart1_resources[] = {
 258         {
 259                 .start = UART1_REVID,
 260                 .end = UART1_RXDIV+4,
 261                 .flags = IORESOURCE_MEM,
 262         },
 263         {
 264                 .start = IRQ_UART1_TX,
 265                 .end = IRQ_UART1_TX,
 266                 .flags = IORESOURCE_IRQ,
 267         },
 268         {
 269                 .start = IRQ_UART1_RX,
 270                 .end = IRQ_UART1_RX,
 271                 .flags = IORESOURCE_IRQ,
 272         },
 273         {
 274                 .start = IRQ_UART1_STAT,
 275                 .end = IRQ_UART1_STAT,
 276                 .flags = IORESOURCE_IRQ,
 277         },
 278         {
 279                 .start = CH_UART1_TX,
 280                 .end = CH_UART1_TX,
 281                 .flags = IORESOURCE_DMA,
 282         },
 283         {
 284                 .start = CH_UART1_RX,
 285                 .end = CH_UART1_RX,
 286                 .flags = IORESOURCE_DMA,
 287         },
 288 #ifdef CONFIG_BFIN_UART1_CTSRTS
 289         {       /* CTS pin -- 0 means not supported */
 290                 .start = GPIO_PG13,
 291                 .end = GPIO_PG13,
 292                 .flags = IORESOURCE_IO,
 293         },
 294         {       /* RTS pin -- 0 means not supported */
 295                 .start = GPIO_PG10,
 296                 .end = GPIO_PG10,
 297                 .flags = IORESOURCE_IO,
 298         },
 299 #endif
 300 };
 301
 302 static unsigned short bfin_uart1_peripherals[] = {
 303         P_UART1_TX, P_UART1_RX,
 304 #ifdef CONFIG_BFIN_UART1_CTSRTS
 305         P_UART1_RTS, P_UART1_CTS,
 306 #endif
 307         0
 308 };
 309
 310 static struct platform_device bfin_uart1_device = {
 311         .name = "bfin-uart",
 312         .id = 1,
 313         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 314         .resource = bfin_uart1_resources,
 315         .dev = {
 316                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 317         },
 318 };
 319 #endif
 320 #endif
 321
 322 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 323 #ifdef CONFIG_BFIN_SIR0
 324 static struct resource bfin_sir0_resources[] = {
 325         {
 326                 .start = 0xFFC00400,
 327                 .end = 0xFFC004FF,
 328                 .flags = IORESOURCE_MEM,
 329         },
 330         {
 331                 .start = IRQ_UART0_TX,
 332                 .end = IRQ_UART0_TX+1,
 333                 .flags = IORESOURCE_IRQ,
 334         },
 335         {
 336                 .start = CH_UART0_TX,
 337                 .end = CH_UART0_TX+1,
 338                 .flags = IORESOURCE_DMA,
 339         },
 340 };
 341 static struct platform_device bfin_sir0_device = {
 342         .name = "bfin_sir",
 343         .id = 0,
 344         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 345         .resource = bfin_sir0_resources,
 346 };
 347 #endif
 348 #ifdef CONFIG_BFIN_SIR1
 349 static struct resource bfin_sir1_resources[] = {
 350         {
 351                 .start = 0xFFC02000,
 352                 .end = 0xFFC020FF,
 353                 .flags = IORESOURCE_MEM,
 354         },
 355         {
 356                 .start = IRQ_UART1_TX,
 357                 .end = IRQ_UART1_TX+1,
 358                 .flags = IORESOURCE_IRQ,
 359         },
 360         {
 361                 .start = CH_UART1_TX,
 362                 .end = CH_UART1_TX+1,
 363                 .flags = IORESOURCE_DMA,
 364         },
 365 };
 366 static struct platform_device bfin_sir1_device = {
 367         .name = "bfin_sir",
 368         .id = 1,
 369         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 370         .resource = bfin_sir1_resources,
 371 };
 372 #endif
 373 #endif
 374
 375 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 376 static struct resource musb_resources[] = {
 377         [0] = {
 378                 .start  = 0xFFCC1000,
 379                 .end    = 0xFFCC1398,
 380                 .flags  = IORESOURCE_MEM,
 381         },
 382         [1] = { /* general IRQ */
 383                 .start  = IRQ_USB_STAT,
 384                 .end    = IRQ_USB_STAT,
 385                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 386                 .name   = "mc"
 387         },
 388         [2] = { /* DMA IRQ */
 389                 .start  = IRQ_USB_DMA,
 390                 .end    = IRQ_USB_DMA,
 391                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 392                 .name   = "dma"
 393         },
 394 };
 395
 396 static struct musb_hdrc_config musb_config = {
 397         .multipoint     = 1,
 398         .dyn_fifo       = 0,
 399         .dma            = 1,
 400         .num_eps        = 16,
 401         .dma_channels   = 8,
 402         .clkin          = 48,           /* musb CLKIN in MHZ */
 403 };
 404
 405 static struct musb_hdrc_platform_data musb_plat = {
 406 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 407         .mode           = MUSB_OTG,
 408 #elif defined(CONFIG_USB_MUSB_HDRC)
 409         .mode           = MUSB_HOST,
 410 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 411         .mode           = MUSB_PERIPHERAL,
 412 #endif
 413         .config         = &musb_config,
 414 };
 415
 416 static u64 musb_dmamask = ~(u32)0;
 417
 418 static struct platform_device musb_device = {
 419         .name           = "musb-blackfin",
 420         .id             = 0,
 421         .dev = {
 422                 .dma_mask               = &musb_dmamask,
 423                 .coherent_dma_mask      = 0xffffffff,
 424                 .platform_data          = &musb_plat,
 425         },
 426         .num_resources  = ARRAY_SIZE(musb_resources),
 427         .resource       = musb_resources,
 428 };
 429 #endif
 430
 431 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 432 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 433 static struct resource bfin_sport0_uart_resources[] = {
 434         {
 435                 .start = SPORT0_TCR1,
 436                 .end = SPORT0_MRCS3+4,
 437                 .flags = IORESOURCE_MEM,
 438         },
 439         {
 440                 .start = IRQ_SPORT0_RX,
 441                 .end = IRQ_SPORT0_RX+1,
 442                 .flags = IORESOURCE_IRQ,
 443         },
 444         {
 445                 .start = IRQ_SPORT0_ERROR,
 446                 .end = IRQ_SPORT0_ERROR,
 447                 .flags = IORESOURCE_IRQ,
 448         },
 449 };
 450
 451 static unsigned short bfin_sport0_peripherals[] = {
 452         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 453         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 454 };
 455
 456 static struct platform_device bfin_sport0_uart_device = {
 457         .name = "bfin-sport-uart",
 458         .id = 0,
 459         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 460         .resource = bfin_sport0_uart_resources,
 461         .dev = {
 462                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 463         },
 464 };
 465 #endif
 466 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 467 static struct resource bfin_sport1_uart_resources[] = {
 468         {
 469                 .start = SPORT1_TCR1,
 470                 .end = SPORT1_MRCS3+4,
 471                 .flags = IORESOURCE_MEM,
 472         },
 473         {
 474                 .start = IRQ_SPORT1_RX,
 475                 .end = IRQ_SPORT1_RX+1,
 476                 .flags = IORESOURCE_IRQ,
 477         },
 478         {
 479                 .start = IRQ_SPORT1_ERROR,
 480                 .end = IRQ_SPORT1_ERROR,
 481                 .flags = IORESOURCE_IRQ,
 482         },
 483 };
 484
 485 static unsigned short bfin_sport1_peripherals[] = {
 486         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 487         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 488 };
 489
 490 static struct platform_device bfin_sport1_uart_device = {
 491         .name = "bfin-sport-uart",
 492         .id = 1,
 493         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 494         .resource = bfin_sport1_uart_resources,
 495         .dev = {
 496                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 497         },
 498 };
 499 #endif
 500 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 501 static struct resource bfin_sport2_uart_resources[] = {
 502         {
 503                 .start = SPORT2_TCR1,
 504                 .end = SPORT2_MRCS3+4,
 505                 .flags = IORESOURCE_MEM,
 506         },
 507         {
 508                 .start = IRQ_SPORT2_RX,
 509                 .end = IRQ_SPORT2_RX+1,
 510                 .flags = IORESOURCE_IRQ,
 511         },
 512         {
 513                 .start = IRQ_SPORT2_ERROR,
 514                 .end = IRQ_SPORT2_ERROR,
 515                 .flags = IORESOURCE_IRQ,
 516         },
 517 };
 518
 519 static unsigned short bfin_sport2_peripherals[] = {
 520         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 521         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 522 };
 523
 524 static struct platform_device bfin_sport2_uart_device = {
 525         .name = "bfin-sport-uart",
 526         .id = 2,
 527         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 528         .resource = bfin_sport2_uart_resources,
 529         .dev = {
 530                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 531         },
 532 };
 533 #endif
 534 #endif
 535
 536 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 537
 538 static unsigned short bfin_can0_peripherals[] = {
 539         P_CAN0_RX, P_CAN0_TX, 0
 540 };
 541
 542 static struct resource bfin_can0_resources[] = {
 543         {
 544                 .start = 0xFFC00A00,
 545                 .end = 0xFFC00FFF,
 546                 .flags = IORESOURCE_MEM,
 547         },
 548         {
 549                 .start = IRQ_CAN0_RX,
 550                 .end = IRQ_CAN0_RX,
 551                 .flags = IORESOURCE_IRQ,
 552         },
 553         {
 554                 .start = IRQ_CAN0_TX,
 555                 .end = IRQ_CAN0_TX,
 556                 .flags = IORESOURCE_IRQ,
 557         },
 558         {
 559                 .start = IRQ_CAN0_STAT,
 560                 .end = IRQ_CAN0_STAT,
 561                 .flags = IORESOURCE_IRQ,
 562         },
 563 };
 564
 565 static struct platform_device bfin_can0_device = {
 566         .name = "bfin_can",
 567         .id = 0,
 568         .num_resources = ARRAY_SIZE(bfin_can0_resources),
 569         .resource = bfin_can0_resources,
 570         .dev = {
 571                 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
 572         },
 573 };
 574
 575 #endif
 576
 577 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 578 static struct mtd_partition partition_info[] = {
 579         {
 580                 .name = "bootloader(nand)",
 581                 .offset = 0,
 582                 .size = 0x80000,
 583         }, {
 584                 .name = "linux kernel(nand)",
 585                 .offset = MTDPART_OFS_APPEND,
 586                 .size = 4 * 1024 * 1024,
 587         },
 588         {
 589                 .name = "file system(nand)",
 590                 .offset = MTDPART_OFS_APPEND,
 591                 .size = MTDPART_SIZ_FULL,
 592         },
 593 };
 594
 595 static struct bf5xx_nand_platform bfin_nand_platform = {
 596         .data_width = NFC_NWIDTH_8,
 597         .partitions = partition_info,
 598         .nr_partitions = ARRAY_SIZE(partition_info),
 599         .rd_dly = 3,
 600         .wr_dly = 3,
 601 };
 602
 603 static struct resource bfin_nand_resources[] = {
 604         {
 605                 .start = 0xFFC03B00,
 606                 .end = 0xFFC03B4F,
 607                 .flags = IORESOURCE_MEM,
 608         },
 609         {
 610                 .start = CH_NFC,
 611                 .end = CH_NFC,
 612                 .flags = IORESOURCE_IRQ,
 613         },
 614 };
 615
 616 static struct platform_device bfin_nand_device = {
 617         .name = "bfin-nand",
 618         .id = 0,
 619         .num_resources = ARRAY_SIZE(bfin_nand_resources),
 620         .resource = bfin_nand_resources,
 621         .dev = {
 622                 .platform_data = &bfin_nand_platform,
 623         },
 624 };
 625 #endif
 626
 627 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 628
 629 static struct bfin_sd_host bfin_sdh_data = {
 630         .dma_chan = CH_RSI,
 631         .irq_int0 = IRQ_RSI_INT0,
 632         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 633 };
 634
 635 static struct platform_device bfin_sdh_device = {
 636         .name = "bfin-sdh",
 637         .id = 0,
 638         .dev = {
 639                 .platform_data = &bfin_sdh_data,
 640         },
 641 };
 642 #endif
 643
 644 #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
 645 static struct mtd_partition ezkit_partitions[] = {
 646         {
 647                 .name       = "bootloader(nor)",
 648                 .size       = 0x80000,
 649                 .offset     = 0,
 650         }, {
 651                 .name       = "linux kernel(nor)",
 652                 .size       = 0x400000,
 653                 .offset     = MTDPART_OFS_APPEND,
 654         }, {
 655                 .name       = "file system(nor)",
 656                 .size       = 0x1000000 - 0x80000 - 0x400000,
 657                 .offset     = MTDPART_OFS_APPEND,
 658         },
 659 };
 660
 661 int bf609_nor_flash_init(struct platform_device *dev)
 662 {
 663 #define CONFIG_SMC_GCTL_VAL     0x00000010
 664         const unsigned short pins[] = {
 665                 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
 666                 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
 667                 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
 668         };
 669
 670         peripheral_request_list(pins, "smc0");
 671
 672         bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
 673         bfin_write32(SMC_B0CTL, 0x01002001);
 674         bfin_write32(SMC_B0TIM, 0x08170977);
 675         bfin_write32(SMC_B0ETIM, 0x00092231);
 676         return 0;
 677 }
 678
 679 static struct physmap_flash_data ezkit_flash_data = {
 680         .width      = 2,
 681         .parts      = ezkit_partitions,
 682         .init       = bf609_nor_flash_init,
 683         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 684 };
 685
 686 static struct resource ezkit_flash_resource = {
 687         .start = 0xb0000000,
 688         .end   = 0xb0ffffff,
 689         .flags = IORESOURCE_MEM,
 690 };
 691
 692 static struct platform_device ezkit_flash_device = {
 693         .name          = "bf60x-flash",
 694         .id            = 0,
 695         .dev = {
 696                 .platform_data = &ezkit_flash_data,
 697         },
 698         .num_resources = 1,
 699         .resource      = &ezkit_flash_resource,
 700 };
 701 #endif
 702
 703 #if defined(CONFIG_MTD_M25P80) \
 704         || defined(CONFIG_MTD_M25P80_MODULE)
 705 /* SPI flash chip (w25q32) */
 706 static struct mtd_partition bfin_spi_flash_partitions[] = {
 707         {
 708                 .name = "bootloader(spi)",
 709                 .size = 0x00080000,
 710                 .offset = 0,
 711                 .mask_flags = MTD_CAP_ROM
 712         }, {
 713                 .name = "linux kernel(spi)",
 714                 .size = 0x00180000,
 715                 .offset = MTDPART_OFS_APPEND,
 716         }, {
 717                 .name = "file system(spi)",
 718                 .size = MTDPART_SIZ_FULL,
 719                 .offset = MTDPART_OFS_APPEND,
 720         }
 721 };
 722
 723 static struct flash_platform_data bfin_spi_flash_data = {
 724         .name = "m25p80",
 725         .parts = bfin_spi_flash_partitions,
 726         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 727         .type = "w25q32",
 728 };
 729
 730 static struct bfin6xx_spi_chip spi_flash_chip_info = {
 731         .enable_dma = true,         /* use dma transfer with this chip*/
 732 };
 733 #endif
 734
 735 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 736 static struct bfin6xx_spi_chip spidev_chip_info = {
 737         .enable_dma = true,
 738 };
 739 #endif
 740
 741 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
 742 static struct platform_device bfin_i2s_pcm = {
 743         .name = "bfin-i2s-pcm-audio",
 744         .id = -1,
 745 };
 746 #endif
 747
 748 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
 749         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 750 #include <asm/bfin_sport3.h>
 751 static struct resource bfin_snd_resources[] = {
 752         {
 753                 .start = SPORT0_CTL_A,
 754                 .end = SPORT0_CTL_A,
 755                 .flags = IORESOURCE_MEM,
 756         },
 757         {
 758                 .start = SPORT0_CTL_B,
 759                 .end = SPORT0_CTL_B,
 760                 .flags = IORESOURCE_MEM,
 761         },
 762         {
 763                 .start = CH_SPORT0_TX,
 764                 .end = CH_SPORT0_TX,
 765                 .flags = IORESOURCE_DMA,
 766         },
 767         {
 768                 .start = CH_SPORT0_RX,
 769                 .end = CH_SPORT0_RX,
 770                 .flags = IORESOURCE_DMA,
 771         },
 772         {
 773                 .start = IRQ_SPORT0_TX_STAT,
 774                 .end = IRQ_SPORT0_TX_STAT,
 775                 .flags = IORESOURCE_IRQ,
 776         },
 777         {
 778                 .start = IRQ_SPORT0_RX_STAT,
 779                 .end = IRQ_SPORT0_RX_STAT,
 780                 .flags = IORESOURCE_IRQ,
 781         },
 782 };
 783
 784 static const unsigned short bfin_snd_pin[] = {
 785         P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
 786         P_SPORT0_BFS, P_SPORT0_BD0, 0,
 787 };
 788
 789 static struct bfin_snd_platform_data bfin_snd_data = {
 790         .pin_req = bfin_snd_pin,
 791 };
 792
 793 static struct platform_device bfin_i2s = {
 794         .name = "bfin-i2s",
 795         .num_resources = ARRAY_SIZE(bfin_snd_resources),
 796         .resource = bfin_snd_resources,
 797         .dev = {
 798                 .platform_data = &bfin_snd_data,
 799         },
 800 };
 801 #endif
 802
 803 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 804         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 805 static struct platform_device adau1761_device = {
 806         .name = "bfin-eval-adau1x61",
 807 };
 808 #endif
 809
 810 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
 811 #include <sound/adau17x1.h>
 812 static struct adau1761_platform_data adau1761_info = {
 813         .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
 814         .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
 815 };
 816 #endif
 817
 818 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
 819         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
 820 #include <linux/videodev2.h>
 821 #include <media/blackfin/bfin_capture.h>
 822 #include <media/blackfin/ppi.h>
 823
 824 static const unsigned short ppi_req[] = {
 825         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
 826         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
 827         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
 828         0,
 829 };
 830
 831 static const struct ppi_info ppi_info = {
 832         .type = PPI_TYPE_EPPI3,
 833         .dma_ch = CH_EPPI0_CH0,
 834         .irq_err = IRQ_EPPI0_STAT,
 835         .base = (void __iomem *)EPPI0_STAT,
 836         .pin_req = ppi_req,
 837 };
 838
 839 #if defined(CONFIG_VIDEO_VS6624) \
 840         || defined(CONFIG_VIDEO_VS6624_MODULE)
 841 static struct v4l2_input vs6624_inputs[] = {
 842         {
 843                 .index = 0,
 844                 .name = "Camera",
 845                 .type = V4L2_INPUT_TYPE_CAMERA,
 846                 .std = V4L2_STD_UNKNOWN,
 847         },
 848 };
 849
 850 static struct bcap_route vs6624_routes[] = {
 851         {
 852                 .input = 0,
 853                 .output = 0,
 854         },
 855 };
 856
 857 static const unsigned vs6624_ce_pin = GPIO_PD1;
 858
 859 static struct bfin_capture_config bfin_capture_data = {
 860         .card_name = "BF609",
 861         .inputs = vs6624_inputs,
 862         .num_inputs = ARRAY_SIZE(vs6624_inputs),
 863         .routes = vs6624_routes,
 864         .i2c_adapter_id = 0,
 865         .board_info = {
 866                 .type = "vs6624",
 867                 .addr = 0x10,
 868                 .platform_data = (void *)&vs6624_ce_pin,
 869         },
 870         .ppi_info = &ppi_info,
 871         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
 872                         | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 873         .blank_clocks = 8,
 874 };
 875 #endif
 876
 877 static struct platform_device bfin_capture_device = {
 878         .name = "bfin_capture",
 879         .dev = {
 880                 .platform_data = &bfin_capture_data,
 881         },
 882 };
 883 #endif
 884
 885 #if defined(CONFIG_BFIN_CRC)
 886 #define BFIN_CRC_NAME "bfin-crc"
 887
 888 static struct resource bfin_crc0_resources[] = {
 889         {
 890                 .start = REG_CRC0_CTL,
 891                 .end = REG_CRC0_REVID+4,
 892                 .flags = IORESOURCE_MEM,
 893         },
 894         {
 895                 .start = IRQ_CRC0_DCNTEXP,
 896                 .end = IRQ_CRC0_DCNTEXP,
 897                 .flags = IORESOURCE_IRQ,
 898         },
 899         {
 900                 .start = CH_MEM_STREAM0_SRC_CRC0,
 901                 .end = CH_MEM_STREAM0_SRC_CRC0,
 902                 .flags = IORESOURCE_DMA,
 903         },
 904         {
 905                 .start = CH_MEM_STREAM0_DEST_CRC0,
 906                 .end = CH_MEM_STREAM0_DEST_CRC0,
 907                 .flags = IORESOURCE_DMA,
 908         },
 909 };
 910
 911 static struct platform_device bfin_crc0_device = {
 912         .name = BFIN_CRC_NAME,
 913         .id = 0,
 914         .num_resources = ARRAY_SIZE(bfin_crc0_resources),
 915         .resource = bfin_crc0_resources,
 916 };
 917
 918 static struct resource bfin_crc1_resources[] = {
 919         {
 920                 .start = REG_CRC1_CTL,
 921                 .end = REG_CRC1_REVID+4,
 922                 .flags = IORESOURCE_MEM,
 923         },
 924         {
 925                 .start = IRQ_CRC1_DCNTEXP,
 926                 .end = IRQ_CRC1_DCNTEXP,
 927                 .flags = IORESOURCE_IRQ,
 928         },
 929         {
 930                 .start = CH_MEM_STREAM1_SRC_CRC1,
 931                 .end = CH_MEM_STREAM1_SRC_CRC1,
 932                 .flags = IORESOURCE_DMA,
 933         },
 934         {
 935                 .start = CH_MEM_STREAM1_DEST_CRC1,
 936                 .end = CH_MEM_STREAM1_DEST_CRC1,
 937                 .flags = IORESOURCE_DMA,
 938         },
 939 };
 940
 941 static struct platform_device bfin_crc1_device = {
 942         .name = BFIN_CRC_NAME,
 943         .id = 1,
 944         .num_resources = ARRAY_SIZE(bfin_crc1_resources),
 945         .resource = bfin_crc1_resources,
 946 };
 947 #endif
 948
 949 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 950 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 951         .model                  = 7877,
 952         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 953         .x_plate_ohms           = 419,
 954         .y_plate_ohms           = 486,
 955         .pressure_max           = 1000,
 956         .pressure_min           = 0,
 957         .stopacq_polarity       = 1,
 958         .first_conversion_delay = 3,
 959         .acquisition_time       = 1,
 960         .averaging              = 1,
 961         .pen_down_acc_interval  = 1,
 962 };
 963 #endif
 964
 965 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 966 #if defined(CONFIG_MTD_M25P80) \
 967         || defined(CONFIG_MTD_M25P80_MODULE)
 968         {
 969                 /* the modalias must be the same as spi device driver name */
 970                 .modalias = "m25p80", /* Name of spi_driver for this device */
 971                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 972                 .bus_num = 0, /* Framework bus number */
 973                 .chip_select = 1, /* SPI_SSEL1*/
 974                 .platform_data = &bfin_spi_flash_data,
 975                 .controller_data = &spi_flash_chip_info,
 976                 .mode = SPI_MODE_3,
 977         },
 978 #endif
 979 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 980         {
 981                 .modalias               = "ad7877",
 982                 .platform_data          = &bfin_ad7877_ts_info,
 983                 .irq                    = IRQ_PB4,      /* old boards (<=Rev 1.3) use IRQ_PJ11 */
 984                 .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 985                 .bus_num                = 0,
 986                 .chip_select            = 2,
 987         },
 988 #endif
 989 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 990         {
 991                 .modalias = "spidev",
 992                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 993                 .bus_num = 0,
 994                 .chip_select = 1,
 995                 .controller_data = &spidev_chip_info,
 996         },
 997 #endif
 998 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
 999         {
1000                 .modalias               = "adxl34x",
1001                 .platform_data          = &adxl34x_info,
1002                 .irq                    = IRQ_PC5,
1003                 .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
1004                 .bus_num                = 1,
1005                 .chip_select            = 2,
1006                 .mode = SPI_MODE_3,
1007         },
1008 #endif
1009 };
1010 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1011 /* SPI (0) */
1012 static struct resource bfin_spi0_resource[] = {
1013         {
1014                 .start = SPI0_REGBASE,
1015                 .end   = SPI0_REGBASE + 0xFF,
1016                 .flags = IORESOURCE_MEM,
1017         },
1018         {
1019                 .start = CH_SPI0_TX,
1020                 .end   = CH_SPI0_TX,
1021                 .flags = IORESOURCE_DMA,
1022         },
1023         {
1024                 .start = CH_SPI0_RX,
1025                 .end   = CH_SPI0_RX,
1026                 .flags = IORESOURCE_DMA,
1027         },
1028 };
1029
1030 /* SPI (1) */
1031 static struct resource bfin_spi1_resource[] = {
1032         {
1033                 .start = SPI1_REGBASE,
1034                 .end   = SPI1_REGBASE + 0xFF,
1035                 .flags = IORESOURCE_MEM,
1036         },
1037         {
1038                 .start = CH_SPI1_TX,
1039                 .end   = CH_SPI1_TX,
1040                 .flags = IORESOURCE_DMA,
1041         },
1042         {
1043                 .start = CH_SPI1_RX,
1044                 .end   = CH_SPI1_RX,
1045                 .flags = IORESOURCE_DMA,
1046         },
1047
1048 };
1049
1050 /* SPI controller data */
1051 static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1052         .num_chipselect = 4,
1053         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1054 };
1055
1056 static struct platform_device bf60x_spi_master0 = {
1057         .name = "bfin-spi",
1058         .id = 0, /* Bus number */
1059         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1060         .resource = bfin_spi0_resource,
1061         .dev = {
1062                 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1063         },
1064 };
1065
1066 static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1067         .num_chipselect = 4,
1068         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1069 };
1070
1071 static struct platform_device bf60x_spi_master1 = {
1072         .name = "bfin-spi",
1073         .id = 1, /* Bus number */
1074         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1075         .resource = bfin_spi1_resource,
1076         .dev = {
1077                 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1078         },
1079 };
1080 #endif  /* spi master and devices */
1081
1082 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1083 static struct resource bfin_twi0_resource[] = {
1084         [0] = {
1085                 .start = TWI0_CLKDIV,
1086                 .end   = TWI0_CLKDIV + 0xFF,
1087                 .flags = IORESOURCE_MEM,
1088         },
1089         [1] = {
1090                 .start = IRQ_TWI0,
1091                 .end   = IRQ_TWI0,
1092                 .flags = IORESOURCE_IRQ,
1093         },
1094 };
1095
1096 static struct platform_device i2c_bfin_twi0_device = {
1097         .name = "i2c-bfin-twi",
1098         .id = 0,
1099         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1100         .resource = bfin_twi0_resource,
1101 };
1102
1103 static struct resource bfin_twi1_resource[] = {
1104         [0] = {
1105                 .start = TWI1_CLKDIV,
1106                 .end   = TWI1_CLKDIV + 0xFF,
1107                 .flags = IORESOURCE_MEM,
1108         },
1109         [1] = {
1110                 .start = IRQ_TWI1,
1111                 .end   = IRQ_TWI1,
1112                 .flags = IORESOURCE_IRQ,
1113         },
1114 };
1115
1116 static struct platform_device i2c_bfin_twi1_device = {
1117         .name = "i2c-bfin-twi",
1118         .id = 1,
1119         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1120         .resource = bfin_twi1_resource,
1121 };
1122 #endif
1123
1124 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1125 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1126         {
1127                 I2C_BOARD_INFO("adxl34x", 0x53),
1128                 .irq = IRQ_PC5,
1129                 .platform_data = (void *)&adxl34x_info,
1130         },
1131 #endif
1132 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1133         {
1134                 I2C_BOARD_INFO("adau1761", 0x38),
1135                 .platform_data = (void *)&adau1761_info
1136         },
1137 #endif
1138 };
1139
1140 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1141 };
1142
1143 static const unsigned int cclk_vlev_datasheet[] =
1144 {
1145 /*
1146  * Internal VLEV BF54XSBBC1533
1147  ****temporarily using these values until data sheet is updated
1148  */
1149         VRPAIR(VLEV_085, 150000000),
1150         VRPAIR(VLEV_090, 250000000),
1151         VRPAIR(VLEV_110, 276000000),
1152         VRPAIR(VLEV_115, 301000000),
1153         VRPAIR(VLEV_120, 525000000),
1154         VRPAIR(VLEV_125, 550000000),
1155         VRPAIR(VLEV_130, 600000000),
1156 };
1157
1158 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1159         .tuple_tab = cclk_vlev_datasheet,
1160         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1161         .vr_settling_time = 25 /* us */,
1162 };
1163
1164 static struct platform_device bfin_dpmc = {
1165         .name = "bfin dpmc",
1166         .dev = {
1167                 .platform_data = &bfin_dmpc_vreg_data,
1168         },
1169 };
1170
1171 static struct platform_device *ezkit_devices[] __initdata = {
1172
1173         &bfin_dpmc,
1174
1175 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1176         &rtc_device,
1177 #endif
1178
1179 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1180 #ifdef CONFIG_SERIAL_BFIN_UART0
1181         &bfin_uart0_device,
1182 #endif
1183 #ifdef CONFIG_SERIAL_BFIN_UART1
1184         &bfin_uart1_device,
1185 #endif
1186 #endif
1187
1188 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1189 #ifdef CONFIG_BFIN_SIR0
1190         &bfin_sir0_device,
1191 #endif
1192 #ifdef CONFIG_BFIN_SIR1
1193         &bfin_sir1_device,
1194 #endif
1195 #endif
1196
1197 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1198         &bfin_eth_device,
1199 #endif
1200
1201 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1202         &musb_device,
1203 #endif
1204
1205 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1206         &bfin_isp1760_device,
1207 #endif
1208
1209 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1210 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1211         &bfin_sport0_uart_device,
1212 #endif
1213 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1214         &bfin_sport1_uart_device,
1215 #endif
1216 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1217         &bfin_sport2_uart_device,
1218 #endif
1219 #endif
1220
1221 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1222         &bfin_can0_device,
1223 #endif
1224
1225 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1226         &bfin_nand_device,
1227 #endif
1228
1229 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1230         &bfin_sdh_device,
1231 #endif
1232
1233 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1234         &bf60x_spi_master0,
1235         &bf60x_spi_master1,
1236 #endif
1237
1238 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1239         &bfin_rotary_device,
1240 #endif
1241
1242 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1243         &i2c_bfin_twi0_device,
1244 #if !defined(CONFIG_BF542)
1245         &i2c_bfin_twi1_device,
1246 #endif
1247 #endif
1248
1249 #if defined(CONFIG_BFIN_CRC)
1250         &bfin_crc0_device,
1251         &bfin_crc1_device,
1252 #endif
1253
1254 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1255         &bfin_device_gpiokeys,
1256 #endif
1257
1258 #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
1259         &ezkit_flash_device,
1260 #endif
1261 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
1262         &bfin_i2s_pcm,
1263 #endif
1264 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1265         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1266         &bfin_i2s,
1267 #endif
1268 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1269         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1270         &adau1761_device,
1271 #endif
1272 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1273         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1274         &bfin_capture_device,
1275 #endif
1276 };
1277
1278 static int __init ezkit_init(void)
1279 {
1280         printk(KERN_INFO "%s(): registering device resources\n", __func__);
1281
1282         i2c_register_board_info(0, bfin_i2c_board_info0,
1283                                 ARRAY_SIZE(bfin_i2c_board_info0));
1284         i2c_register_board_info(1, bfin_i2c_board_info1,
1285                                 ARRAY_SIZE(bfin_i2c_board_info1));
1286
1287 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1288         if (!peripheral_request_list(pins, "emac0"))
1289                 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1290 #endif
1291
1292         platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1293
1294         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1295
1296         return 0;
1297 }
1298
1299 arch_initcall(ezkit_init);
1300
1301 static struct platform_device *ezkit_early_devices[] __initdata = {
1302 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1303 #ifdef CONFIG_SERIAL_BFIN_UART0
1304         &bfin_uart0_device,
1305 #endif
1306 #ifdef CONFIG_SERIAL_BFIN_UART1
1307         &bfin_uart1_device,
1308 #endif
1309 #endif
1310
1311 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1312 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1313         &bfin_sport0_uart_device,
1314 #endif
1315 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1316         &bfin_sport1_uart_device,
1317 #endif
1318 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1319         &bfin_sport2_uart_device,
1320 #endif
1321 #endif
1322 };
1323
1324 void __init native_machine_early_platform_add_devices(void)
1325 {
1326         printk(KERN_INFO "register early platform devices\n");
1327         early_platform_add_devices(ezkit_early_devices,
1328                 ARRAY_SIZE(ezkit_early_devices));
1329 }