2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/utsname.h>
29 #include <linux/kprobes.h>
30 #include <linux/kexec.h>
33 #include <linux/ioport.h>
34 #include <linux/eisa.h>
38 #include <linux/mca.h>
41 #include <asm/processor.h>
42 #include <asm/system.h>
43 #include <asm/uaccess.h>
45 #include <asm/atomic.h>
46 #include <asm/debugreg.h>
52 #include <asm/arch_hooks.h>
53 #include <asm/kdebug.h>
55 #include <linux/module.h>
57 #include "mach_traps.h"
59 asmlinkage int system_call(void);
61 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
64 /* Do we ignore FPU interrupts ? */
65 char ignore_fpu_irq = 0;
68 * The IDT has to be page-aligned to simplify the Pentium
69 * F0 0F bug workaround.. We have a special link segment
72 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
74 asmlinkage void divide_error(void);
75 asmlinkage void debug(void);
76 asmlinkage void nmi(void);
77 asmlinkage void int3(void);
78 asmlinkage void overflow(void);
79 asmlinkage void bounds(void);
80 asmlinkage void invalid_op(void);
81 asmlinkage void device_not_available(void);
82 asmlinkage void coprocessor_segment_overrun(void);
83 asmlinkage void invalid_TSS(void);
84 asmlinkage void segment_not_present(void);
85 asmlinkage void stack_segment(void);
86 asmlinkage void general_protection(void);
87 asmlinkage void page_fault(void);
88 asmlinkage void coprocessor_error(void);
89 asmlinkage void simd_coprocessor_error(void);
90 asmlinkage void alignment_check(void);
91 asmlinkage void spurious_interrupt_bug(void);
92 asmlinkage void machine_check(void);
94 static int kstack_depth_to_print = 24;
95 struct notifier_block *i386die_chain;
96 static DEFINE_SPINLOCK(die_notifier_lock);
98 int register_die_notifier(struct notifier_block *nb)
104 spin_lock_irqsave(&die_notifier_lock, flags);
105 err = notifier_chain_register(&i386die_chain, nb);
106 spin_unlock_irqrestore(&die_notifier_lock, flags);
109 EXPORT_SYMBOL(register_die_notifier);
111 static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
113 return p > (void *)tinfo &&
114 p < (void *)tinfo + THREAD_SIZE - 3;
118 * Print CONFIG_STACK_BACKTRACE_COLS address/symbol entries per line.
120 static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl,
126 #if CONFIG_STACK_BACKTRACE_COLS == 1
127 printk(" [<%08lx>] ", addr);
129 printk(" <%08lx> ", addr);
131 print_symbol("%s", addr);
133 printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS;
143 static inline unsigned long print_context_stack(struct thread_info *tinfo,
144 unsigned long *stack, unsigned long ebp,
148 int printed = 0; /* nr of entries already printed on current line */
150 #ifdef CONFIG_FRAME_POINTER
151 while (valid_stack_ptr(tinfo, (void *)ebp)) {
152 addr = *(unsigned long *)(ebp + 4);
153 printed = print_addr_and_symbol(addr, log_lvl, printed);
154 ebp = *(unsigned long *)ebp;
157 while (valid_stack_ptr(tinfo, stack)) {
159 if (__kernel_text_address(addr))
160 printed = print_addr_and_symbol(addr, log_lvl, printed);
169 static void show_trace_log_lvl(struct task_struct *task,
170 unsigned long *stack, char *log_lvl)
177 if (task == current) {
178 /* Grab ebp right from our regs */
179 asm ("movl %%ebp, %0" : "=r" (ebp) : );
181 /* ebp is the last reg pushed by switch_to */
182 ebp = *(unsigned long *) task->thread.esp;
186 struct thread_info *context;
187 context = (struct thread_info *)
188 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
189 ebp = print_context_stack(context, stack, ebp, log_lvl);
190 stack = (unsigned long*)context->previous_esp;
193 printk("%s =======================\n", log_lvl);
197 void show_trace(struct task_struct *task, unsigned long * stack)
199 show_trace_log_lvl(task, stack, "");
202 static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
205 unsigned long *stack;
210 esp = (unsigned long*)task->thread.esp;
212 esp = (unsigned long *)&esp;
217 for(i = 0; i < kstack_depth_to_print; i++) {
218 if (kstack_end(stack))
220 if (i && ((i % 8) == 0)) {
222 printk("%s ", log_lvl);
224 printk("%08lx ", *stack++);
227 printk("%sCall Trace:\n", log_lvl);
228 show_trace_log_lvl(task, esp, log_lvl);
231 void show_stack(struct task_struct *task, unsigned long *esp)
233 show_stack_log_lvl(task, esp, "");
237 * The architecture-independent dump_stack generator
239 void dump_stack(void)
243 show_trace(current, &stack);
246 EXPORT_SYMBOL(dump_stack);
248 void show_registers(struct pt_regs *regs)
255 esp = (unsigned long) (®s->esp);
257 if (user_mode(regs)) {
260 ss = regs->xss & 0xffff;
263 printk(KERN_EMERG "CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\n"
264 "EFLAGS: %08lx (%s %.*s) \n",
265 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
266 print_tainted(), regs->eflags, system_utsname.release,
267 (int)strcspn(system_utsname.version, " "),
268 system_utsname.version);
269 print_symbol(KERN_EMERG "EIP is at %s\n", regs->eip);
270 printk(KERN_EMERG "eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
271 regs->eax, regs->ebx, regs->ecx, regs->edx);
272 printk(KERN_EMERG "esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
273 regs->esi, regs->edi, regs->ebp, esp);
274 printk(KERN_EMERG "ds: %04x es: %04x ss: %04x\n",
275 regs->xds & 0xffff, regs->xes & 0xffff, ss);
276 printk(KERN_EMERG "Process %s (pid: %d, threadinfo=%p task=%p)",
277 current->comm, current->pid, current_thread_info(), current);
279 * When in-kernel, we also print out the stack and code at the
280 * time of the fault..
285 printk("\n" KERN_EMERG "Stack: ");
286 show_stack_log_lvl(NULL, (unsigned long *)esp, KERN_EMERG);
288 printk(KERN_EMERG "Code: ");
290 eip = (u8 __user *)regs->eip - 43;
291 for (i = 0; i < 64; i++, eip++) {
294 if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
295 printk(" Bad EIP value.");
298 if (eip == (u8 __user *)regs->eip)
299 printk("<%02x> ", c);
307 static void handle_BUG(struct pt_regs *regs)
317 if (eip < PAGE_OFFSET)
319 if (__get_user(ud2, (unsigned short __user *)eip))
323 if (__get_user(line, (unsigned short __user *)(eip + 2)))
325 if (__get_user(file, (char * __user *)(eip + 4)) ||
326 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
327 file = "<bad filename>";
329 printk(KERN_EMERG "------------[ cut here ]------------\n");
330 printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
335 /* Here we know it was a BUG but file-n-line is unavailable */
337 printk(KERN_EMERG "Kernel BUG\n");
340 /* This is gone through when something in the kernel
341 * has done something bad and is about to be terminated.
343 void die(const char * str, struct pt_regs * regs, long err)
348 int lock_owner_depth;
350 .lock = SPIN_LOCK_UNLOCKED,
352 .lock_owner_depth = 0
354 static int die_counter;
357 if (die.lock_owner != raw_smp_processor_id()) {
359 spin_lock_irqsave(&die.lock, flags);
360 die.lock_owner = smp_processor_id();
361 die.lock_owner_depth = 0;
365 local_save_flags(flags);
367 if (++die.lock_owner_depth < 3) {
370 printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
371 #ifdef CONFIG_PREEMPT
372 printk(KERN_EMERG "PREEMPT ");
381 #ifdef CONFIG_DEBUG_PAGEALLOC
384 printk("DEBUG_PAGEALLOC");
389 notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
390 show_registers(regs);
392 printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
396 spin_unlock_irqrestore(&die.lock, flags);
398 if (kexec_should_crash(current))
402 panic("Fatal exception in interrupt");
405 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
407 panic("Fatal exception");
412 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
414 if (!user_mode_vm(regs))
418 static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86,
419 struct pt_regs * regs, long error_code,
422 struct task_struct *tsk = current;
423 tsk->thread.error_code = error_code;
424 tsk->thread.trap_no = trapnr;
426 if (regs->eflags & VM_MASK) {
432 if (!user_mode(regs))
437 force_sig_info(signr, info, tsk);
439 force_sig(signr, tsk);
444 if (!fixup_exception(regs))
445 die(str, regs, error_code);
450 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
451 if (ret) goto trap_signal;
456 #define DO_ERROR(trapnr, signr, str, name) \
457 fastcall void do_##name(struct pt_regs * regs, long error_code) \
459 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
462 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
465 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
466 fastcall void do_##name(struct pt_regs * regs, long error_code) \
469 info.si_signo = signr; \
471 info.si_code = sicode; \
472 info.si_addr = (void __user *)siaddr; \
473 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
476 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
479 #define DO_VM86_ERROR(trapnr, signr, str, name) \
480 fastcall void do_##name(struct pt_regs * regs, long error_code) \
482 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
485 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
488 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
489 fastcall void do_##name(struct pt_regs * regs, long error_code) \
492 info.si_signo = signr; \
494 info.si_code = sicode; \
495 info.si_addr = (void __user *)siaddr; \
496 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
499 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
502 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
503 #ifndef CONFIG_KPROBES
504 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
506 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
507 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
508 DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->eip)
509 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
510 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
511 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
512 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
513 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
514 DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
516 fastcall void __kprobes do_general_protection(struct pt_regs * regs,
520 struct tss_struct *tss = &per_cpu(init_tss, cpu);
521 struct thread_struct *thread = ¤t->thread;
524 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
525 * invalid offset set (the LAZY one) and the faulting thread has
526 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
527 * and we set the offset field correctly. Then we let the CPU to
528 * restart the faulting instruction.
530 if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
531 thread->io_bitmap_ptr) {
532 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
533 thread->io_bitmap_max);
535 * If the previously set map was extending to higher ports
536 * than the current one, pad extra space with 0xff (no access).
538 if (thread->io_bitmap_max < tss->io_bitmap_max)
539 memset((char *) tss->io_bitmap +
540 thread->io_bitmap_max, 0xff,
541 tss->io_bitmap_max - thread->io_bitmap_max);
542 tss->io_bitmap_max = thread->io_bitmap_max;
543 tss->io_bitmap_base = IO_BITMAP_OFFSET;
544 tss->io_bitmap_owner = thread;
550 current->thread.error_code = error_code;
551 current->thread.trap_no = 13;
553 if (regs->eflags & VM_MASK)
556 if (!user_mode(regs))
559 current->thread.error_code = error_code;
560 current->thread.trap_no = 13;
561 force_sig(SIGSEGV, current);
566 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
570 if (!fixup_exception(regs)) {
571 if (notify_die(DIE_GPF, "general protection fault", regs,
572 error_code, 13, SIGSEGV) == NOTIFY_STOP)
574 die("general protection fault", regs, error_code);
578 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
580 printk(KERN_EMERG "Uhhuh. NMI received. Dazed and confused, but trying "
582 printk(KERN_EMERG "You probably have a hardware problem with your RAM "
585 /* Clear and disable the memory parity error line. */
586 clear_mem_error(reason);
589 static void io_check_error(unsigned char reason, struct pt_regs * regs)
593 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
594 show_registers(regs);
596 /* Re-enable the IOCK line, wait for a few seconds */
597 reason = (reason & 0xf) | 8;
600 while (--i) udelay(1000);
605 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
608 /* Might actually be able to figure out what the guilty party
615 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
616 reason, smp_processor_id());
617 printk("Dazed and confused, but trying to continue\n");
618 printk("Do you have a strange power saving mode enabled?\n");
621 static DEFINE_SPINLOCK(nmi_print_lock);
623 void die_nmi (struct pt_regs *regs, const char *msg)
625 if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 0, SIGINT) ==
629 spin_lock(&nmi_print_lock);
631 * We are in trouble anyway, lets at least try
632 * to get a message out.
635 printk(KERN_EMERG "%s", msg);
636 printk(" on CPU%d, eip %08lx, registers:\n",
637 smp_processor_id(), regs->eip);
638 show_registers(regs);
639 printk(KERN_EMERG "console shuts up ...\n");
641 spin_unlock(&nmi_print_lock);
644 /* If we are in kernel we are probably nested up pretty bad
645 * and might aswell get out now while we still can.
647 if (!user_mode(regs)) {
648 current->thread.trap_no = 2;
655 static void default_do_nmi(struct pt_regs * regs)
657 unsigned char reason = 0;
659 /* Only the BSP gets external NMIs from the system. */
660 if (!smp_processor_id())
661 reason = get_nmi_reason();
663 if (!(reason & 0xc0)) {
664 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
667 #ifdef CONFIG_X86_LOCAL_APIC
669 * Ok, so this is none of the documented NMI sources,
670 * so it must be the NMI watchdog.
673 nmi_watchdog_tick(regs);
677 unknown_nmi_error(reason, regs);
680 if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
683 mem_parity_error(reason, regs);
685 io_check_error(reason, regs);
687 * Reassert NMI in case it became active meanwhile
688 * as it's edge-triggered.
693 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
698 static nmi_callback_t nmi_callback = dummy_nmi_callback;
700 fastcall void do_nmi(struct pt_regs * regs, long error_code)
706 cpu = smp_processor_id();
710 if (!rcu_dereference(nmi_callback)(regs, cpu))
711 default_do_nmi(regs);
716 void set_nmi_callback(nmi_callback_t callback)
719 rcu_assign_pointer(nmi_callback, callback);
721 EXPORT_SYMBOL_GPL(set_nmi_callback);
723 void unset_nmi_callback(void)
725 nmi_callback = dummy_nmi_callback;
727 EXPORT_SYMBOL_GPL(unset_nmi_callback);
729 #ifdef CONFIG_KPROBES
730 fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code)
732 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
735 /* This is an interrupt gate, because kprobes wants interrupts
736 disabled. Normal trap handlers don't. */
737 restore_interrupts(regs);
738 do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
743 * Our handling of the processor debug registers is non-trivial.
744 * We do not clear them on entry and exit from the kernel. Therefore
745 * it is possible to get a watchpoint trap here from inside the kernel.
746 * However, the code in ./ptrace.c has ensured that the user can
747 * only set watchpoints on userspace addresses. Therefore the in-kernel
748 * watchpoint trap can only occur in code which is reading/writing
749 * from user space. Such code must not hold kernel locks (since it
750 * can equally take a page fault), therefore it is safe to call
751 * force_sig_info even though that claims and releases locks.
753 * Code in ./signal.c ensures that the debug control register
754 * is restored before we deliver any signal, and therefore that
755 * user code runs with the correct debug control register even though
758 * Being careful here means that we don't have to be as careful in a
759 * lot of more complicated places (task switching can be a bit lazy
760 * about restoring all the debug state, and ptrace doesn't have to
761 * find every occurrence of the TF bit that could be saved away even
764 fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code)
766 unsigned int condition;
767 struct task_struct *tsk = current;
769 get_debugreg(condition, 6);
771 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
772 SIGTRAP) == NOTIFY_STOP)
774 /* It's safe to allow irq's after DR6 has been saved */
775 if (regs->eflags & X86_EFLAGS_IF)
778 /* Mask out spurious debug traps due to lazy DR7 setting */
779 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
780 if (!tsk->thread.debugreg[7])
784 if (regs->eflags & VM_MASK)
787 /* Save debug status register where ptrace can see it */
788 tsk->thread.debugreg[6] = condition;
791 * Single-stepping through TF: make sure we ignore any events in
792 * kernel space (but re-enable TF when returning to user mode).
794 if (condition & DR_STEP) {
796 * We already checked v86 mode above, so we can
797 * check for kernel mode by just checking the CPL
800 if (!user_mode(regs))
801 goto clear_TF_reenable;
804 /* Ok, finally something we can handle */
805 send_sigtrap(tsk, regs, error_code);
807 /* Disable additional traps. They'll be re-enabled when
808 * the signal is delivered.
815 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
819 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
820 regs->eflags &= ~TF_MASK;
825 * Note that we play around with the 'TS' bit in an attempt to get
826 * the correct behaviour even in the presence of the asynchronous
829 void math_error(void __user *eip)
831 struct task_struct * task;
833 unsigned short cwd, swd;
836 * Save the info for the exception handler and clear the error.
840 task->thread.trap_no = 16;
841 task->thread.error_code = 0;
842 info.si_signo = SIGFPE;
844 info.si_code = __SI_FAULT;
847 * (~cwd & swd) will mask out exceptions that are not set to unmasked
848 * status. 0x3f is the exception bits in these regs, 0x200 is the
849 * C1 reg you need in case of a stack fault, 0x040 is the stack
850 * fault bit. We should only be taking one exception at a time,
851 * so if this combination doesn't produce any single exception,
852 * then we have a bad program that isn't syncronizing its FPU usage
853 * and it will suffer the consequences since we won't be able to
854 * fully reproduce the context of the exception
856 cwd = get_fpu_cwd(task);
857 swd = get_fpu_swd(task);
858 switch (swd & ~cwd & 0x3f) {
859 case 0x000: /* No unmasked exception */
861 default: /* Multiple exceptions */
863 case 0x001: /* Invalid Op */
865 * swd & 0x240 == 0x040: Stack Underflow
866 * swd & 0x240 == 0x240: Stack Overflow
867 * User must clear the SF bit (0x40) if set
869 info.si_code = FPE_FLTINV;
871 case 0x002: /* Denormalize */
872 case 0x010: /* Underflow */
873 info.si_code = FPE_FLTUND;
875 case 0x004: /* Zero Divide */
876 info.si_code = FPE_FLTDIV;
878 case 0x008: /* Overflow */
879 info.si_code = FPE_FLTOVF;
881 case 0x020: /* Precision */
882 info.si_code = FPE_FLTRES;
885 force_sig_info(SIGFPE, &info, task);
888 fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
891 math_error((void __user *)regs->eip);
894 static void simd_math_error(void __user *eip)
896 struct task_struct * task;
898 unsigned short mxcsr;
901 * Save the info for the exception handler and clear the error.
905 task->thread.trap_no = 19;
906 task->thread.error_code = 0;
907 info.si_signo = SIGFPE;
909 info.si_code = __SI_FAULT;
912 * The SIMD FPU exceptions are handled a little differently, as there
913 * is only a single status/control register. Thus, to determine which
914 * unmasked exception was caught we must mask the exception mask bits
915 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
917 mxcsr = get_fpu_mxcsr(task);
918 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
922 case 0x001: /* Invalid Op */
923 info.si_code = FPE_FLTINV;
925 case 0x002: /* Denormalize */
926 case 0x010: /* Underflow */
927 info.si_code = FPE_FLTUND;
929 case 0x004: /* Zero Divide */
930 info.si_code = FPE_FLTDIV;
932 case 0x008: /* Overflow */
933 info.si_code = FPE_FLTOVF;
935 case 0x020: /* Precision */
936 info.si_code = FPE_FLTRES;
939 force_sig_info(SIGFPE, &info, task);
942 fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
946 /* Handle SIMD FPU exceptions on PIII+ processors. */
948 simd_math_error((void __user *)regs->eip);
951 * Handle strange cache flush from user space exception
952 * in all other cases. This is undocumented behaviour.
954 if (regs->eflags & VM_MASK) {
955 handle_vm86_fault((struct kernel_vm86_regs *)regs,
959 current->thread.trap_no = 19;
960 current->thread.error_code = error_code;
961 die_if_kernel("cache flush denied", regs, error_code);
962 force_sig(SIGSEGV, current);
966 fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
970 /* No need to warn about this any longer. */
971 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
975 fastcall void setup_x86_bogus_stack(unsigned char * stk)
977 unsigned long *switch16_ptr, *switch32_ptr;
978 struct pt_regs *regs;
979 unsigned long stack_top, stack_bot;
980 unsigned short iret_frame16_off;
981 int cpu = smp_processor_id();
982 /* reserve the space on 32bit stack for the magic switch16 pointer */
983 memmove(stk, stk + 8, sizeof(struct pt_regs));
984 switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
985 regs = (struct pt_regs *)stk;
986 /* now the switch32 on 16bit stack */
987 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
988 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
989 switch32_ptr = (unsigned long *)(stack_top - 8);
990 iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
991 /* copy iret frame on 16bit stack */
992 memcpy((void *)(stack_bot + iret_frame16_off), ®s->eip, 20);
993 /* fill in the switch pointers */
994 switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
995 switch16_ptr[1] = __ESPFIX_SS;
996 switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
997 8 - CPU_16BIT_STACK_SIZE;
998 switch32_ptr[1] = __KERNEL_DS;
1001 fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
1003 unsigned long *switch32_ptr;
1004 unsigned char *stack16, *stack32;
1005 unsigned long stack_top, stack_bot;
1007 int cpu = smp_processor_id();
1008 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
1009 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
1010 switch32_ptr = (unsigned long *)(stack_top - 8);
1011 /* copy the data from 16bit stack to 32bit stack */
1012 len = CPU_16BIT_STACK_SIZE - 8 - sp;
1013 stack16 = (unsigned char *)(stack_bot + sp);
1014 stack32 = (unsigned char *)
1015 (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
1016 memcpy(stack32, stack16, len);
1021 * 'math_state_restore()' saves the current math information in the
1022 * old math state array, and gets the new ones from the current task
1024 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
1025 * Don't touch unless you *really* know how it works.
1027 * Must be called with kernel preemption disabled (in this case,
1028 * local interrupts are disabled at the call-site in entry.S).
1030 asmlinkage void math_state_restore(struct pt_regs regs)
1032 struct thread_info *thread = current_thread_info();
1033 struct task_struct *tsk = thread->task;
1035 clts(); /* Allow maths ops (or we recurse) */
1036 if (!tsk_used_math(tsk))
1039 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
1042 #ifndef CONFIG_MATH_EMULATION
1044 asmlinkage void math_emulate(long arg)
1046 printk(KERN_EMERG "math-emulation not enabled and no coprocessor found.\n");
1047 printk(KERN_EMERG "killing %s.\n",current->comm);
1048 force_sig(SIGFPE,current);
1052 #endif /* CONFIG_MATH_EMULATION */
1054 #ifdef CONFIG_X86_F00F_BUG
1055 void __init trap_init_f00f_bug(void)
1057 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
1060 * Update the IDT descriptor and reload the IDT so that
1061 * it uses the read-only mapped virtual address.
1063 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
1064 load_idt(&idt_descr);
1068 #define _set_gate(gate_addr,type,dpl,addr,seg) \
1071 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
1072 "movw %4,%%dx\n\t" \
1073 "movl %%eax,%0\n\t" \
1075 :"=m" (*((long *) (gate_addr))), \
1076 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
1077 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
1078 "3" ((char *) (addr)),"2" ((seg) << 16)); \
1083 * This needs to use 'idt_table' rather than 'idt', and
1084 * thus use the _nonmapped_ version of the IDT, as the
1085 * Pentium F0 0F bugfix can have resulted in the mapped
1086 * IDT being write-protected.
1088 void set_intr_gate(unsigned int n, void *addr)
1090 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
1094 * This routine sets up an interrupt gate at directory privilege level 3.
1096 static inline void set_system_intr_gate(unsigned int n, void *addr)
1098 _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
1101 static void __init set_trap_gate(unsigned int n, void *addr)
1103 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
1106 static void __init set_system_gate(unsigned int n, void *addr)
1108 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
1111 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
1113 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
1117 void __init trap_init(void)
1120 void __iomem *p = ioremap(0x0FFFD9, 4);
1121 if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1127 #ifdef CONFIG_X86_LOCAL_APIC
1128 init_apic_mappings();
1131 set_trap_gate(0,÷_error);
1132 set_intr_gate(1,&debug);
1133 set_intr_gate(2,&nmi);
1134 set_system_intr_gate(3, &int3); /* int3/4 can be called from all */
1135 set_system_gate(4,&overflow);
1136 set_trap_gate(5,&bounds);
1137 set_trap_gate(6,&invalid_op);
1138 set_trap_gate(7,&device_not_available);
1139 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1140 set_trap_gate(9,&coprocessor_segment_overrun);
1141 set_trap_gate(10,&invalid_TSS);
1142 set_trap_gate(11,&segment_not_present);
1143 set_trap_gate(12,&stack_segment);
1144 set_trap_gate(13,&general_protection);
1145 set_intr_gate(14,&page_fault);
1146 set_trap_gate(15,&spurious_interrupt_bug);
1147 set_trap_gate(16,&coprocessor_error);
1148 set_trap_gate(17,&alignment_check);
1149 #ifdef CONFIG_X86_MCE
1150 set_trap_gate(18,&machine_check);
1152 set_trap_gate(19,&simd_coprocessor_error);
1156 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
1157 * Generates a compile-time "error: zero width for bit-field" if
1158 * the alignment is wrong.
1160 struct fxsrAlignAssert {
1161 int _:!(offsetof(struct task_struct,
1162 thread.i387.fxsave) & 15);
1165 printk(KERN_INFO "Enabling fast FPU save and restore... ");
1166 set_in_cr4(X86_CR4_OSFXSR);
1170 printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
1172 set_in_cr4(X86_CR4_OSXMMEXCPT);
1176 set_system_gate(SYSCALL_VECTOR,&system_call);
1179 * Should be a barrier for any external CPU state.
1186 static int __init kstack_setup(char *s)
1188 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
1191 __setup("kstack=", kstack_setup);