[ALSA] version 1.0.14rc3
[firefly-linux-kernel-4.4.55.git] / arch / i386 / kernel / tsc.c
1 /*
2  * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
3  * which was originally moved from arch/i386/kernel/time.c.
4  * See comments there for proper credits.
5  */
6
7 #include <linux/clocksource.h>
8 #include <linux/workqueue.h>
9 #include <linux/cpufreq.h>
10 #include <linux/jiffies.h>
11 #include <linux/init.h>
12 #include <linux/dmi.h>
13
14 #include <asm/delay.h>
15 #include <asm/tsc.h>
16 #include <asm/io.h>
17 #include <asm/timer.h>
18
19 #include "mach_timer.h"
20
21 /*
22  * On some systems the TSC frequency does not
23  * change with the cpu frequency. So we need
24  * an extra value to store the TSC freq
25  */
26 unsigned int tsc_khz;
27 unsigned long long (*custom_sched_clock)(void);
28
29 int tsc_disable;
30
31 #ifdef CONFIG_X86_TSC
32 static int __init tsc_setup(char *str)
33 {
34         printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
35                                 "cannot disable TSC.\n");
36         return 1;
37 }
38 #else
39 /*
40  * disable flag for tsc. Takes effect by clearing the TSC cpu flag
41  * in cpu/common.c
42  */
43 static int __init tsc_setup(char *str)
44 {
45         tsc_disable = 1;
46
47         return 1;
48 }
49 #endif
50
51 __setup("notsc", tsc_setup);
52
53 /*
54  * code to mark and check if the TSC is unstable
55  * due to cpufreq or due to unsynced TSCs
56  */
57 static int tsc_unstable;
58
59 static inline int check_tsc_unstable(void)
60 {
61         return tsc_unstable;
62 }
63
64 /* Accellerators for sched_clock()
65  * convert from cycles(64bits) => nanoseconds (64bits)
66  *  basic equation:
67  *              ns = cycles / (freq / ns_per_sec)
68  *              ns = cycles * (ns_per_sec / freq)
69  *              ns = cycles * (10^9 / (cpu_khz * 10^3))
70  *              ns = cycles * (10^6 / cpu_khz)
71  *
72  *      Then we use scaling math (suggested by george@mvista.com) to get:
73  *              ns = cycles * (10^6 * SC / cpu_khz) / SC
74  *              ns = cycles * cyc2ns_scale / SC
75  *
76  *      And since SC is a constant power of two, we can convert the div
77  *  into a shift.
78  *
79  *  We can use khz divisor instead of mhz to keep a better percision, since
80  *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
81  *  (mathieu.desnoyers@polymtl.ca)
82  *
83  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
84  */
85 static unsigned long cyc2ns_scale __read_mostly;
86
87 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
88
89 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
90 {
91         cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
92 }
93
94 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
95 {
96         return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
97 }
98
99 /*
100  * Scheduler clock - returns current time in nanosec units.
101  */
102 unsigned long long sched_clock(void)
103 {
104         unsigned long long this_offset;
105
106         /*
107          * Fall back to jiffies if there's no TSC available:
108          */
109         if (unlikely(tsc_disable))
110                 /* No locking but a rare wrong value is not a big deal: */
111                 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
112
113         /* read the Time Stamp Counter: */
114         get_scheduled_cycles(this_offset);
115
116         /* return the value in ns */
117         return cycles_2_ns(this_offset);
118 }
119
120 unsigned long native_calculate_cpu_khz(void)
121 {
122         unsigned long long start, end;
123         unsigned long count;
124         u64 delta64;
125         int i;
126         unsigned long flags;
127
128         local_irq_save(flags);
129
130         /* run 3 times to ensure the cache is warm */
131         for (i = 0; i < 3; i++) {
132                 mach_prepare_counter();
133                 rdtscll(start);
134                 mach_countup(&count);
135                 rdtscll(end);
136         }
137         /*
138          * Error: ECTCNEVERSET
139          * The CTC wasn't reliable: we got a hit on the very first read,
140          * or the CPU was so fast/slow that the quotient wouldn't fit in
141          * 32 bits..
142          */
143         if (count <= 1)
144                 goto err;
145
146         delta64 = end - start;
147
148         /* cpu freq too fast: */
149         if (delta64 > (1ULL<<32))
150                 goto err;
151
152         /* cpu freq too slow: */
153         if (delta64 <= CALIBRATE_TIME_MSEC)
154                 goto err;
155
156         delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
157         do_div(delta64,CALIBRATE_TIME_MSEC);
158
159         local_irq_restore(flags);
160         return (unsigned long)delta64;
161 err:
162         local_irq_restore(flags);
163         return 0;
164 }
165
166 int recalibrate_cpu_khz(void)
167 {
168 #ifndef CONFIG_SMP
169         unsigned long cpu_khz_old = cpu_khz;
170
171         if (cpu_has_tsc) {
172                 cpu_khz = calculate_cpu_khz();
173                 tsc_khz = cpu_khz;
174                 cpu_data[0].loops_per_jiffy =
175                         cpufreq_scale(cpu_data[0].loops_per_jiffy,
176                                         cpu_khz_old, cpu_khz);
177                 return 0;
178         } else
179                 return -ENODEV;
180 #else
181         return -ENODEV;
182 #endif
183 }
184
185 EXPORT_SYMBOL(recalibrate_cpu_khz);
186
187 #ifdef CONFIG_CPU_FREQ
188
189 /*
190  * if the CPU frequency is scaled, TSC-based delays will need a different
191  * loops_per_jiffy value to function properly.
192  */
193 static unsigned int ref_freq = 0;
194 static unsigned long loops_per_jiffy_ref = 0;
195 static unsigned long cpu_khz_ref = 0;
196
197 static int
198 time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
199 {
200         struct cpufreq_freqs *freq = data;
201
202         if (val != CPUFREQ_RESUMECHANGE && val != CPUFREQ_SUSPENDCHANGE)
203                 write_seqlock_irq(&xtime_lock);
204
205         if (!ref_freq) {
206                 if (!freq->old){
207                         ref_freq = freq->new;
208                         goto end;
209                 }
210                 ref_freq = freq->old;
211                 loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
212                 cpu_khz_ref = cpu_khz;
213         }
214
215         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
216             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
217             (val == CPUFREQ_RESUMECHANGE)) {
218                 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
219                         cpu_data[freq->cpu].loops_per_jiffy =
220                                 cpufreq_scale(loops_per_jiffy_ref,
221                                                 ref_freq, freq->new);
222
223                 if (cpu_khz) {
224
225                         if (num_online_cpus() == 1)
226                                 cpu_khz = cpufreq_scale(cpu_khz_ref,
227                                                 ref_freq, freq->new);
228                         if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
229                                 tsc_khz = cpu_khz;
230                                 set_cyc2ns_scale(cpu_khz);
231                                 /*
232                                  * TSC based sched_clock turns
233                                  * to junk w/ cpufreq
234                                  */
235                                 mark_tsc_unstable();
236                         }
237                 }
238         }
239 end:
240         if (val != CPUFREQ_RESUMECHANGE && val != CPUFREQ_SUSPENDCHANGE)
241                 write_sequnlock_irq(&xtime_lock);
242
243         return 0;
244 }
245
246 static struct notifier_block time_cpufreq_notifier_block = {
247         .notifier_call  = time_cpufreq_notifier
248 };
249
250 static int __init cpufreq_tsc(void)
251 {
252         return cpufreq_register_notifier(&time_cpufreq_notifier_block,
253                                          CPUFREQ_TRANSITION_NOTIFIER);
254 }
255 core_initcall(cpufreq_tsc);
256
257 #endif
258
259 /* clock source code */
260
261 static unsigned long current_tsc_khz = 0;
262
263 static cycle_t read_tsc(void)
264 {
265         cycle_t ret;
266
267         rdtscll(ret);
268
269         return ret;
270 }
271
272 static struct clocksource clocksource_tsc = {
273         .name                   = "tsc",
274         .rating                 = 300,
275         .read                   = read_tsc,
276         .mask                   = CLOCKSOURCE_MASK(64),
277         .mult                   = 0, /* to be set */
278         .shift                  = 22,
279         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS |
280                                   CLOCK_SOURCE_MUST_VERIFY,
281 };
282
283 void mark_tsc_unstable(void)
284 {
285         if (!tsc_unstable) {
286                 tsc_unstable = 1;
287                 /* Can be called before registration */
288                 if (clocksource_tsc.mult)
289                         clocksource_change_rating(&clocksource_tsc, 0);
290                 else
291                         clocksource_tsc.rating = 0;
292         }
293 }
294 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
295
296 static int __init dmi_mark_tsc_unstable(struct dmi_system_id *d)
297 {
298         printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
299                        d->ident);
300         tsc_unstable = 1;
301         return 0;
302 }
303
304 /* List of systems that have known TSC problems */
305 static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
306         {
307          .callback = dmi_mark_tsc_unstable,
308          .ident = "IBM Thinkpad 380XD",
309          .matches = {
310                      DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
311                      DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
312                      },
313          },
314          {}
315 };
316
317 /*
318  * Make an educated guess if the TSC is trustworthy and synchronized
319  * over all CPUs.
320  */
321 __cpuinit int unsynchronized_tsc(void)
322 {
323         if (!cpu_has_tsc || tsc_unstable)
324                 return 1;
325         /*
326          * Intel systems are normally all synchronized.
327          * Exceptions must mark TSC as unstable:
328          */
329         if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
330                 /* assume multi socket systems are not synchronized: */
331                 if (num_possible_cpus() > 1)
332                         tsc_unstable = 1;
333         }
334         return tsc_unstable;
335 }
336
337 /*
338  * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
339  */
340 #ifdef CONFIG_MGEODE_LX
341 /* RTSC counts during suspend */
342 #define RTSC_SUSP 0x100
343
344 static void __init check_geode_tsc_reliable(void)
345 {
346         unsigned long val;
347
348         rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
349         if ((val & RTSC_SUSP))
350                 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
351 }
352 #else
353 static inline void check_geode_tsc_reliable(void) { }
354 #endif
355
356
357 void __init tsc_init(void)
358 {
359         if (!cpu_has_tsc || tsc_disable)
360                 goto out_no_tsc;
361
362         cpu_khz = calculate_cpu_khz();
363         tsc_khz = cpu_khz;
364
365         if (!cpu_khz)
366                 goto out_no_tsc;
367
368         printk("Detected %lu.%03lu MHz processor.\n",
369                                 (unsigned long)cpu_khz / 1000,
370                                 (unsigned long)cpu_khz % 1000);
371
372         set_cyc2ns_scale(cpu_khz);
373         use_tsc_delay();
374
375         /* Check and install the TSC clocksource */
376         dmi_check_system(bad_tsc_dmi_table);
377
378         unsynchronized_tsc();
379         check_geode_tsc_reliable();
380         current_tsc_khz = tsc_khz;
381         clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
382                                                         clocksource_tsc.shift);
383         /* lower the rating if we already know its unstable: */
384         if (check_tsc_unstable()) {
385                 clocksource_tsc.rating = 0;
386                 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
387         }
388         clocksource_register(&clocksource_tsc);
389
390         return;
391
392 out_no_tsc:
393         /*
394          * Set the tsc_disable flag if there's no TSC support, this
395          * makes it a fast flag for the kernel to see whether it
396          * should be using the TSC.
397          */
398         tsc_disable = 1;
399 }