2 * linux/arch/m32r/platforms/oaks32r/setup.c
4 * Setup routines for OAKS32R Board
6 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
14 #include <asm/system.h>
18 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20 icu_data_t icu_data[NR_IRQS];
22 static void disable_oaks32r_irq(unsigned int irq)
24 unsigned long port, data;
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
31 static void enable_oaks32r_irq(unsigned int irq)
33 unsigned long port, data;
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
40 static void mask_oaks32r(struct irq_data *data)
42 disable_oaks32r_irq(data->irq);
45 static void unmask_oaks32r(struct irq_data *data)
47 enable_oaks32r_irq(data->irq);
50 static void shutdown_oaks32r(struct irq_data *data)
54 port = irq2port(data->irq);
55 outl(M32R_ICUCR_ILEVEL7, port);
58 static struct irq_chip oaks32r_irq_type =
60 .name = "OAKS32R-IRQ",
61 .irq_shutdown = shutdown_oaks32r,
62 .irq_mask = mask_oaks32r,
63 .irq_unmask = unmask_oaks32r,
66 void __init init_IRQ(void)
76 /* INT3 : LAN controller (RTL8019AS) */
77 irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
79 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
80 disable_oaks32r_irq(M32R_IRQ_INT3);
81 #endif /* CONFIG_M32R_NE2000 */
83 /* MFT2 : system timer */
84 irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
86 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
87 disable_oaks32r_irq(M32R_IRQ_MFT2);
89 #ifdef CONFIG_SERIAL_M32R_SIO
90 /* SIO0_R : uart receive data */
91 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
93 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
94 disable_oaks32r_irq(M32R_IRQ_SIO0_R);
96 /* SIO0_S : uart send data */
97 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
99 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
100 disable_oaks32r_irq(M32R_IRQ_SIO0_S);
102 /* SIO1_R : uart receive data */
103 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
106 disable_oaks32r_irq(M32R_IRQ_SIO1_R);
108 /* SIO1_S : uart send data */
109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
112 disable_oaks32r_irq(M32R_IRQ_SIO1_S);
113 #endif /* CONFIG_SERIAL_M32R_SIO */