1 #ifndef _M68K_CACHEFLUSH_H
2 #define _M68K_CACHEFLUSH_H
6 #include <asm/mcfsim.h>
10 #define FLUSH_I_AND_D (0x00000808)
11 #define FLUSH_I (0x00000008)
13 #ifndef ICACHE_MAX_ADDR
14 #define ICACHE_MAX_ADDR 0
15 #define ICACHE_SET_MASK 0
16 #define DCACHE_MAX_ADDR 0
17 #define DCACHE_SETMASK 0
20 static inline void flush_cf_icache(unsigned long start, unsigned long end)
24 for (set = start; set <= end; set += (0x10 - 3)) {
25 __asm__ __volatile__ (
26 "cpushl %%ic,(%0)\n\t"
28 "cpushl %%ic,(%0)\n\t"
30 "cpushl %%ic,(%0)\n\t"
38 static inline void flush_cf_dcache(unsigned long start, unsigned long end)
42 for (set = start; set <= end; set += (0x10 - 3)) {
43 __asm__ __volatile__ (
44 "cpushl %%dc,(%0)\n\t"
46 "cpushl %%dc,(%0)\n\t"
48 "cpushl %%dc,(%0)\n\t"
56 static inline void flush_cf_bcache(unsigned long start, unsigned long end)
60 for (set = start; set <= end; set += (0x10 - 3)) {
61 __asm__ __volatile__ (
62 "cpushl %%bc,(%0)\n\t"
64 "cpushl %%bc,(%0)\n\t"
66 "cpushl %%bc,(%0)\n\t"
75 * Cache handling functions
78 static inline void flush_icache(void)
80 if (CPU_IS_COLDFIRE) {
81 flush_cf_icache(0, ICACHE_MAX_ADDR);
82 } else if (CPU_IS_040_OR_060) {
83 asm volatile ( "nop\n"
89 asm volatile ( "movec %%cacr,%0\n"
98 * invalidate the cache for the specified memory range.
99 * It starts at the physical address specified for
100 * the given number of bytes.
102 extern void cache_clear(unsigned long paddr, int len);
104 * push any dirty cache in the specified memory range.
105 * It starts at the physical address specified for
106 * the given number of bytes.
108 extern void cache_push(unsigned long paddr, int len);
111 * push and invalidate pages in the specified user virtual
114 extern void cache_push_v(unsigned long vaddr, int len);
116 /* This is needed whenever the virtual mapping of the current
118 #define __flush_cache_all() \
120 if (CPU_IS_COLDFIRE) { \
121 flush_cf_dcache(0, DCACHE_MAX_ADDR); \
122 } else if (CPU_IS_040_OR_060) { \
123 __asm__ __volatile__("nop\n\t" \
128 unsigned long _tmp; \
129 __asm__ __volatile__("movec %%cacr,%0\n\t" \
133 : "di" (FLUSH_I_AND_D)); \
137 #define __flush_cache_030() \
139 if (CPU_IS_020_OR_030) { \
140 unsigned long _tmp; \
141 __asm__ __volatile__("movec %%cacr,%0\n\t" \
145 : "di" (FLUSH_I_AND_D)); \
149 #define flush_cache_all() __flush_cache_all()
151 #define flush_cache_vmap(start, end) flush_cache_all()
152 #define flush_cache_vunmap(start, end) flush_cache_all()
154 static inline void flush_cache_mm(struct mm_struct *mm)
156 if (mm == current->mm)
160 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
162 /* flush_cache_range/flush_cache_page must be macros to avoid
163 a dependency on linux/mm.h, which includes this file... */
164 static inline void flush_cache_range(struct vm_area_struct *vma,
168 if (vma->vm_mm == current->mm)
172 static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
174 if (vma->vm_mm == current->mm)
179 /* Push the page at kernel virtual address and clear the icache */
180 /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
181 static inline void __flush_page_to_ram(void *vaddr)
183 if (CPU_IS_COLDFIRE) {
184 unsigned long addr, start, end;
185 addr = ((unsigned long) vaddr) & ~(PAGE_SIZE - 1);
186 start = addr & ICACHE_SET_MASK;
187 end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK;
189 flush_cf_bcache(0, end);
190 end = ICACHE_MAX_ADDR;
192 flush_cf_bcache(start, end);
193 } else if (CPU_IS_040_OR_060) {
194 __asm__ __volatile__("nop\n\t"
196 "cpushp %%bc,(%0)\n\t"
198 : : "a" (__pa(vaddr)));
201 __asm__ __volatile__("movec %%cacr,%0\n\t"
209 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
210 #define flush_dcache_page(page) __flush_page_to_ram(page_address(page))
211 #define flush_dcache_mmap_lock(mapping) do { } while (0)
212 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
213 #define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page))
215 extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
216 unsigned long addr, int len);
217 extern void flush_icache_range(unsigned long address, unsigned long endaddr);
219 static inline void copy_to_user_page(struct vm_area_struct *vma,
220 struct page *page, unsigned long vaddr,
221 void *dst, void *src, int len)
223 flush_cache_page(vma, vaddr, page_to_pfn(page));
224 memcpy(dst, src, len);
225 flush_icache_user_range(vma, page, vaddr, len);
227 static inline void copy_from_user_page(struct vm_area_struct *vma,
228 struct page *page, unsigned long vaddr,
229 void *dst, void *src, int len)
231 flush_cache_page(vma, vaddr, page_to_pfn(page));
232 memcpy(dst, src, len);
235 #endif /* _M68K_CACHEFLUSH_H */