5 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
6 * exclusively use the autovector interrupts (the 'generic level0-level7'
7 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
10 * - slot 0: one second interrupt (CA2)
11 * - slot 1: VBlank (CA1)
12 * - slot 2: ADB data ready (SR full)
13 * - slot 3: ADB data (CB2)
14 * - slot 4: ADB clock (CB1)
17 * - slot 7: status of IRQ; signals 'any enabled int.'
20 * - slot 0: SCSI DRQ (CA2)
21 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
22 * - slot 2: /EXP IRQ (only on IIci)
23 * - slot 3: SCSI IRQ (CB2)
24 * - slot 4: ASC IRQ (CB1)
25 * - slot 5: timer 2 (not on IIci)
26 * - slot 6: timer 1 (not on IIci)
27 * - slot 7: status of IRQ; signals 'any enabled int.'
29 * 2 - OSS (IIfx only?)
30 * - slot 0: SCSI interrupt
31 * - slot 1: Sound interrupt
33 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
40 * [serial errors or special conditions seem to raise level 6
41 * interrupts on some models (LC4xx?)]
45 * For OSS Macintoshes (IIfx only at this point):
61 * For PSC Macintoshes (660AV, 840AV):
67 * - slot 1: SCC channel A interrupt
68 * - slot 2: SCC channel B interrupt
75 * Finally we have good 'ole level 7, the non-maskable interrupt:
77 * 7 - NMI (programmer's switch on the back of some Macs)
78 * Also RAM parity error on models which support it (IIc, IIfx?)
80 * The current interrupt logic looks something like this:
82 * - We install dispatchers for the autovector interrupts (1-7). These
83 * dispatchers are responsible for querying the hardware (the
84 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
85 * this information a machspec interrupt number is generated by placing the
86 * index of the interrupt hardware into the low three bits and the original
87 * autovector interrupt number in the upper 5 bits. The handlers for the
88 * resulting machspec interrupt are then called.
90 * - Nubus is a special case because its interrupts are hidden behind two
91 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
92 * which translates to IRQ number 17. In this spot we install _another_
93 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
94 * then forms a new machspec interrupt number as above with the slot number
95 * minus 9 in the low three bits and the pseudo-level 7 in the upper five
96 * bits. The handlers for this new machspec interrupt number are then
97 * called. This puts Nubus interrupts into the range 56-62.
99 * - The Baboon interrupts (used on some PowerBooks) are an even more special
100 * case. They're hidden behind the Nubus slot $C interrupt thus adding a
101 * third layer of indirection. Why oh why did the Apple engineers do that?
103 * - We support "fast" and "slow" handlers, just like the Amiga port. The
104 * fast handlers are called first and with all interrupts disabled. They
105 * are expected to execute quickly (hence the name). The slow handlers are
106 * called last with interrupts enabled and the interrupt level restored.
107 * They must therefore be reentrant.
113 #include <linux/module.h>
114 #include <linux/types.h>
115 #include <linux/kernel.h>
116 #include <linux/sched.h>
117 #include <linux/kernel_stat.h>
118 #include <linux/interrupt.h> /* for intr_count */
119 #include <linux/delay.h>
120 #include <linux/seq_file.h>
122 #include <asm/system.h>
124 #include <asm/traps.h>
125 #include <asm/bootinfo.h>
126 #include <asm/macintosh.h>
127 #include <asm/mac_via.h>
128 #include <asm/mac_psc.h>
129 #include <asm/hwtest.h>
130 #include <asm/errno.h>
131 #include <asm/macints.h>
132 #include <asm/irq_regs.h>
133 #include <asm/mac_oss.h>
141 extern void via_register_interrupts(void);
142 extern void via_irq_enable(int);
143 extern void via_irq_disable(int);
144 extern void via_irq_clear(int);
145 extern int via_irq_pending(int);
151 extern void oss_register_interrupts(void);
152 extern void oss_irq_enable(int);
153 extern void oss_irq_disable(int);
154 extern void oss_irq_clear(int);
155 extern int oss_irq_pending(int);
161 extern void psc_register_interrupts(void);
162 extern void psc_irq_enable(int);
163 extern void psc_irq_disable(int);
164 extern void psc_irq_clear(int);
165 extern int psc_irq_pending(int);
171 extern void iop_register_interrupts(void);
177 extern int baboon_present;
179 extern void baboon_register_interrupts(void);
180 extern void baboon_irq_enable(int);
181 extern void baboon_irq_disable(int);
182 extern void baboon_irq_clear(int);
185 * console_loglevel determines NMI handler function
188 irqreturn_t mac_nmi_handler(int, void *);
189 irqreturn_t mac_debug_handler(int, void *);
191 /* #define DEBUG_MACINTS */
193 static struct irq_chip mac_irq_chip = {
195 .irq_enable = mac_irq_enable,
196 .irq_disable = mac_irq_disable,
199 void __init mac_init_IRQ(void)
202 printk("mac_init_IRQ(): Setting things up...\n");
204 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
205 NUM_MAC_SOURCES - IRQ_USER);
206 /* Make sure the SONIC interrupt is cleared or things get ugly */
208 printk("Killing onboard sonic... ");
209 /* This address should hopefully be mapped already */
210 if (hwreg_present((void*)(0x50f0a000))) {
211 *(long *)(0x50f0a014) = 0x7fffL;
212 *(long *)(0x50f0a010) = 0L;
215 #endif /* SHUTUP_SONIC */
218 * Now register the handlers for the master IRQ handlers
219 * at levels 1-7. Most of the work is done elsewhere.
223 oss_register_interrupts();
225 via_register_interrupts();
227 psc_register_interrupts();
229 baboon_register_interrupts();
230 iop_register_interrupts();
231 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
233 pr_err("Couldn't register NMI\n");
235 printk("mac_init_IRQ(): Done!\n");
240 * mac_irq_enable - enable an interrupt source
241 * mac_irq_disable - disable an interrupt source
242 * mac_clear_irq - clears a pending interrupt
243 * mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
245 * These routines are just dispatchers to the VIA/OSS/PSC routines.
248 void mac_irq_enable(struct irq_data *data)
251 int irq_src = IRQ_SRC(irq);
269 else if (oss_present)
278 baboon_irq_enable(irq);
283 void mac_irq_disable(struct irq_data *data)
286 int irq_src = IRQ_SRC(irq);
290 via_irq_disable(irq);
295 oss_irq_disable(irq);
297 via_irq_disable(irq);
303 psc_irq_disable(irq);
304 else if (oss_present)
305 oss_irq_disable(irq);
309 psc_irq_disable(irq);
313 baboon_irq_disable(irq);
318 void mac_clear_irq(unsigned int irq)
320 switch(IRQ_SRC(irq)) {
336 else if (oss_present)
345 baboon_irq_clear(irq);
350 int mac_irq_pending(unsigned int irq)
352 switch(IRQ_SRC(irq)) {
354 return via_irq_pending(irq);
358 return oss_irq_pending(irq);
360 return via_irq_pending(irq);
365 return psc_irq_pending(irq);
366 else if (oss_present)
367 return oss_irq_pending(irq);
371 return psc_irq_pending(irq);
376 EXPORT_SYMBOL(mac_irq_pending);
378 static int num_debug[8];
380 irqreturn_t mac_debug_handler(int irq, void *dev_id)
382 if (num_debug[irq] < 10) {
383 printk("DEBUG: Unexpected IRQ %d\n", irq);
390 static volatile int nmi_hold;
392 irqreturn_t mac_nmi_handler(int irq, void *dev_id)
396 * generate debug output on NMI switch if 'debug' kernel option given
397 * (only works with Penguin!)
401 for (i=0; i<100; i++)
406 printk("... pausing, press NMI to resume ...");
414 while (nmi_hold == 1)
417 if (console_loglevel >= 8) {
419 struct pt_regs *fp = get_irq_regs();
421 printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
422 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
423 fp->d0, fp->d1, fp->d2, fp->d3);
424 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
425 fp->d4, fp->d5, fp->a0, fp->a1);
427 if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
428 printk("Corrupted stack page\n");
429 printk("Process %s (pid: %d, stackpage=%08lx)\n",
430 current->comm, current->pid, current->kernel_stack_page);
432 dump_stack((struct frame *)fp);
434 /* printk("NMI "); */