4 * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
6 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
13 #include <linux/types.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
19 #include <asm/coldfire.h>
20 #include <asm/mcfsim.h>
21 #include <asm/traps.h>
23 static void intc_irq_mask(struct irq_data *d)
25 unsigned int irq = d->irq;
27 if (irq >= MCFINT_VECBASE) {
28 if (irq < MCFINT_VECBASE + 64)
29 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
30 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
31 __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
35 static void intc_irq_unmask(struct irq_data *d)
37 unsigned int irq = d->irq;
39 if (irq >= MCFINT_VECBASE) {
40 if (irq < MCFINT_VECBASE + 64)
41 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
42 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
43 __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
47 static int intc_irq_set_type(struct irq_data *d, unsigned int type)
49 unsigned int irq = d->irq;
51 if (irq >= MCFINT_VECBASE) {
52 if (irq < MCFINT_VECBASE + 64)
53 __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
54 else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
55 __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
60 static struct irq_chip intc_irq_chip = {
62 .irq_mask = intc_irq_mask,
63 .irq_unmask = intc_irq_unmask,
64 .irq_set_type = intc_irq_set_type,
67 void __init init_IRQ(void)
73 /* Mask all interrupt sources */
74 __raw_writeb(0xff, MCFINTC0_SIMR);
76 __raw_writeb(0xff, MCFINTC1_SIMR);
78 for (irq = 0; (irq < NR_IRQS); irq++) {
79 set_irq_chip(irq, &intc_irq_chip);
80 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
81 set_irq_handler(irq, handle_level_irq);