arch/microblaze/kernel/process.c

   1 /*
   2  * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
   3  * Copyright (C) 2008-2009 PetaLogix
   4  * Copyright (C) 2006 Atmark Techno, Inc.
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License. See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/sched.h>
  13 #include <linux/pm.h>
  14 #include <linux/tick.h>
  15 #include <linux/bitops.h>
  16 #include <linux/ptrace.h>
  17 #include <asm/pgalloc.h>
  18 #include <asm/uaccess.h> /* for USER_DS macros */
  19 #include <asm/cacheflush.h>
  20
  21 void show_regs(struct pt_regs *regs)
  22 {
  23         printk(KERN_INFO " Registers dump: mode=%X\r\n", regs->pt_mode);
  24         printk(KERN_INFO " r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
  25                                 regs->r1, regs->r2, regs->r3, regs->r4);
  26         printk(KERN_INFO " r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
  27                                 regs->r5, regs->r6, regs->r7, regs->r8);
  28         printk(KERN_INFO " r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
  29                                 regs->r9, regs->r10, regs->r11, regs->r12);
  30         printk(KERN_INFO " r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
  31                                 regs->r13, regs->r14, regs->r15, regs->r16);
  32         printk(KERN_INFO " r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
  33                                 regs->r17, regs->r18, regs->r19, regs->r20);
  34         printk(KERN_INFO " r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
  35                                 regs->r21, regs->r22, regs->r23, regs->r24);
  36         printk(KERN_INFO " r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
  37                                 regs->r25, regs->r26, regs->r27, regs->r28);
  38         printk(KERN_INFO " r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
  39                                 regs->r29, regs->r30, regs->r31, regs->pc);
  40         printk(KERN_INFO " msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
  41                                 regs->msr, regs->ear, regs->esr, regs->fsr);
  42 }
  43
  44 void (*pm_power_off)(void) = NULL;
  45 EXPORT_SYMBOL(pm_power_off);
  46
  47 static int hlt_counter = 1;
  48
  49 void disable_hlt(void)
  50 {
  51         hlt_counter++;
  52 }
  53 EXPORT_SYMBOL(disable_hlt);
  54
  55 void enable_hlt(void)
  56 {
  57         hlt_counter--;
  58 }
  59 EXPORT_SYMBOL(enable_hlt);
  60
  61 static int __init nohlt_setup(char *__unused)
  62 {
  63         hlt_counter = 1;
  64         return 1;
  65 }
  66 __setup("nohlt", nohlt_setup);
  67
  68 static int __init hlt_setup(char *__unused)
  69 {
  70         hlt_counter = 0;
  71         return 1;
  72 }
  73 __setup("hlt", hlt_setup);
  74
  75 void default_idle(void)
  76 {
  77         if (likely(hlt_counter)) {
  78                 local_irq_disable();
  79                 stop_critical_timings();
  80                 cpu_relax();
  81                 start_critical_timings();
  82                 local_irq_enable();
  83         } else {
  84                 clear_thread_flag(TIF_POLLING_NRFLAG);
  85                 smp_mb__after_clear_bit();
  86                 local_irq_disable();
  87                 while (!need_resched())
  88                         cpu_sleep();
  89                 local_irq_enable();
  90                 set_thread_flag(TIF_POLLING_NRFLAG);
  91         }
  92 }
  93
  94 void cpu_idle(void)
  95 {
  96         set_thread_flag(TIF_POLLING_NRFLAG);
  97
  98         /* endless idle loop with no priority at all */
  99         while (1) {
 100                 if (!idle)
 101                         idle = default_idle;
 102
 103                 tick_nohz_idle_enter();
 104                 rcu_idle_enter();
 105                 while (!need_resched())
 106                         idle();
 107                 rcu_idle_exit();
 108                 tick_nohz_idle_exit();
 109
 110                 schedule_preempt_disabled();
 111                 check_pgt_cache();
 112         }
 113 }
 114
 115 void flush_thread(void)
 116 {
 117 }
 118
 119 int copy_thread(unsigned long clone_flags, unsigned long usp,
 120                 unsigned long arg, struct task_struct *p)
 121 {
 122         struct pt_regs *childregs = task_pt_regs(p);
 123         struct thread_info *ti = task_thread_info(p);
 124
 125         if (unlikely(p->flags & PF_KTHREAD)) {
 126                 /* if we're creating a new kernel thread then just zeroing all
 127                  * the registers. That's OK for a brand new thread.*/
 128                 memset(childregs, 0, sizeof(struct pt_regs));
 129                 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
 130                 ti->cpu_context.r1  = (unsigned long)childregs;
 131                 ti->cpu_context.r20 = (unsigned long)usp; /* fn */
 132                 ti->cpu_context.r19 = (unsigned long)arg;
 133                 childregs->pt_mode = 1;
 134                 local_save_flags(childregs->msr);
 135 #ifdef CONFIG_MMU
 136                 ti->cpu_context.msr = childregs->msr & ~MSR_IE;
 137 #endif
 138                 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
 139                 return 0;
 140         }
 141         *childregs = *current_pt_regs();
 142         if (usp)
 143                 childregs->r1 = usp;
 144
 145         memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
 146         ti->cpu_context.r1 = (unsigned long)childregs;
 147 #ifndef CONFIG_MMU
 148         ti->cpu_context.msr = (unsigned long)childregs->msr;
 149 #else
 150         childregs->msr |= MSR_UMS;
 151
 152         /* we should consider the fact that childregs is a copy of the parent
 153          * regs which were saved immediately after entering the kernel state
 154          * before enabling VM. This MSR will be restored in switch_to and
 155          * RETURN() and we want to have the right machine state there
 156          * specifically this state must have INTs disabled before and enabled
 157          * after performing rtbd
 158          * compose the right MSR for RETURN(). It will work for switch_to also
 159          * excepting for VM and UMS
 160          * don't touch UMS , CARRY and cache bits
 161          * right now MSR is a copy of parent one */
 162         childregs->msr &= ~MSR_EIP;
 163         childregs->msr |= MSR_IE;
 164         childregs->msr &= ~MSR_VM;
 165         childregs->msr |= MSR_VMS;
 166         childregs->msr |= MSR_EE; /* exceptions will be enabled*/
 167
 168         ti->cpu_context.msr = (childregs->msr|MSR_VM);
 169         ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
 170         ti->cpu_context.msr &= ~MSR_IE;
 171 #endif
 172         ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
 173
 174         /*
 175          *  r21 is the thread reg, r10 is 6th arg to clone
 176          *  which contains TLS area
 177          */
 178         if (clone_flags & CLONE_SETTLS)
 179                 childregs->r21 = childregs->r10;
 180
 181         return 0;
 182 }
 183
 184 #ifndef CONFIG_MMU
 185 /*
 186  * Return saved PC of a blocked thread.
 187  */
 188 unsigned long thread_saved_pc(struct task_struct *tsk)
 189 {
 190         struct cpu_context *ctx =
 191                 &(((struct thread_info *)(tsk->stack))->cpu_context);
 192
 193         /* Check whether the thread is blocked in resume() */
 194         if (in_sched_functions(ctx->r15))
 195                 return (unsigned long)ctx->r15;
 196         else
 197                 return ctx->r14;
 198 }
 199 #endif
 200
 201 unsigned long get_wchan(struct task_struct *p)
 202 {
 203 /* TBD (used by procfs) */
 204         return 0;
 205 }
 206
 207 /* Set up a thread for executing a new program */
 208 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
 209 {
 210         regs->pc = pc;
 211         regs->r1 = usp;
 212         regs->pt_mode = 0;
 213 #ifdef CONFIG_MMU
 214         regs->msr |= MSR_UMS;
 215         regs->msr &= ~MSR_VM;
 216 #endif
 217 }
 218
 219 #ifdef CONFIG_MMU
 220 #include <linux/elfcore.h>
 221 /*
 222  * Set up a thread for executing a new program
 223  */
 224 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
 225 {
 226         return 0; /* MicroBlaze has no separate FPU registers */
 227 }
 228 #endif /* CONFIG_MMU */