2 * Microblaze support for cache consistent memory.
3 * Copyright (C) 2010 Michal Simek <monstr@monstr.eu>
4 * Copyright (C) 2010 PetaLogix
5 * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
7 * Based on PowerPC version derived from arch/arm/mm/consistent.c
8 * Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
9 * Copyright (C) 2000 Russell King
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/module.h>
17 #include <linux/signal.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/types.h>
23 #include <linux/ptrace.h>
24 #include <linux/mman.h>
26 #include <linux/swap.h>
27 #include <linux/stddef.h>
28 #include <linux/vmalloc.h>
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/bootmem.h>
32 #include <linux/highmem.h>
33 #include <linux/pci.h>
34 #include <linux/interrupt.h>
35 #include <linux/gfp.h>
37 #include <asm/pgalloc.h>
39 #include <linux/hardirq.h>
40 #include <asm/mmu_context.h>
42 #include <linux/uaccess.h>
43 #include <asm/pgtable.h>
44 #include <asm/cpuinfo.h>
48 /* I have to use dcache values because I can't relate on ram size */
49 #define UNCACHED_SHADOW_MASK (cpuinfo.dcache_high - cpuinfo.dcache_base + 1)
52 * Consistent memory allocators. Used for DMA devices that want to
53 * share uncached memory with the processor core.
54 * My crufty no-MMU approach is simple. In the HW platform we can optionally
55 * mirror the DDR up above the processor cacheable region. So, memory accessed
56 * in this mirror region will not be cached. It's alloced from the same
57 * pool as normal memory, but the handle we return is shifted up into the
58 * uncached region. This will no doubt cause big problems if memory allocated
59 * here is not also freed properly. -- JW
61 void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
63 struct page *page, *end, *free;
70 size = PAGE_ALIGN(size);
71 order = get_order(size);
73 page = alloc_pages(gfp, order);
77 /* We could do with a page_to_phys and page_to_bus here. */
78 virt = page_address(page);
79 ret = ioremap(virt_to_phys(virt), size);
84 * Here's the magic! Note if the uncached shadow is not implemented,
85 * it's up to the calling code to also test that condition and make
86 * other arranegments, such as manually flushing the cache and so on.
88 #ifdef CONFIG_XILINX_UNCACHED_SHADOW
89 ret = (void *)((unsigned) ret | UNCACHED_SHADOW_MASK);
91 /* dma_handle is same as physical (shadowed) address */
92 *dma_handle = (dma_addr_t)ret;
95 * free wasted pages. We skip the first page since we know
96 * that it will have count = 1 and won't require freeing.
97 * We also mark the pages in use as reserved so that
98 * remap_page_range works.
100 page = virt_to_page(virt);
101 free = page + (size >> PAGE_SHIFT);
102 end = page + (1 << order);
104 for (; page < end; page++) {
105 init_page_count(page);
109 SetPageReserved(page);
114 __free_pages(page, order);
121 void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
124 unsigned long page, va, flags;
126 struct vm_struct *area;
132 /* Only allocate page size areas. */
133 size = PAGE_ALIGN(size);
134 order = get_order(size);
136 page = __get_free_pages(gfp, order);
143 * we need to ensure that there are no cachelines in use,
144 * or worse dirty in this area.
146 flush_dcache_range(virt_to_phys(page), virt_to_phys(page) + size);
148 /* Allocate some common virtual space to map the new pages. */
149 area = get_vm_area(size, VM_ALLOC);
151 free_pages(page, order);
154 va = (unsigned long) area->addr;
157 /* This gives us the real physical address of the first page. */
158 *dma_handle = pa = virt_to_bus((void *)page);
160 /* MS: This is the whole magic - use cache inhibit pages */
161 flags = _PAGE_KERNEL | _PAGE_NO_CACHE;
164 * Set refcount=1 on all pages in an order>0
165 * allocation so that vfree() will actually
166 * free all pages that were allocated.
169 struct page *rpage = virt_to_page(page);
170 for (i = 1; i < (1 << order); i++)
171 init_page_count(rpage+i);
175 for (i = 0; i < size && err == 0; i += PAGE_SIZE)
176 err = map_page(va+i, pa+i, flags);
185 #endif /* CONFIG_MMU */
186 EXPORT_SYMBOL(consistent_alloc);
189 * free page(s) as defined by the above mapping.
191 void consistent_free(void *vaddr)
196 /* Clear SHADOW_MASK bit in address, and free as per usual */
197 #ifdef CONFIG_XILINX_UNCACHED_SHADOW
198 vaddr = (void *)((unsigned)vaddr & ~UNCACHED_SHADOW_MASK);
202 EXPORT_SYMBOL(consistent_free);
205 * make an area consistent.
207 void consistent_sync(void *vaddr, size_t size, int direction)
212 start = (unsigned long)vaddr;
214 /* Convert start address back down to unshadowed memory region */
215 #ifdef CONFIG_XILINX_UNCACHED_SHADOW
216 start &= ~UNCACHED_SHADOW_MASK;
223 case PCI_DMA_FROMDEVICE: /* invalidate only */
224 flush_dcache_range(start, end);
226 case PCI_DMA_TODEVICE: /* writeback only */
227 flush_dcache_range(start, end);
229 case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */
230 flush_dcache_range(start, end);
234 EXPORT_SYMBOL(consistent_sync);
237 * consistent_sync_page makes memory consistent. identical
238 * to consistent_sync, but takes a struct page instead of a
241 void consistent_sync_page(struct page *page, unsigned long offset,
242 size_t size, int direction)
244 unsigned long start = (unsigned long)page_address(page) + offset;
245 consistent_sync((void *)start, size, direction);
247 EXPORT_SYMBOL(consistent_sync_page);